source: rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-flash.S @ 0e27119

4.115
Last change on this file since 0e27119 was 94102775, checked in by Sebastian Huber <sebastian.huber@…>, on 10/01/12 at 13:02:57

bsp/mpc55xx: Add and use MPC55XX_CHIP_FAMILY
  • Property mode set to 100644
File size: 2.5 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup mpc55xx_asm
5 *
6 * @brief Flash configuration.
7 */
8
9/*
10 * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
11 *
12 *  embedded brains GmbH
13 *  Obere Lagerstr. 30
14 *  82178 Puchheim
15 *  Germany
16 *  <rtems@embedded-brains.de>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.com/license/LICENSE.
21 */
22
23#include <libcpu/powerpc-utility.h>
24#include <mpc55xx/reg-defs.h>
25
26        .section        ".bsp_start_text", "ax"
27
28/* Optimized flash configurations (Table 13-15 [MPC5567 Microcontroller Reference Manual]) */
29.equ FLASH_SETTINGS_RESET, 0xff00
30.equ FLASH_SETTINGS_82, FLASH_BUICR_CPU_PREFTCH | FLASH_BUICR_APC_1 | FLASH_BUICR_RWSC_1 | FLASH_BUICR_WWSC_1 | FLASH_BUICR_DPFEN_3 | FLASH_BUICR_IPFEN_3 | FLASH_BUICR_PFLIM_6 | FLASH_BUICR_BFEN
31.equ FLASH_SETTINGS_102, FLASH_BUICR_CPU_PREFTCH | FLASH_BUICR_APC_1 | FLASH_BUICR_RWSC_2 | FLASH_BUICR_WWSC_1 | FLASH_BUICR_DPFEN_3 | FLASH_BUICR_IPFEN_3 | FLASH_BUICR_PFLIM_6 | FLASH_BUICR_BFEN
32.equ FLASH_SETTINGS_132, FLASH_BUICR_CPU_PREFTCH | FLASH_BUICR_APC_2 | FLASH_BUICR_RWSC_3 | FLASH_BUICR_WWSC_1 | FLASH_BUICR_DPFEN_3 | FLASH_BUICR_IPFEN_3 | FLASH_BUICR_PFLIM_6 | FLASH_BUICR_BFEN
33.equ FLASH_SETTINGS_264, 0x01716B15
34
35/**
36 * @fn void mpc55xx_start_flash()
37 * @brief Optimized flash configuration.
38 * @warning Code will be copied and executed on the stack.
39 */
40GLOBAL_FUNCTION mpc55xx_start_flash
41#if !defined(MPC55XX_NEEDS_LOW_LEVEL_INIT) || MPC55XX_CHIP_FAMILY == 564
42        blr
43#else
44        .equ    stack_size, 20
45        .equ    lr_offset, 28
46
47        /* Reserve stack frame */
48        stwu    r1, -stack_size(r1)
49        mflr    r0
50        stw     r0, lr_offset(r1)
51
52        /* Flash settings dependent on system clock */
53        bl      mpc55xx_get_system_clock
54        LWI     r4, 82000000
55        cmpw    r3, r4
56        ble     clock_82
57        LWI     r4, 102000000
58        cmpw    r3, r4
59        ble     clock_102
60        LWI     r4, 132000000
61        cmpw    r3, r4
62        ble     clock_132
63        LWI     r4, 264000000
64        cmpw    r3, r4
65        ble     clock_264
66        LWI     r3, FLASH_SETTINGS_RESET
67        b       settings_done
68clock_82:
69        LWI     r3, FLASH_SETTINGS_82
70        b       settings_done
71clock_102:
72        LWI     r3, FLASH_SETTINGS_102
73        b       settings_done
74clock_132:
75        LWI     r3, FLASH_SETTINGS_132
76        b settings_done
77clock_264:
78        LWI     r3, FLASH_SETTINGS_264
79        b       settings_done
80settings_done:
81
82        /* Copy store code on the stack */
83        LA      r4, store_start
84        lwz     r6, 0(r4)
85        lwz     r7, 4(r4)
86        lwz     r8, 8(r4)
87        stw     r6, 8(r1)
88        stw     r7, 12(r1)
89        stw     r8, 16(r1)
90
91        /* Execute store code */
92        LA      r4, FLASH_BIUCR
93        addi    r5, r1, 8
94        mtctr   r5
95        bctrl
96
97        /* Return */
98        lwz     r0, lr_offset(r1)
99        addi    r1, r1, stack_size
100        mtlr    r0
101        blr
102
103/*
104 * Store flash settings
105 */
106
107store_start:
108
109        stw     r3, 0(r4)
110        isync
111        blr
112
113#endif
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