1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup mpc55xx |
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5 | * |
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6 | * @brief System clock calculation. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved. |
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11 | * |
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12 | * embedded brains GmbH |
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13 | * Obere Lagerstr. 30 |
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14 | * 82178 Puchheim |
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15 | * Germany |
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16 | * <rtems@embedded-brains.de> |
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17 | * |
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18 | * The license and distribution terms for this file may be |
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19 | * found in the file LICENSE in this distribution or at |
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20 | * http://www.rtems.com/license/LICENSE. |
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21 | */ |
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22 | |
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23 | #include <bsp.h> |
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24 | #include <bsp/start.h> |
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25 | #include <bsp/mpc55xx-config.h> |
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26 | |
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27 | uint32_t mpc55xx_get_system_clock(void) |
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28 | { |
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29 | uint32_t system_clock = 0; |
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30 | |
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31 | #ifdef MPC55XX_HAS_FMPLL |
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32 | volatile struct FMPLL_tag *fmpll = &FMPLL; |
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33 | union FMPLL_SYNSR_tag synsr = { .R = fmpll->SYNSR.R }; |
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34 | uint32_t reference_clock = MPC55XX_FMPLL_REF_CLOCK; |
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35 | bool pll_clock_mode = synsr.B.MODE != 0; |
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36 | bool crystal_or_external_reference_mode = synsr.B.PLLSEL != 0; |
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37 | |
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38 | if (pll_clock_mode) { |
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39 | if (crystal_or_external_reference_mode) { |
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40 | union FMPLL_SYNCR_tag syncr = { .R = fmpll->SYNCR.R }; |
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41 | uint32_t prediv = syncr.B.PREDIV; |
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42 | uint32_t mfd = syncr.B.MFD; |
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43 | uint32_t rfd = syncr.B.RFD; |
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44 | |
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45 | system_clock = ((reference_clock * (mfd + 4)) >> rfd) / (prediv + 1); |
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46 | } else { |
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47 | system_clock = 2 * reference_clock; |
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48 | } |
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49 | } else { |
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50 | system_clock = reference_clock; |
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51 | } |
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52 | #endif |
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53 | |
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54 | #ifdef MPC55XX_HAS_FMPLL_ENHANCED |
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55 | volatile struct FMPLL_tag *fmpll = &FMPLL; |
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56 | union FMPLL_ESYNCR1_tag esyncr1 = { .R = fmpll->ESYNCR1.R }; |
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57 | uint32_t reference_clock = MPC55XX_FMPLL_REF_CLOCK; |
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58 | bool normal_mode = (esyncr1.B.CLKCFG & 0x4U) != 0; |
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59 | |
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60 | if (normal_mode) { |
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61 | union FMPLL_ESYNCR2_tag esyncr2 = { .R = fmpll->ESYNCR2.R }; |
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62 | uint32_t eprediv = esyncr1.B.EPREDIV; |
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63 | uint32_t emfd = esyncr1.B.EMFD; |
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64 | uint32_t erfd = esyncr2.B.ERFD; |
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65 | |
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66 | system_clock = (reference_clock * (emfd + 16)) |
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67 | / ((erfd + 1) * (eprediv + 1)); |
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68 | } else { |
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69 | system_clock = reference_clock; |
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70 | } |
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71 | #endif |
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72 | |
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73 | #ifdef MPC55XX_HAS_MODE_CONTROL |
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74 | /* FIXME: Assumes normal mode and external oscillator */ |
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75 | PLLD_CR_32B_tag cr = { . R = CGM.FMPLL [0].CR.R }; |
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76 | uint32_t xosc = MPC55XX_FMPLL_REF_CLOCK; |
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77 | uint32_t ldf = cr.B.NDIV; |
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78 | uint32_t idf = cr.B.IDF + 1; |
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79 | uint32_t odf = 2U << cr.B.ODF; |
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80 | |
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81 | system_clock = (xosc * ldf) / (idf * odf); |
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82 | #endif |
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83 | |
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84 | return system_clock; |
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85 | } |
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