1 | /** |
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2 | * @file |
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3 | * |
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4 | * @brief Console LINFlexD implementation. |
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5 | */ |
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6 | |
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7 | /* |
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8 | * Copyright (c) 2011 embedded brains GmbH. All rights reserved. |
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9 | * |
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10 | * embedded brains GmbH |
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11 | * Obere Lagerstr. 30 |
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12 | * 82178 Puchheim |
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13 | * Germany |
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14 | * <rtems@embedded-brains.de> |
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15 | * |
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16 | * The license and distribution terms for this file may be |
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17 | * found in the file LICENSE in this distribution or at |
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18 | * http://www.rtems.com/license/LICENSE. |
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19 | */ |
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20 | |
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21 | #include <bsp/console-linflex.h> |
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22 | |
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23 | #include <bsp.h> |
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24 | #include <bsp/irq.h> |
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25 | |
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26 | #ifdef MPC55XX_HAS_LINFLEX |
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27 | |
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28 | mpc55xx_linflex_context mpc55xx_linflex_devices [] = { |
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29 | { |
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30 | .regs = &LINFLEX0, |
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31 | .irq_rxi = MPC55XX_IRQ_LINFLEX_RXI(0), |
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32 | .irq_txi = MPC55XX_IRQ_LINFLEX_TXI(0), |
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33 | .irq_err = MPC55XX_IRQ_LINFLEX_ERR(0), |
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34 | .tx_pcr_register = &((SIU_tag *) &SIUL)->PCR18, |
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35 | .tx_pa_value = 1, |
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36 | .rx_pcr_register = &((SIU_tag *) &SIUL)->PCR19, |
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37 | .rx_psmi_register = &((SIU_tag *) &SIUL)->PSMI31, |
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38 | .rx_padsel_value = 0 |
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39 | }, { |
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40 | .regs = &LINFLEX1, |
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41 | .irq_rxi = MPC55XX_IRQ_LINFLEX_RXI(1), |
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42 | .irq_txi = MPC55XX_IRQ_LINFLEX_TXI(1), |
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43 | .irq_err = MPC55XX_IRQ_LINFLEX_ERR(1), |
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44 | .tx_pcr_register = &((SIU_tag *) &SIUL)->PCR94, |
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45 | .tx_pa_value = 1, |
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46 | .rx_pcr_register = &((SIU_tag *) &SIUL)->PCR95, |
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47 | .rx_psmi_register = &((SIU_tag *) &SIUL)->PSMI32, |
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48 | .rx_padsel_value = 2 |
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49 | } |
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50 | }; |
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51 | |
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52 | void enter_init_mode(volatile LINFLEX_tag *regs) |
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53 | { |
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54 | LINFLEX_LINCR1_32B_tag cr1 = { .R = regs->LINCR1.R }; |
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55 | cr1.B.SLEEP = 0; |
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56 | cr1.B.INIT = 1; |
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57 | regs->LINCR1.R = cr1.R; |
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58 | } |
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59 | |
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60 | void enter_active_mode(volatile LINFLEX_tag *regs) |
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61 | { |
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62 | LINFLEX_LINCR1_32B_tag cr1 = { .R = regs->LINCR1.R }; |
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63 | cr1.B.SLEEP = 0; |
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64 | cr1.B.INIT = 0; |
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65 | regs->LINCR1.R = cr1.R; |
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66 | } |
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67 | |
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68 | void enter_sleep_mode(volatile LINFLEX_tag *regs) |
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69 | { |
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70 | LINFLEX_LINCR1_32B_tag cr1 = { .R = regs->LINCR1.R }; |
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71 | cr1.B.SLEEP = 1; |
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72 | cr1.B.INIT = 0; |
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73 | regs->LINCR1.R = cr1.R; |
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74 | } |
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75 | |
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76 | static void mpc55xx_linflex_poll_write(int minor, char c) |
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77 | { |
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78 | mpc55xx_linflex_context *self = console_generic_get_context(minor); |
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79 | volatile LINFLEX_tag *regs = self->regs; |
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80 | const LINFLEX_UARTSR_32B_tag clear_dtf = { .B = { .DTF_TFF = 1 } }; |
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81 | rtems_interrupt_level level; |
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82 | bool done = false; |
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83 | bool wait_for_transmit_done = false; |
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84 | |
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85 | rtems_interrupt_disable(level); |
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86 | if (self->transmit_nest_level == 0) { |
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87 | LINFLEX_LINIER_32B_tag ier = { .R = regs->LINIER.R }; |
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88 | |
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89 | if (ier.B.DTIE != 0) { |
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90 | ier.B.DTIE = 0; |
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91 | regs->LINIER.R = ier.R; |
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92 | wait_for_transmit_done = !self->transmit_in_progress; |
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93 | self->transmit_nest_level = 1; |
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94 | } |
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95 | } else { |
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96 | ++self->transmit_nest_level; |
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97 | } |
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98 | rtems_interrupt_enable(level); |
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99 | |
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100 | while (!done) { |
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101 | rtems_interrupt_disable(level); |
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102 | bool tx = self->transmit_in_progress; |
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103 | if (!tx || (tx && regs->UARTSR.B.DTF_TFF)) { |
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104 | regs->UARTSR.R = clear_dtf.R; |
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105 | regs->BDRL.B.DATA0 = c; |
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106 | self->transmit_in_progress = true; |
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107 | done = true; |
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108 | } |
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109 | rtems_interrupt_enable(level); |
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110 | } |
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111 | |
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112 | done = false; |
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113 | while (!done) { |
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114 | rtems_interrupt_disable(level); |
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115 | if (wait_for_transmit_done) { |
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116 | if (regs->UARTSR.B.DTF_TFF) { |
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117 | regs->UARTSR.R = clear_dtf.R; |
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118 | self->transmit_in_progress = false; |
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119 | done = true; |
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120 | } |
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121 | } else { |
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122 | done = true; |
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123 | } |
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124 | |
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125 | if (done && self->transmit_nest_level > 0) { |
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126 | --self->transmit_nest_level; |
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127 | |
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128 | if (self->transmit_nest_level == 0) { |
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129 | LINFLEX_LINIER_32B_tag ier = { .R = regs->LINIER.R }; |
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130 | |
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131 | ier.B.DTIE = 1; |
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132 | regs->LINIER.R = ier.R; |
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133 | } |
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134 | } |
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135 | rtems_interrupt_enable(level); |
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136 | } |
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137 | } |
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138 | |
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139 | static void mpc55xx_linflex_rx_interrupt_handler(void *arg) |
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140 | { |
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141 | mpc55xx_linflex_context *self = arg; |
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142 | volatile LINFLEX_tag *regs = self->regs; |
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143 | char c = regs->BDRM.B.DATA4; |
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144 | const LINFLEX_UARTSR_32B_tag clear_flags = { .B = { .RMB = 1, .DRF_RFE = 1 } }; |
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145 | |
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146 | regs->UARTSR.R = clear_flags.R; |
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147 | |
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148 | rtems_termios_enqueue_raw_characters(self->tty, &c, 1); |
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149 | } |
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150 | |
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151 | static void mpc55xx_linflex_tx_interrupt_handler(void *arg) |
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152 | { |
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153 | mpc55xx_linflex_context *self = arg; |
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154 | volatile LINFLEX_tag *regs = self->regs; |
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155 | |
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156 | regs->UARTSR.B.DTF_TFF = 1; /* clear flag */ |
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157 | self->transmit_in_progress = false; |
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158 | |
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159 | rtems_termios_dequeue_characters(self->tty, 1); |
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160 | } |
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161 | |
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162 | /* |
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163 | static void mpc55xx_linflex_err_interrupt_handler(void *arg) |
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164 | { |
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165 | mpc55xx_linflex_context *self = arg; |
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166 | } |
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167 | */ |
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168 | |
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169 | static int mpc55xx_linflex_set_attributes(int minor, const struct termios *t) |
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170 | { |
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171 | mpc55xx_linflex_context *self = console_generic_get_context(minor); |
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172 | volatile LINFLEX_tag *regs = self->regs; |
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173 | LINFLEX_UARTCR_32B_tag uartcr = { .R = 0 }; |
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174 | LINFLEX_GCR_32B_tag gcr = { .R = 0 }; |
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175 | LINFLEX_LINIER_32B_tag ier = { .R = 0 }; |
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176 | rtems_termios_baud_t br = rtems_termios_baud_to_number(t->c_cflag); |
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177 | LINFLEX_LINFBRR_32B_tag fbrr = { .R = 0 }; |
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178 | LINFLEX_LINIBRR_32B_tag ibrr = { .R = 0 }; |
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179 | |
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180 | enter_init_mode(regs); |
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181 | |
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182 | /* Set to UART-mode */ |
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183 | uartcr.B.UART = 1; |
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184 | regs->UARTCR.R = uartcr.R; |
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185 | |
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186 | /* Set to buffer mode with size 1 */ |
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187 | uartcr.B.TDFL_TFC = 0; |
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188 | uartcr.B.RDFL_RFC0 = 0; |
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189 | uartcr.B.RFBM = 0; |
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190 | uartcr.B.TFBM = 0; |
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191 | |
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192 | /* Enable receiver and transmitter */ |
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193 | uartcr.B.RXEN = 1; |
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194 | uartcr.B.TXEN = 1; |
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195 | |
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196 | /* Number of data bits */ |
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197 | uartcr.B.WL1 = 0; |
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198 | if ((t->c_cflag & CSIZE) == CS8) { |
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199 | uartcr.B.WL0 = 1; |
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200 | } else if ((t->c_cflag & CSIZE) == CS7) { |
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201 | uartcr.B.WL0 = 0; |
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202 | } else { |
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203 | return -1; |
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204 | } |
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205 | |
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206 | /* Parity */ |
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207 | uartcr.B.PCE = (t->c_cflag & PARENB) ? 1 : 0; |
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208 | uartcr.B.PC1 = 0; |
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209 | uartcr.B.PC0 = (t->c_cflag & PARODD) ? 1 : 0; |
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210 | |
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211 | /* Stop bits */ |
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212 | gcr.B.STOP = (t->c_cflag & CSTOPB) ? 1 : 0; |
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213 | |
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214 | /* Set control registers */ |
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215 | regs->UARTCR.R = uartcr.R; |
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216 | regs->GCR.R = gcr.R; |
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217 | |
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218 | /* Interrupts */ |
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219 | ier.B.DTIE = 1; |
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220 | ier.B.DRIE = 1; |
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221 | regs->LINIER.R = ier.R; |
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222 | |
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223 | /* Baud rate */ |
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224 | if (br > 0) { |
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225 | uint32_t lfdiv_mult_32 = bsp_clock_speed * 2 / br; |
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226 | if((lfdiv_mult_32 & 0x1) != 0) { |
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227 | ++lfdiv_mult_32; |
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228 | } |
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229 | fbrr.B.FBR = (lfdiv_mult_32 >> 1) & 0xF; |
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230 | ibrr.B.IBR = lfdiv_mult_32 >> 5; |
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231 | } else { |
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232 | return -1; |
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233 | } |
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234 | regs->LINFBRR.R = fbrr.R; |
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235 | regs->LINIBRR.R = ibrr.R; |
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236 | |
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237 | enter_active_mode(regs); |
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238 | |
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239 | return 0; |
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240 | } |
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241 | |
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242 | static int mpc55xx_linflex_first_open(int major, int minor, void *arg) |
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243 | { |
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244 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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245 | int rv = 0; |
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246 | mpc55xx_linflex_context *self = console_generic_get_context(minor); |
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247 | struct rtems_termios_tty *tty = console_generic_get_tty_at_open(arg); |
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248 | SIU_PCR_tag pcr = { .R = 0 }; |
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249 | SIUL_PSMI_8B_tag psmi = { .R = 0 }; |
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250 | |
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251 | self->tty = tty; |
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252 | |
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253 | pcr.B.IBE = 1; |
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254 | self->rx_pcr_register->R = pcr.R; |
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255 | psmi.B.PADSEL = self->rx_padsel_value; |
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256 | self->rx_psmi_register->R = psmi.R; |
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257 | pcr.R = 0; |
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258 | pcr.B.OBE = 1; |
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259 | pcr.B.PA = self->tx_pa_value; |
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260 | self->tx_pcr_register->R = pcr.R; |
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261 | |
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262 | rv = rtems_termios_set_initial_baud(tty, 115200); |
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263 | if (rv != 0) { |
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264 | rtems_fatal_error_occurred(0xdeadbeef); |
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265 | } |
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266 | |
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267 | rv = mpc55xx_linflex_set_attributes(minor, &tty->termios); |
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268 | if (rv != 0) { |
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269 | rtems_fatal_error_occurred(0xdeadbeef); |
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270 | } |
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271 | |
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272 | sc = mpc55xx_interrupt_handler_install( |
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273 | self->irq_rxi, |
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274 | "LINFlexD RXI", |
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275 | RTEMS_INTERRUPT_UNIQUE, |
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276 | MPC55XX_INTC_DEFAULT_PRIORITY, |
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277 | mpc55xx_linflex_rx_interrupt_handler, |
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278 | self |
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279 | ); |
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280 | if (sc != RTEMS_SUCCESSFUL) { |
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281 | rtems_fatal_error_occurred(0xdeadbeef); |
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282 | } |
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283 | |
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284 | sc = mpc55xx_interrupt_handler_install( |
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285 | self->irq_txi, |
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286 | "LINFlexD TXI", |
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287 | RTEMS_INTERRUPT_UNIQUE, |
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288 | MPC55XX_INTC_DEFAULT_PRIORITY, |
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289 | mpc55xx_linflex_tx_interrupt_handler, |
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290 | self |
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291 | ); |
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292 | if (sc != RTEMS_SUCCESSFUL) { |
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293 | rtems_fatal_error_occurred(0xdeadbeef); |
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294 | } |
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295 | |
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296 | /* |
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297 | sc = mpc55xx_interrupt_handler_install( |
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298 | self->irq_err, |
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299 | "LINFlexD ERR", |
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300 | RTEMS_INTERRUPT_UNIQUE, |
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301 | MPC55XX_INTC_DEFAULT_PRIORITY, |
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302 | mpc55xx_linflex_err_interrupt_handler, |
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303 | self |
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304 | ); |
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305 | if (sc != RTEMS_SUCCESSFUL) { |
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306 | rtems_fatal_error_occurred(0xdeadbeef); |
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307 | } |
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308 | */ |
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309 | |
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310 | return 0; |
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311 | } |
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312 | |
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313 | static int mpc55xx_linflex_last_close(int major, int minor, void* arg) |
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314 | { |
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315 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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316 | mpc55xx_linflex_context *self = console_generic_get_context(minor); |
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317 | volatile LINFLEX_tag *regs = self->regs; |
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318 | SIU_PCR_tag pcr = { .R = 0 }; |
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319 | SIUL_PSMI_8B_tag psmi = { .R = 0 }; |
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320 | |
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321 | /* enter initialization mode */ |
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322 | enter_init_mode(regs); |
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323 | |
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324 | /* disable interrupts */ |
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325 | regs->LINIER.R = 0; |
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326 | |
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327 | /* set module to sleep mode */ |
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328 | enter_sleep_mode(regs); |
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329 | |
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330 | sc = rtems_interrupt_handler_remove( |
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331 | self->irq_rxi, |
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332 | mpc55xx_linflex_rx_interrupt_handler, |
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333 | self |
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334 | ); |
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335 | if (sc != RTEMS_SUCCESSFUL) { |
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336 | rtems_fatal_error_occurred(0xdeadbeef); |
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337 | } |
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338 | |
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339 | sc = rtems_interrupt_handler_remove( |
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340 | self->irq_txi, |
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341 | mpc55xx_linflex_tx_interrupt_handler, |
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342 | self |
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343 | ); |
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344 | if (sc != RTEMS_SUCCESSFUL) { |
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345 | rtems_fatal_error_occurred(0xdeadbeef); |
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346 | } |
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347 | |
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348 | /* |
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349 | sc = rtems_interrupt_handler_remove( |
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350 | self->irq_err, |
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351 | mpc55xx_linflex_err_interrupt_handler, |
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352 | self |
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353 | ); |
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354 | if (sc != RTEMS_SUCCESSFUL) { |
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355 | rtems_fatal_error_occurred(0xdeadbeef); |
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356 | } |
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357 | */ |
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358 | |
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359 | pcr.B.IBE = 1; |
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360 | self->rx_pcr_register->R = pcr.R; |
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361 | self->tx_pcr_register->R = pcr.R; |
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362 | psmi.R = 0; |
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363 | self->rx_psmi_register->R = psmi.R; |
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364 | |
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365 | self->tty = NULL; |
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366 | |
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367 | return 0; |
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368 | } |
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369 | |
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370 | static int mpc55xx_linflex_poll_read(int minor) |
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371 | { |
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372 | mpc55xx_linflex_context *self = console_generic_get_context(minor); |
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373 | volatile LINFLEX_tag *regs = self->regs; |
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374 | rtems_interrupt_level level; |
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375 | int c = -1; |
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376 | |
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377 | rtems_interrupt_disable(level); |
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378 | if (regs->UARTSR.B.DRF_RFE != 0) { |
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379 | /* Clear flag */ |
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380 | regs->UARTSR.B.DRF_RFE = 1; |
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381 | |
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382 | /* Read */ |
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383 | c = regs->BDRM.B.DATA4; |
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384 | } |
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385 | rtems_interrupt_enable(level); |
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386 | |
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387 | return c; |
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388 | } |
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389 | |
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390 | static int mpc55xx_linflex_write(int minor, const char *out, size_t n) |
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391 | { |
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392 | mpc55xx_linflex_context *self = console_generic_get_context(minor); |
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393 | volatile LINFLEX_tag *regs = self->regs; |
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394 | rtems_interrupt_level level; |
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395 | |
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396 | rtems_interrupt_disable(level); |
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397 | |
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398 | regs->BDRL.B.DATA0 = out [0]; |
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399 | self->transmit_in_progress = true; |
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400 | /* TODO: send more then one byte */ |
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401 | |
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402 | rtems_interrupt_enable(level); |
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403 | |
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404 | return 0; |
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405 | } |
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406 | |
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407 | const console_generic_callbacks mpc55xx_linflex_callbacks = { |
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408 | .termios_callbacks = { |
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409 | .firstOpen = mpc55xx_linflex_first_open, |
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410 | .lastClose = mpc55xx_linflex_last_close, |
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411 | .write = mpc55xx_linflex_write, |
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412 | .setAttributes = mpc55xx_linflex_set_attributes, |
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413 | .outputUsesInterrupts = TERMIOS_IRQ_DRIVEN |
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414 | }, |
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415 | .poll_read = mpc55xx_linflex_poll_read, |
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416 | .poll_write = mpc55xx_linflex_poll_write |
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417 | }; |
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418 | |
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419 | #endif /* MPC55XX_HAS_LINFLEX */ |
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