1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup mpc55xx |
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5 | * |
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6 | * @brief Clock driver configuration. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2009 |
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11 | * embedded brains GmbH |
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12 | * Obere Lagerstr. 30 |
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13 | * D-82178 Puchheim |
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14 | * Germany |
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15 | * <rtems@embedded-brains.de> |
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16 | * |
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17 | * The license and distribution terms for this file may be |
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18 | * found in the file LICENSE in this distribution or at |
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19 | * http://www.rtems.com/license/LICENSE. |
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20 | */ |
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21 | |
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22 | #include <mpc55xx/regs.h> |
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23 | #include <mpc55xx/emios.h> |
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24 | |
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25 | #include <rtems.h> |
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26 | |
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27 | #include <bsp.h> |
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28 | #include <bsp/irq.h> |
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29 | |
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30 | #define RTEMS_STATUS_CHECKS_USE_PRINTK |
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31 | |
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32 | #include <rtems/status-checks.h> |
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33 | |
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34 | #define MPC55XX_CLOCK_EMIOS_CHANNEL (MPC55XX_EMIOS_CHANNEL_NUMBER - 1) |
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35 | |
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36 | /* This is defined in clockdrv_shell.h */ |
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37 | rtems_isr Clock_isr( rtems_vector_number vector); |
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38 | |
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39 | #define Clock_driver_support_at_tick() \ |
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40 | do { \ |
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41 | union EMIOS_CSR_tag csr = MPC55XX_ZERO_FLAGS; \ |
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42 | csr.B.FLAG = 1; \ |
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43 | EMIOS.CH [MPC55XX_CLOCK_EMIOS_CHANNEL].CSR.R = csr.R; \ |
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44 | } while (0) |
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45 | |
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46 | static void mpc55xx_clock_handler_install( void) |
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47 | { |
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48 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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49 | |
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50 | sc = mpc55xx_interrupt_handler_install( |
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51 | MPC55XX_IRQ_EMIOS_GET_REQUEST( MPC55XX_CLOCK_EMIOS_CHANNEL), |
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52 | "clock", |
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53 | RTEMS_INTERRUPT_UNIQUE, |
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54 | MPC55XX_INTC_MIN_PRIORITY, |
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55 | (rtems_interrupt_handler) Clock_isr, |
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56 | NULL |
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57 | ); |
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58 | RTEMS_CHECK_SC_VOID( sc, "install clock interrupt handler"); |
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59 | } |
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60 | |
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61 | static void mpc55xx_clock_initialize( void) |
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62 | { |
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63 | volatile struct EMIOS_CH_tag *regs = &EMIOS.CH [MPC55XX_CLOCK_EMIOS_CHANNEL]; |
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64 | union EMIOS_CCR_tag ccr = MPC55XX_ZERO_FLAGS; |
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65 | union EMIOS_CSR_tag csr = MPC55XX_ZERO_FLAGS; |
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66 | unsigned prescaler = mpc55xx_emios_global_prescaler(); |
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67 | uint64_t interval = ((uint64_t) bsp_clock_speed |
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68 | * (uint64_t) rtems_configuration_get_microseconds_per_tick()) / 1000000; |
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69 | |
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70 | /* Apply prescaler */ |
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71 | if (prescaler > 0) { |
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72 | interval /= (uint64_t) prescaler; |
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73 | } else { |
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74 | RTEMS_SYSLOG_ERROR( "unexpected global eMIOS prescaler\n"); |
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75 | } |
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76 | |
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77 | /* Check interval */ |
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78 | if (interval == 0 || interval > MPC55XX_EMIOS_VALUE_MAX) { |
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79 | interval = MPC55XX_EMIOS_VALUE_MAX; |
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80 | RTEMS_SYSLOG_ERROR( "clock timer interval out of range\n"); |
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81 | } |
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82 | |
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83 | /* Configure eMIOS channel */ |
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84 | |
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85 | /* Set channel in GPIO mode */ |
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86 | ccr.B.MODE = MPC55XX_EMIOS_MODE_GPIO_INPUT; |
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87 | regs->CCR.R = ccr.R; |
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88 | |
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89 | /* Clear status flags */ |
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90 | csr.B.OVR = 1; |
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91 | csr.B.OVFL = 1; |
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92 | csr.B.FLAG = 1; |
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93 | regs->CSR.R = csr.R; |
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94 | |
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95 | /* Set timer period */ |
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96 | regs->CADR.R = (uint32_t) interval - 1; |
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97 | |
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98 | /* Set unused registers */ |
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99 | regs->CBDR.R = 0; |
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100 | regs->CCNTR.R = 0; |
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101 | regs->ALTCADR.R = 0; |
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102 | |
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103 | /* Set control register */ |
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104 | ccr.B.MODE = MPC55XX_EMIOS_MODE_MC_UP_INT_CLK; |
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105 | ccr.B.UCPREN = 1; |
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106 | ccr.B.FEN = 1; |
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107 | ccr.B.FREN = 1; |
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108 | regs->CCR.R = ccr.R; |
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109 | } |
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110 | |
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111 | static void mpc55xx_clock_cleanup( void) |
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112 | { |
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113 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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114 | volatile struct EMIOS_CH_tag *regs = &EMIOS.CH [MPC55XX_CLOCK_EMIOS_CHANNEL]; |
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115 | union EMIOS_CCR_tag ccr = MPC55XX_ZERO_FLAGS; |
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116 | |
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117 | /* Set channel in GPIO mode */ |
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118 | ccr.B.MODE = MPC55XX_EMIOS_MODE_GPIO_INPUT; |
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119 | regs->CCR.R = ccr.R; |
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120 | |
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121 | /* Remove interrupt handler */ |
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122 | sc = rtems_interrupt_handler_remove( |
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123 | MPC55XX_IRQ_EMIOS_GET_REQUEST( MPC55XX_CLOCK_EMIOS_CHANNEL), |
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124 | (rtems_interrupt_handler) Clock_isr, |
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125 | NULL |
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126 | ); |
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127 | RTEMS_CHECK_SC_VOID( sc, "remove clock interrupt handler"); |
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128 | } |
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129 | |
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130 | static uint32_t mpc55xx_clock_nanoseconds_since_last_tick( void) |
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131 | { |
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132 | uint64_t clicks = EMIOS.CH [MPC55XX_CLOCK_EMIOS_CHANNEL].CCNTR.R; |
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133 | uint64_t clock = bsp_clock_speed; |
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134 | uint64_t ns = (clicks * 1000000000) / clock; |
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135 | |
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136 | return (uint32_t) ns; |
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137 | } |
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138 | |
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139 | #define Clock_driver_support_initialize_hardware() mpc55xx_clock_initialize() |
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140 | |
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141 | #define Clock_driver_support_install_isr( isr, old_isr) \ |
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142 | mpc55xx_clock_handler_install() |
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143 | |
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144 | #define Clock_driver_support_shutdown_hardware() mpc55xx_clock_cleanup() |
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145 | |
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146 | #define Clock_driver_nanoseconds_since_last_tick \ |
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147 | mpc55xx_clock_nanoseconds_since_last_tick |
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148 | |
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149 | /* Include shared source clock driver code */ |
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150 | #include "../../../../libbsp/shared/clockdrv_shell.h" |
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