source: rtems/c/src/lib/libbsp/powerpc/motorola_powerpc/residual/residual.h @ e1d8abb

4.104.114.84.95
Last change on this file since e1d8abb was fcee56c0, checked in by Joel Sherrill <joel.sherrill@…>, on 07/01/99 at 23:39:13

Patch from Eric Valette <valette@…> to clean up the
previous submission.
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File size: 14.6 KB
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1/* 7/18/95                                                                    */
2/*----------------------------------------------------------------------------*/
3/*      Residual Data header definitions and prototypes                       */
4/*----------------------------------------------------------------------------*/
5
6/* Structure map for RESIDUAL on PowerPC Reference Platform                   */
7/* residual.h - Residual data structure passed in r3.                         */
8/*              Load point passed in r4 to boot image.                        */
9/* For enum's: if given in hex then they are bit significant,                 */
10/*             i.e. only one bit is on for each enum                          */
11/* Reserved fields must be filled with zeros.                                */
12
13/*
14 * $Id$
15 */
16
17#ifndef _RESIDUAL_
18#define _RESIDUAL_
19
20#ifndef ASM
21
22#define MAX_CPUS 32                     /* These should be set to the maximum */
23#define MAX_MEMS 64                     /* number possible for this system.   */
24#define MAX_DEVICES 256                 /* Changing these will change the     */
25#define AVE_PNP_SIZE 32                 /* structure, hence the version of    */
26#define MAX_MEM_SEGS 64                 /* this header file.                  */
27
28/*----------------------------------------------------------------------------*/
29/*               Public structures...                                         */
30/*----------------------------------------------------------------------------*/
31
32#include "pnp.h"
33
34typedef enum _L1CACHE_TYPE {
35  NoneCAC = 0,
36  SplitCAC = 1,
37  CombinedCAC = 2
38  } L1CACHE_TYPE;
39
40typedef enum _TLB_TYPE {
41  NoneTLB = 0,
42  SplitTLB = 1,
43  CombinedTLB = 2
44  } TLB_TYPE;
45
46typedef enum _FIRMWARE_SUPPORT {
47  Conventional = 0x01,
48  OpenFirmware = 0x02,
49  Diagnostics = 0x04,
50  LowDebug = 0x08,
51  Multiboot = 0x10,
52  LowClient = 0x20,
53  Hex41 = 0x40,
54  FAT = 0x80,
55  ISO9660 = 0x0100,
56  SCSI_InitiatorID_Override = 0x0200,
57  Tape_Boot = 0x0400,
58  FW_Boot_Path = 0x0800
59  } FIRMWARE_SUPPORT;
60
61typedef enum _FIRMWARE_SUPPLIERS {
62  IBMFirmware = 0x00,
63  MotoFirmware = 0x01,                  /* 7/18/95                            */
64  FirmWorks = 0x02,                     /* 10/5/95                            */
65  Bull = 0x03,                          /* 04/03/96                           */
66  } FIRMWARE_SUPPLIERS;
67
68typedef enum _ENDIAN_SWITCH_METHODS {
69  UsePort92 = 0x01,
70  UsePCIConfigA8 = 0x02,
71  UseFF001030 = 0x03,
72  } ENDIAN_SWITCH_METHODS;
73
74typedef enum _SPREAD_IO_METHODS {
75  UsePort850 = 0x00,
76/*UsePCIConfigA8 = 0x02,*/
77  } SPREAD_IO_METHODS;
78
79typedef struct _VPD {
80
81  /* Box dependent stuff */
82  unsigned char PrintableModel[32];     /* Null terminated string.
83                                           Must be of the form:
84                                           vvv,<20h>,<model designation>,<0x0>
85                                           where vvv is the vendor ID
86                                           e.g. IBM PPS MODEL 6015<0x0>       */
87  unsigned char Serial[16];             /* 12/94:
88                                           Serial Number; must be of the form:
89                                           vvv<serial number> where vvv is the
90                                           vendor ID.
91                                           e.g. IBM60151234567<20h><20h>      */
92  unsigned char Reserved[48];
93  unsigned long FirmwareSupplier;       /* See FirmwareSuppliers enum         */
94  unsigned long FirmwareSupports;       /* See FirmwareSupport enum           */
95  unsigned long NvramSize;              /* Size of nvram in bytes             */
96  unsigned long NumSIMMSlots;
97  unsigned short EndianSwitchMethod;    /* See EndianSwitchMethods enum       */
98  unsigned short SpreadIOMethod;        /* See SpreadIOMethods enum           */
99  unsigned long SmpIar;
100  unsigned long RAMErrLogOffset;        /* Heap offset to error log           */
101  unsigned long Reserved5;
102  unsigned long Reserved6;
103  unsigned long ProcessorHz;            /* Processor clock frequency in Hertz */
104  unsigned long ProcessorBusHz;         /* Processor bus clock frequency      */
105  unsigned long Reserved7;
106  unsigned long TimeBaseDivisor;        /* (Bus clocks per timebase tic)*1000 */
107  unsigned long WordWidth;              /* Word width in bits                 */
108  unsigned long PageSize;               /* Page size in bytes                 */
109  unsigned long CoherenceBlockSize;     /* Unit of transfer in/out of cache
110                                           for which coherency is maintained;
111                                           normally <= CacheLineSize.         */
112  unsigned long GranuleSize;            /* Unit of lock allocation to avoid   */
113                                        /*   false sharing of locks.          */
114
115  /* L1 Cache variables */
116  unsigned long CacheSize;              /* L1 Cache size in KB. This is the   */
117                                        /*   total size of the L1, whether    */
118                                        /*   combined or split                */
119  unsigned long CacheAttrib;            /* L1CACHE_TYPE                       */
120  unsigned long CacheAssoc;             /* L1 Cache associativity. Use this
121                                           for combined cache. If split, put
122                                           zeros here.                        */
123  unsigned long CacheLineSize;          /* L1 Cache line size in bytes. Use
124                                           for combined cache. If split, put
125                                           zeros here.                        */
126  /* For split L1 Cache: (= combined if combined cache) */
127  unsigned long I_CacheSize;
128  unsigned long I_CacheAssoc;
129  unsigned long I_CacheLineSize;
130  unsigned long D_CacheSize;
131  unsigned long D_CacheAssoc;
132  unsigned long D_CacheLineSize;
133
134  /* Translation Lookaside Buffer variables */
135  unsigned long TLBSize;                /* Total number of TLBs on the system */
136  unsigned long TLBAttrib;              /* Combined I+D or split TLB          */
137  unsigned long TLBAssoc;               /* TLB Associativity. Use this for
138                                           combined TLB. If split, put zeros
139                                           here.                              */
140  /* For split TLB: (= combined if combined TLB) */
141  unsigned long I_TLBSize;
142  unsigned long I_TLBAssoc;
143  unsigned long D_TLBSize;
144  unsigned long D_TLBAssoc;
145
146  unsigned long ExtendedVPD;            /* Offset to extended VPD area;
147                                           null if unused                     */
148  } VPD;
149
150typedef enum _DEVICE_FLAGS {
151  Enabled = 0x4000,                     /* 1 - PCI device is enabled          */
152  Integrated = 0x2000,
153  Failed = 0x1000,                      /* 1 - device failed POST code tests  */
154  Static = 0x0800,                      /* 0 - dynamically configurable
155                                           1 - static                         */
156  Dock = 0x0400,                        /* 0 - not a docking station device
157                                           1 - is a docking station device    */
158  Boot = 0x0200,                        /* 0 - device cannot be used for BOOT
159                                           1 - can be a BOOT device           */
160  Configurable = 0x0100,                /* 1 - device is configurable         */
161  Disableable = 0x80,                   /* 1 - device can be disabled         */
162  PowerManaged = 0x40,                  /* 0 - not managed; 1 - managed       */
163  ReadOnly = 0x20,                      /* 1 - device is read only            */
164  Removable = 0x10,                     /* 1 - device is removable            */
165  ConsoleIn = 0x08,
166  ConsoleOut = 0x04,
167  Input = 0x02,
168  Output = 0x01
169  } DEVICE_FLAGS;
170
171typedef enum _BUS_ID {
172  ISADEVICE = 0x01,
173  EISADEVICE = 0x02,
174  PCIDEVICE = 0x04,
175  PCMCIADEVICE = 0x08,
176  PNPISADEVICE = 0x10,
177  MCADEVICE = 0x20,
178  MXDEVICE = 0x40,                      /* Devices on mezzanine bus           */
179  PROCESSORDEVICE = 0x80,               /* Devices on processor bus           */
180  VMEDEVICE = 0x100,
181  } BUS_ID;
182
183typedef struct _DEVICE_ID {
184  unsigned long BusId;                  /* See BUS_ID enum above              */
185  unsigned long DevId;                  /* Big Endian format                  */
186  unsigned long SerialNum;              /* For multiple usage of a single
187                                           DevId                              */
188  unsigned long Flags;                  /* See DEVICE_FLAGS enum above        */
189  unsigned char BaseType;               /* See pnp.h for bit definitions      */
190  unsigned char SubType;                /* See pnp.h for bit definitions      */
191  unsigned char Interface;              /* See pnp.h for bit definitions      */
192  unsigned char Spare;
193  } DEVICE_ID;
194
195typedef union _BUS_ACCESS {
196  struct _PnPAccess{
197    unsigned char CSN;
198    unsigned char LogicalDevNumber;
199    unsigned short ReadDataPort;
200    } PnPAccess;
201  struct _ISAAccess{
202    unsigned char SlotNumber;           /* ISA Slot Number generally not
203                                           available; 0 if unknown            */
204    unsigned char LogicalDevNumber;
205    unsigned short ISAReserved;
206    } ISAAccess;
207  struct _MCAAccess{
208    unsigned char SlotNumber;
209    unsigned char LogicalDevNumber;
210    unsigned short MCAReserved;
211    } MCAAccess;
212  struct _PCMCIAAccess{
213    unsigned char SlotNumber;
214    unsigned char LogicalDevNumber;
215    unsigned short PCMCIAReserved;
216    } PCMCIAAccess;
217  struct _EISAAccess{
218    unsigned char SlotNumber;
219    unsigned char FunctionNumber;
220    unsigned short EISAReserved;
221    } EISAAccess;
222  struct _PCIAccess{
223    unsigned char BusNumber;
224    unsigned char DevFuncNumber;
225    unsigned short PCIReserved;
226    } PCIAccess;
227  struct _ProcBusAccess{
228    unsigned char BusNumber;
229    unsigned char BUID;
230    unsigned short ProcBusReserved;
231    } ProcBusAccess;
232  } BUS_ACCESS;
233
234/* Per logical device information */
235typedef struct _PPC_DEVICE {
236  DEVICE_ID DeviceId;
237  BUS_ACCESS BusAccess;
238
239  /* The following three are offsets into the DevicePnPHeap */
240  /* All are in PnP compressed format                       */
241  unsigned long AllocatedOffset;        /* Allocated resource description     */
242  unsigned long PossibleOffset;         /* Possible resource description      */
243  unsigned long CompatibleOffset;       /* Compatible device identifiers      */
244  } PPC_DEVICE;
245
246typedef enum _CPU_STATE {
247  CPU_GOOD = 0,                         /* CPU is present, and active         */
248  CPU_GOOD_FW = 1,                      /* CPU is present, and in firmware    */
249  CPU_OFF = 2,                          /* CPU is present, but inactive       */
250  CPU_FAILED = 3,                       /* CPU is present, but failed POST    */
251  CPU_NOT_PRESENT = 255                 /* CPU not present                    */
252  } CPU_STATE;
253
254typedef struct _PPC_CPU {
255  unsigned long CpuType;                /* Result of mfspr from Processor
256                                           Version Register (PVR).
257                                           PVR(0-15) = Version (e.g. 601)
258                                           PVR(16-31 = EC Level               */
259  unsigned char CpuNumber;              /* CPU Number for this processor      */
260  unsigned char CpuState;               /* CPU State, see CPU_STATE enum      */
261  unsigned short Reserved;
262  } PPC_CPU;
263
264typedef struct _PPC_MEM {
265  unsigned long SIMMSize;               /* 0 - absent or bad
266                                           8M, 32M (in MB)                    */
267  } PPC_MEM;
268
269typedef enum _MEM_USAGE {
270  Other = 0x8000,
271  ResumeBlock = 0x4000,                 /* for use by power management        */
272  SystemROM = 0x2000,                   /* Flash memory (populated)           */
273  UnPopSystemROM = 0x1000,              /* Unpopulated part of SystemROM area */
274  IOMemory = 0x0800,
275  SystemIO = 0x0400,
276  SystemRegs = 0x0200,
277  PCIAddr = 0x0100,
278  PCIConfig = 0x80,
279  ISAAddr = 0x40,
280  Unpopulated = 0x20,                   /* Unpopulated part of System Memory  */
281  Free = 0x10,                          /* Free part of System Memory         */
282  BootImage = 0x08,                     /* BootImage part of System Memory    */
283  FirmwareCode = 0x04,                  /* FirmwareCode part of System Memory */
284  FirmwareHeap = 0x02,                  /* FirmwareHeap part of System Memory */
285  FirmwareStack = 0x01                  /* FirmwareStack part of System Memory*/
286  } MEM_USAGE;
287
288typedef struct _MEM_MAP {
289  unsigned long Usage;                  /* See MEM_USAGE above                */
290  unsigned long BasePage;               /* Page number measured in 4KB pages  */
291  unsigned long PageCount;              /* Page count measured in 4KB pages   */
292  } MEM_MAP;
293
294typedef struct _RESIDUAL {
295  unsigned long ResidualLength;         /* Length of Residual                 */
296  unsigned char Version;                /* of this data structure             */
297  unsigned char Revision;               /* of this data structure             */
298  unsigned short EC;                    /* of this data structure             */
299  /* VPD */
300  VPD VitalProductData;
301  /* CPU */
302  unsigned short MaxNumCpus;            /* Max CPUs in this system            */
303  unsigned short ActualNumCpus;         /* ActualNumCpus < MaxNumCpus means   */
304                                        /* that there are unpopulated or      */
305                                        /* otherwise unusable cpu locations   */
306  PPC_CPU Cpus[MAX_CPUS];
307  /* Memory */
308  unsigned long TotalMemory;            /* Total amount of memory installed   */
309  unsigned long GoodMemory;             /* Total amount of good memory        */
310  unsigned long ActualNumMemSegs;
311  MEM_MAP Segs[MAX_MEM_SEGS];
312  unsigned long ActualNumMemories;
313  PPC_MEM Memories[MAX_MEMS];
314  /* Devices */
315  unsigned long ActualNumDevices;
316  PPC_DEVICE Devices[MAX_DEVICES];
317  unsigned char DevicePnPHeap[2*MAX_DEVICES*AVE_PNP_SIZE];
318  } RESIDUAL;
319
320#ifndef NULL
321#define NULL    0
322#endif
323
324extern RESIDUAL residualCopy;
325
326extern void print_residual_device_info(void);
327#ifndef __BOOT__
328extern PPC_DEVICE *residual_find_device(RESIDUAL *res, unsigned long BusMask,
329                                        unsigned char * DevID, int BaseType,
330                                        int SubType, int Interface, int n);
331#else
332extern PPC_DEVICE *residual_find_device(unsigned long BusMask,
333                                        unsigned char * DevID, int BaseType,
334                                        int SubType, int Interface, int n);
335#endif
336extern PnP_TAG_PACKET *PnP_find_packet(unsigned char *p, unsigned packet_tag,
337                                       int n);
338extern PnP_TAG_PACKET *PnP_find_small_vendor_packet(unsigned char *p,
339                                                    unsigned packet_type,
340                                                    int n);
341extern PnP_TAG_PACKET *PnP_find_large_vendor_packet(unsigned char *p,
342                                                    unsigned packet_type,
343                                                    int n);
344#endif /* ASM */
345#endif  /* ndef _RESIDUAL_ */
346
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