1 | /* irq_init.c |
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2 | * |
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3 | * This file contains the implementation of rtems initialization |
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4 | * related to interrupt handling. |
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5 | * |
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6 | * CopyRight (C) 1999 valette@crf.canon.fr |
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7 | * |
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8 | * The license and distribution terms for this file may be |
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9 | * found in the file LICENSE in this distribution or at |
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10 | * http://www.OARcorp.com/rtems/license.html. |
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11 | * |
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12 | * $Id$ |
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13 | */ |
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14 | #include <bsp/consoleIo.h> |
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15 | #include <libcpu/io.h> |
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16 | #include <libcpu/spr.h> |
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17 | #include <bsp/pci.h> |
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18 | #include <bsp/residual.h> |
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19 | #include <bsp/openpic.h> |
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20 | #include <bsp/irq.h> |
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21 | #include <bsp.h> |
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22 | #include <libcpu/raw_exception.h> |
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23 | |
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24 | typedef struct { |
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25 | unsigned char bus; /* few chance the PCI/ISA bridge is not on first bus but ... */ |
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26 | unsigned char device; |
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27 | unsigned char function; |
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28 | } pci_isa_bridge_device; |
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29 | |
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30 | pci_isa_bridge_device* via_82c586 = 0; |
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31 | static pci_isa_bridge_device bridge; |
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32 | |
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33 | extern unsigned int external_exception_vector_prolog_code_size; |
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34 | extern void external_exception_vector_prolog_code(); |
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35 | extern unsigned int decrementer_exception_vector_prolog_code_size; |
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36 | extern void decrementer_exception_vector_prolog_code(); |
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37 | |
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38 | /* |
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39 | * default on/off function |
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40 | */ |
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41 | static void nop_func(){} |
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42 | /* |
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43 | * default isOn function |
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44 | */ |
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45 | static int not_connected() {return 0;} |
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46 | /* |
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47 | * default possible isOn function |
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48 | */ |
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49 | static int connected() {return 1;} |
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50 | |
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51 | static rtems_irq_connect_data rtemsIrq[BSP_IRQ_NUMBER]; |
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52 | static rtems_irq_global_settings initial_config; |
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53 | static rtems_irq_connect_data defaultIrq = { |
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54 | /* vectorIdex, hdl , on , off , isOn */ |
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55 | 0, nop_func , nop_func , nop_func , not_connected |
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56 | }; |
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57 | static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={ |
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58 | /* |
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59 | * actual rpiorities for interrupt : |
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60 | * 0 means that only current interrupt is masked |
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61 | * 255 means all other interrupts are masked |
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62 | */ |
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63 | /* |
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64 | * ISA interrupts. |
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65 | * The second entry has a priority of 255 because |
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66 | * it is the slave pic entry and is should always remain |
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67 | * unmasked. |
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68 | */ |
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69 | 0,0, |
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70 | 255, |
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71 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
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72 | /* |
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73 | * PCI Interrupts |
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74 | */ |
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75 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* for raven prio 0 means unactive... */ |
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76 | /* |
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77 | * Processor exceptions handled as interrupts |
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78 | */ |
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79 | 0 |
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80 | }; |
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81 | |
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82 | static unsigned char mcp750_openpic_initsenses[] = { |
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83 | 1, /* MCP750_INT_PCB(8259) */ |
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84 | 0, /* MCP750_INT_FALCON_ECC_ERR */ |
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85 | 1, /* MCP750_INT_PCI_ETHERNET */ |
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86 | 1, /* MCP750_INT_PCI_PMC */ |
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87 | 1, /* MCP750_INT_PCI_WATCHDOG_TIMER1 */ |
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88 | 1, /* MCP750_INT_PCI_PRST_SIGNAL */ |
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89 | 1, /* MCP750_INT_PCI_FALL_SIGNAL */ |
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90 | 1, /* MCP750_INT_PCI_DEG_SIGNAL */ |
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91 | 1, /* MCP750_INT_PCI_BUS1_INTA */ |
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92 | 1, /* MCP750_INT_PCI_BUS1_INTB */ |
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93 | 1, /* MCP750_INT_PCI_BUS1_INTC */ |
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94 | 1, /* MCP750_INT_PCI_BUS1_INTD */ |
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95 | 1, /* MCP750_INT_PCI_BUS2_INTA */ |
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96 | 1, /* MCP750_INT_PCI_BUS2_INTB */ |
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97 | 1, /* MCP750_INT_PCI_BUS2_INTC */ |
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98 | 1, /* MCP750_INT_PCI_BUS2_INTD */ |
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99 | }; |
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100 | |
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101 | void isa_bridge_interrupts_setup(void) |
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102 | { |
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103 | pci_isa_bridge_device pci_dev; |
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104 | unsigned int temp; |
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105 | unsigned char tmp; |
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106 | unsigned char maxBus; |
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107 | unsigned found = 0; |
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108 | |
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109 | maxBus = BusCountPCI(); |
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110 | pci_dev.function = 0; /* Assumes the bidge is the first function */ |
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111 | |
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112 | for (pci_dev.bus = 0; pci_dev.bus < maxBus; pci_dev.bus++) { |
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113 | #ifdef SCAN_PCI_PRINT |
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114 | printk("isa_bridge_interrupts_setup: Scanning bus %d\n", pci_dev.bus); |
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115 | #endif |
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116 | for (pci_dev.device = 0; pci_dev.device < PCI_MAX_DEVICES; pci_dev.device++) { |
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117 | #ifdef SCAN_PCI_PRINT |
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118 | printk("isa_bridge_interrupts_setup: Scanning device %d\n", pci_dev.device); |
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119 | #endif |
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120 | pci_read_config_dword(pci_dev.bus, pci_dev.device, pci_dev.function, |
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121 | PCI_VENDOR_ID, &temp); |
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122 | #ifdef SCAN_PCI_PRINT |
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123 | printk("Vendor/device = %x\n", temp); |
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124 | #endif |
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125 | if ( (temp == (((unsigned short) PCI_VENDOR_ID_VIA) | (PCI_DEVICE_ID_VIA_82C586_1 << 16))) |
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126 | || |
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127 | (temp == (((unsigned short) PCI_VENDOR_ID_VIA) | (PCI_DEVICE_ID_VIA_82C586_0 << 16))) |
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128 | ) { |
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129 | bridge = pci_dev; |
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130 | via_82c586 = &bridge; |
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131 | /* |
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132 | * Should print : bus = 0, device = 11, function = 0 on a MCP750. |
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133 | */ |
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134 | printk("Via PCI/ISA bridge found at bus = %d, device = %d, function = %d\n", |
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135 | via_82c586->bus, |
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136 | via_82c586->device, |
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137 | via_82c586->function); |
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138 | found = 1; |
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139 | goto loop_exit; |
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140 | |
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141 | } |
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142 | } |
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143 | } |
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144 | loop_exit: |
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145 | if (!found) BSP_panic("VIA_82C586 PCI/ISA bridge not found!n"); |
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146 | |
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147 | tmp = inb(0x810); |
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148 | if ( !(tmp & 0x2)) { |
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149 | printk("This is a second generation MCP750 board\n"); |
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150 | printk("We must reprogram the PCI/ISA bridge...\n"); |
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151 | pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, |
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152 | 0x47, &tmp); |
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153 | printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp); |
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154 | /* |
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155 | * Enable 4D0/4D1 ISA interrupt level/edge config registers |
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156 | */ |
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157 | tmp |= 0x20; |
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158 | pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, |
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159 | 0x47, tmp); |
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160 | /* |
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161 | * Now program the ISA interrupt edge/level |
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162 | */ |
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163 | tmp = ELCRS_INT9_LVL | ELCRS_INT10_LVL | ELCRS_INT11_LVL; |
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164 | outb(tmp, ISA8259_S_ELCR); |
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165 | tmp = ELCRM_INT5_LVL; |
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166 | outb(tmp, ISA8259_M_ELCR);; |
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167 | /* |
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168 | * Set the Interrupt inputs to non-inverting level interrupt |
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169 | */ |
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170 | pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, |
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171 | 0x54, &tmp); |
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172 | printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp); |
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173 | tmp = 0; |
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174 | pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, |
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175 | 0x54, tmp); |
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176 | } |
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177 | else { |
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178 | printk("This is a first generation MCP750 board\n"); |
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179 | printk("We just show the actual value used by PCI/ISA bridge\n"); |
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180 | pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, |
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181 | 0x47, &tmp); |
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182 | printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp); |
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183 | /* |
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184 | * Enable 4D0/4D1 ISA interrupt level/edge config registers |
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185 | */ |
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186 | tmp |= 0x20; |
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187 | pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, |
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188 | 0x47, tmp); |
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189 | tmp = inb(ISA8259_S_ELCR); |
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190 | printk(" PCI ISA bridge slave edge/level control bit = %x\n", (unsigned) tmp); |
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191 | tmp = inb(ISA8259_M_ELCR);; |
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192 | printk(" PCI ISA bridge master edge/level control bit = %x\n", (unsigned) tmp); |
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193 | /* |
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194 | * Must disable the 4D0/4D1 ISA interrupt level/edge config registers |
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195 | * or the card will die a soon as we we will enable external interrupts |
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196 | */ |
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197 | pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, |
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198 | 0x47, &tmp); |
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199 | tmp &= ~(0x20); |
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200 | pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, |
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201 | 0x47, tmp); |
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202 | /* |
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203 | * Show the Interrupt inputs inverting/non-inverting level status |
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204 | */ |
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205 | pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, |
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206 | 0x54, &tmp); |
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207 | printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp); |
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208 | } |
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209 | } |
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210 | |
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211 | /* |
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212 | * This code assumes the exceptions management setup has already |
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213 | * been done. We just need to replace the exceptions that will |
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214 | * be handled like interrupt. On mcp750/mpc750 this means the |
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215 | * decrementer exception and the external exception. |
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216 | */ |
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217 | void BSP_rtems_irq_mng_init(unsigned cpuId) |
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218 | { |
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219 | rtems_raw_except_connect_data vectorDesc; |
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220 | int i; |
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221 | |
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222 | /* |
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223 | * First initialize the Interrupt management hardware |
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224 | */ |
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225 | OpenPIC_InitSenses = mcp750_openpic_initsenses; |
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226 | OpenPIC_NumInitSenses = sizeof(mcp750_openpic_initsenses) / sizeof(char); |
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227 | printk("Going to initialize raven interrupt controller (openpic compliant)\n"); |
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228 | openpic_init(1); |
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229 | printk("Going to initialize the PCI/ISA bridge IRQ related setting (VIA 82C586)\n"); |
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230 | isa_bridge_interrupts_setup(); |
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231 | printk("Going to initialize the ISA PC legacy IRQ management hardware\n"); |
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232 | BSP_i8259s_init(); |
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233 | /* |
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234 | * Initialize Rtems management interrupt table |
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235 | */ |
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236 | /* |
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237 | * re-init the rtemsIrq table |
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238 | */ |
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239 | for (i = 0; i < BSP_IRQ_NUMBER; i++) { |
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240 | rtemsIrq[i] = defaultIrq; |
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241 | rtemsIrq[i].name = i; |
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242 | } |
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243 | /* |
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244 | * Init initial Interrupt management config |
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245 | */ |
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246 | initial_config.irqNb = BSP_IRQ_NUMBER; |
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247 | initial_config.defaultEntry = defaultIrq; |
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248 | initial_config.irqHdlTbl = rtemsIrq; |
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249 | initial_config.irqBase = BSP_ASM_IRQ_VECTOR_BASE; |
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250 | initial_config.irqPrioTbl = irqPrioTable; |
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251 | |
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252 | if (!BSP_rtems_irq_mngt_set(&initial_config)) { |
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253 | /* |
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254 | * put something here that will show the failure... |
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255 | */ |
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256 | BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n"); |
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257 | } |
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258 | |
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259 | /* |
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260 | * We must connect the raw irq handler for the two |
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261 | * expected interrupt sources : decrementer and external interrupts. |
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262 | */ |
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263 | vectorDesc.exceptIndex = ASM_DEC_VECTOR; |
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264 | vectorDesc.hdl.vector = ASM_DEC_VECTOR; |
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265 | vectorDesc.hdl.raw_hdl = decrementer_exception_vector_prolog_code; |
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266 | vectorDesc.hdl.raw_hdl_size = (unsigned) &decrementer_exception_vector_prolog_code_size; |
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267 | vectorDesc.on = nop_func; |
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268 | vectorDesc.off = nop_func; |
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269 | vectorDesc.isOn = connected; |
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270 | if (!mpc60x_set_exception (&vectorDesc)) { |
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271 | BSP_panic("Unable to initialize RTEMS decrementer raw exception\n"); |
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272 | } |
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273 | vectorDesc.exceptIndex = ASM_EXT_VECTOR; |
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274 | vectorDesc.hdl.vector = ASM_EXT_VECTOR; |
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275 | vectorDesc.hdl.raw_hdl = external_exception_vector_prolog_code; |
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276 | vectorDesc.hdl.raw_hdl_size = (unsigned) &external_exception_vector_prolog_code_size; |
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277 | if (!mpc60x_set_exception (&vectorDesc)) { |
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278 | BSP_panic("Unable to initialize RTEMS external raw exception\n"); |
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279 | } |
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280 | printk("RTEMS IRQ management is now operationnal\n"); |
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281 | } |
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282 | |
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