source: rtems/c/src/lib/libbsp/powerpc/motorola_powerpc/include/tm27.h @ e327e69

4.115
Last change on this file since e327e69 was e327e69, checked in by Cynthia Rempel <cynt6007@…>, on 01/09/14 at 22:05:54

libbsp tm27.h: Add Doxygen file header to all tm27.h

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File size: 1.5 KB
Line 
1/*
2 * @file
3 * @ingroup powerpc_motorola_powerpc
4 * @brief Implementations for interrupt mechanisms for Time Test 27
5 */
6
7/*
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 */
12
13#ifndef _RTEMS_TMTEST27
14#error "This is an RTEMS internal file you must not include directly."
15#endif
16
17#ifndef __tm27_h
18#define __tm27_h
19
20/*
21 *  Stuff for Time Test 27
22 */
23
24#include <bsp/irq.h>
25
26#define MUST_WAIT_FOR_INTERRUPT 1
27
28void nullFunc() {}
29static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER,
30                                              0,
31                                              (rtems_irq_enable)nullFunc,
32                                              (rtems_irq_disable)nullFunc,
33                                              (rtems_irq_is_enabled) nullFunc};
34void Install_tm27_vector(void (*_handler)())
35{
36  clockIrqData.hdl = _handler;
37  if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
38        printk("Error installing clock interrupt handler!\n");
39        rtems_fatal_error_occurred(1);
40  }
41}
42
43#define Cause_tm27_intr()  \
44  do { \
45    uint32_t   _clicks = 8; \
46    __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
47  } while (0)
48
49#define Clear_tm27_intr() \
50  do { \
51    uint32_t   _clicks = 0xffffffff; \
52    __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
53  } while (0)
54
55#define Lower_tm27_intr() \
56  do { \
57    uint32_t   _msr = 0; \
58    _ISR_Set_level( 0 ); \
59    __asm__ volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
60    _msr |=  0x8002; \
61    __asm__ volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
62  } while (0)
63
64#endif
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