1 | /* |
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2 | * bsp.h -- contain BSP API definition. |
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3 | * |
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4 | * Copyright (C) 1999 Eric Valette. valette@crf.canon.fr |
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5 | * |
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6 | * The license and distribution terms for this file may be |
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7 | * found in found in the file LICENSE in this distribution or at |
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8 | * http://www.rtems.com/license/LICENSE. |
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9 | * |
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10 | * $Id$ |
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11 | */ |
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12 | #ifndef LIBBSP_POWERPC_MOTOROLA_SHARED_BSP_H |
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13 | #define LIBBSP_POWERPC_MOTOROLA_SHARED_BSP_H |
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14 | |
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15 | #include <bspopts.h> |
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16 | |
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17 | #include <rtems.h> |
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18 | #include <rtems/console.h> |
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19 | #include <libcpu/io.h> |
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20 | #include <rtems/clockdrv.h> |
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21 | #include <bsp/vectors.h> |
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22 | |
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23 | /* |
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24 | * confdefs.h overrides for this BSP: |
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25 | * - termios serial ports (defaults to 1) |
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26 | * - Interrupt stack space is not minimum if defined. |
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27 | */ |
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28 | |
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29 | #if !defined(mvme2100) |
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30 | #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 |
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31 | #endif |
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32 | |
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33 | #define CONFIGURE_INTERRUPT_STACK_MEMORY (16 * 1024) |
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34 | |
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35 | /* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */ |
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36 | #if defined(mvme2100) |
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37 | #define _IO_BASE CHRP_ISA_IO_BASE |
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38 | #define _ISA_MEM_BASE CHRP_ISA_MEM_BASE |
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39 | /* address of our ram on the PCI bus */ |
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40 | #define PCI_DRAM_OFFSET CHRP_PCI_DRAM_OFFSET |
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41 | #define PCI_MEM_BASE 0x80000000 |
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42 | #define PCI_MEM_BASE_ADJUSTMENT 0 |
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43 | |
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44 | #else |
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45 | #define _IO_BASE PREP_ISA_IO_BASE |
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46 | #define _ISA_MEM_BASE PREP_ISA_MEM_BASE |
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47 | /* address of our ram on the PCI bus */ |
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48 | #define PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET |
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49 | /* offset of pci memory as seen from the CPU */ |
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50 | #define PCI_MEM_BASE PREP_ISA_MEM_BASE |
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51 | #define PCI_MEM_BASE_ADJUSTMENT PREP_ISA_MEM_BASE |
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52 | #endif |
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53 | |
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54 | |
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55 | /* |
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56 | * Base address definitions for several devices |
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57 | * |
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58 | * MVME2100 is very similar but has fewer devices and uses on-CPU EPIC |
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59 | * implementation of OpenPIC controller. It also cannot be probed to |
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60 | * find out what it is which is VERY different from other Motorola boards. |
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61 | */ |
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62 | |
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63 | #if defined(mvme2100) |
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64 | #define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e10000) |
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65 | /* #define BSP_UART_IOBASE_COM1 (0xffe10000) */ |
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66 | #define BSP_OPEN_PIC_BASE_OFFSET 0x40000 |
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67 | |
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68 | #define MVME_HAS_DEC21140 |
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69 | #else |
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70 | #define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x3f8) |
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71 | #define BSP_UART_IOBASE_COM2 ((_IO_BASE)+0x2f8) |
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72 | |
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73 | #define BSP_KBD_IOBASE ((_IO_BASE)+0x60) |
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74 | #define BSP_VGA_IOBASE ((_IO_BASE)+0x3c0) |
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75 | |
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76 | #if defined(mvme2300) |
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77 | #define MVME_HAS_DEC21140 |
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78 | #endif |
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79 | #endif |
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80 | |
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81 | #define BSP_CONSOLE_PORT BSP_UART_COM1 |
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82 | #define BSP_UART_BAUD_BASE 115200 |
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83 | |
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84 | #include <bsp/openpic.h> |
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85 | #define BSP_PIC_DO_EOI openpic_eoi(0) |
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86 | |
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87 | #ifndef ASM |
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88 | #define outport_byte(port,value) outb(value,port) |
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89 | #define outport_word(port,value) outw(value,port) |
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90 | #define outport_long(port,value) outl(value,port) |
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91 | |
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92 | #define inport_byte(port,value) (value = inb(port)) |
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93 | #define inport_word(port,value) (value = inw(port)) |
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94 | #define inport_long(port,value) (value = inl(port)) |
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95 | |
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96 | /* |
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97 | * Vital Board data Start using DATA RESIDUAL |
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98 | */ |
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99 | |
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100 | /* |
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101 | * Total memory using RESIDUAL DATA |
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102 | */ |
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103 | extern unsigned int BSP_mem_size; |
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104 | /* |
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105 | * PCI Bus Frequency |
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106 | */ |
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107 | extern unsigned int BSP_bus_frequency; |
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108 | /* |
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109 | * processor clock frequency |
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110 | */ |
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111 | extern unsigned int BSP_processor_frequency; |
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112 | /* |
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113 | * Time base divisior (how many tick for 1 second). |
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114 | */ |
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115 | extern unsigned int BSP_time_base_divisor; |
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116 | |
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117 | #define BSP_Convert_decrementer( _value ) \ |
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118 | ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value))) |
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119 | |
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120 | extern rtems_configuration_table BSP_Configuration; |
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121 | extern void BSP_panic(char *s); |
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122 | extern void rtemsReboot(void); |
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123 | /* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */ |
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124 | extern int BSP_disconnect_clock_handler (void); |
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125 | extern int BSP_connect_clock_handler (void); |
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126 | |
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127 | /* clear hostbridge errors |
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128 | * |
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129 | * enableMCP: whether to enable MCP checkstop / machine check interrupts |
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130 | * on the hostbridge and in HID0. |
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131 | * |
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132 | * NOTE: HID0 and MEREN are left alone if this flag is 0 |
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133 | * |
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134 | * quiet : be silent |
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135 | * |
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136 | * RETURNS : raven MERST register contents (lowermost 16 bits), 0 if |
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137 | * there were no errors |
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138 | */ |
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139 | extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet); |
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140 | |
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141 | #endif |
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142 | |
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143 | #endif |
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