source: rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S @ 35bb69b

4.104.114.84.95
Last change on this file since 35bb69b was 35bb69b, checked in by Joel Sherrill <joel.sherrill@…>, on Apr 6, 2001 at 3:52:03 PM

2001-03-30 Eric Valette <valette@…>

  • clock/.cvsignore, clock/Makefile.am, clock/p_clock.c, include/8xx_immap.h, include/commproc.h, include/mbx.h, irq/.cvsignore, irq/Makefile.am, irq/irq.c, irq/irq.h, irq/irq_asm.S, irq/irq_init.c, vectors/.cvsignore, vectors/Makefile.am, vectors/vectors.S, vectors/vectors.h, vectors/vectors_init.c: New files.
  • Makefile.am, configure.in, console/console.c, include/Makefile.am, network/network.c, startup/Makefile.am, startup/bspstart.c, startup/imbx8xx.c, startup/linkcmds, startup/mmutlbtab.c, startup/start.S, wrapup/Makefile.am: The modifications to this BSP reflect the conversion of the mpc8xx CPU to the "new exception processing model."
  • Property mode set to 100644
File size: 8.8 KB
Line 
1/*  start.S
2 *
3 *  This file contains the entry veneer for RTEMS programs
4 *  on the MBX8xx board.
5 *  It jumps to the BSP which is responsible for performing
6 *  all remaining initialization.
7 *
8 * This file is based on several others:
9 *
10 * (1) start360.s from the gen68360 BSP by
11 *     W. Eric Norum (eric@skatter.usask.ca)
12 *     with the following copyright and license:
13 *
14 *     COPYRIGHT (c) 1989-1998.
15 *     On-Line Applications Research Corporation (OAR).
16 *     Copyright assigned to U.S. Government, 1994.
17 *     
18 *     The license and distribution terms for this file may in
19 *     the file LICENSE in this distribution or at
20 *     http://www.OARcorp.com/rtems/license.html.
21 *
22 * (2) start.s for the eth_comm port by
23 *     Jay Monkman (jmonkman@fracsa.com),
24 *     which itself is based on the
25 *
26 * (3) dlentry.s for the Papyrus BSP, written by:
27 *     Andrew Bray <andy@i-cubed.co.uk>
28 *     with the following copyright and license:
29 *
30 *     COPYRIGHT (c) 1995 by i-cubed ltd.
31 *     
32 * (4) start860.S for the MBX821/MBX860, written by:
33 *     Darlene A. Stewart <darlene.stewart@iit.nrc.ca>
34 *     Copyright (c) 1999, National Research Council of Canada
35 *
36 *     To anyone who acknowledges that this file is provided "AS IS"
37 *     without any express or implied warranty:
38 *         permission to use, copy, modify, and distribute this file
39 *         for any purpose is hereby granted without fee, provided that
40 *         the above copyright notice and this notice appears in all
41 *         copies, and that the name of i-cubed limited not be used in
42 *         advertising or publicity pertaining to distribution of the
43 *         software without specific, written prior permission.
44 *         i-cubed limited makes no representations about the suitability
45 *         of this software for any purpose.
46 *
47 * Modifications (for MBX8xx) of respective RTEMS files:
48 * Copyright (c) 1999, National Research Council of Canada
49 */
50
51#include "asm.h"
52
53/*
54 *  The initial stack is set to run BELOW the code base address.
55 *  (between the vectors and text sections)
56 *
57 *  All the entry veneer has to do is to clear the BSS.
58 */
59
60/*
61 *  GDB likes to have debugging information for the entry veneer.
62 *  Play compiler and provide some DWARF information.
63 *
64 *  CHANGE TO SUIT YOUR SETUP!
65 */
66
67        .section .entry,"ax",@progbits
68.L_text_b:
69.L_LC1:
70        .previous
71
72.section        .debug_sfnames
73.L_sfnames_b:
74        .byte "rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/"
75        .byte 0
76.L_F0:
77        .byte "start.S"
78        .byte 0
79        .previous
80
81.section        .line
82.L_line_b:
83        .4byte  .L_line_e-.L_line_b
84        .4byte  .L_text_b
85.L_LE1:
86.L_line_last:
87        .4byte  0x0
88        .2byte  0xffff
89        .4byte  .L_text_e-.L_text_b
90.L_line_e:
91        .previous
92
93.section        .debug_srcinfo
94.L_srcinfo_b:
95        .4byte  .L_line_b
96        .4byte  .L_sfnames_b
97        .4byte  .L_text_b
98        .4byte  .L_text_e
99        .4byte  0xffffffff
100        .4byte  .L_LE1-.L_line_b
101        .4byte  .L_F0-.L_sfnames_b
102        .4byte  .L_line_last-.L_line_b
103        .4byte  0xffffffff
104        .previous
105
106.section        .debug_pubnames
107        .4byte  .L_debug_b
108        .4byte  .L_P0
109        .byte "start"
110        .byte 0
111        .4byte  0x0
112        .byte 0
113        .previous
114
115.section        .debug_aranges
116        .4byte  .L_debug_b
117        .4byte  .L_text_b
118        .4byte  .L_text_e-.L_text_b
119        .4byte  0
120        .4byte  0
121        .4byte  0
122        .4byte  0
123        .4byte  0
124        .4byte  0
125        .4byte  0x0
126        .4byte  0x0
127        .previous
128
129.section        .debug
130.L_debug_b:
131.L_D1:
132        .4byte  .L_D1_e-.L_D1
133        .2byte  0x11    /* TAG_compile_unit */
134        .2byte  0x12    /* AT_sibling */
135        .4byte  .L_D2
136        .2byte  0x38    /* AT_name */
137        .byte "start.S"
138        .byte 0
139        .2byte  0x258   /* AT_producer */
140        .byte "GAS 2.5.2"
141        .byte 0
142        .2byte  0x111   /* AT_low_pc */
143        .4byte  .L_text_b
144        .2byte  0x121   /* AT_high_pc */
145        .4byte  .L_text_e
146        .2byte  0x106   /* AT_stmt_list */
147        .4byte  .L_line_b
148        .2byte  0x1b8   /* AT_comp_dir */
149        .byte "rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/"
150        .byte 0
151        .2byte  0x8006  /* AT_sf_names */
152        .4byte  .L_sfnames_b
153        .2byte  0x8016  /* AT_src_info */
154        .4byte  .L_srcinfo_b
155.L_D1_e:
156.L_P0:
157.L_D3:
158        .4byte  .L_D3_e-.L_D3
159        .2byte  0x6     /* TAG_global_subroutine */
160        .2byte  0x12    /* AT_sibling */
161        .4byte  .L_D4
162        .2byte  0x38    /* AT_name */
163        .byte "start"
164        .byte 0
165        .2byte  0x278   /* AT_prototyped */
166        .byte 0
167        .2byte  0x111   /* AT_low_pc */
168        .4byte  .L_text_b
169        .2byte  0x121   /* AT_high_pc */
170        .4byte  .L_text_e
171        .2byte  0x8041  /* AT_body_begin */
172        .4byte  .L_text_b
173        .2byte  0x8051  /* AT_body_end */
174        .4byte  .L_text_e
175.L_D3_e:
176
177.L_D4:
178        .4byte  .L_D4_e-.L_D4
179        .align 2
180.L_D4_e:
181.L_D2:
182        .previous
183       
184/*
185 * Tell C's eabi-ctor's that we have an atexit function,
186 * and that it is to register __do_global_dtors.
187 */
188        EXTERN_PROC(atexit)
189        PUBLIC_VAR(__atexit)
190        .section ".sdata","aw"
191        .align  2
192SYM(__atexit):                 
193        EXT_PROC_REF(atexit)@fixup
194        .previous
195
196        .section ".fixup","aw"
197        .align  2
198        EXT_SYM_REF(__atexit)
199        .previous
200
201/* That should do it */
202                       
203/*
204 *  Put the entry point in its own section. That way, we can guarantee
205 *  to put it first in the .text section in the linker script.
206 */
207        .section .entry
208
209        PUBLIC_VAR (start)
210SYM(start):
211        bl      .startup        /* or bl .spin */
212base_addr:     
213
214/*
215 * Parameters from linker
216 */
217toc_pointer:   
218        .long   __GOT_START__
219bss_length:     
220        .long   bss.size
221bss_addr:       
222        .long   bss.start
223
224PUBLIC_VAR (text_addr)
225text_addr:
226        .long   text.start
227
228PUBLIC_VAR (text_length)
229text_length:
230        .long   text.size
231
232/*
233 * Spin, if necessary, to acquire control from debugger (CodeWarrior).
234 */     
235spin:
236        .long   0x0001
237.spin:
238        lis     r3, spin@ha
239        lwz     r3, spin@l(r3)
240        cmpwi   r3, 0x1
241        beq     .spin
242/*     
243 * #define LOADED_BY_EPPCBUG
244 */
245/*
246 * Initialization code
247 */
248.startup:       
249        /* Get the start address. */
250        mflr    r1
251#ifdef LOADED_BY_EPPCBUG       
252        /* Save pointer to residual/board data */
253        lis     r9,eppcbugInfo@ha
254        stw     r3,eppcbugInfo@l(r9)
255#endif 
256        /* Initialize essential registers. */
257        bl      initregs
258        nop
259
260        /*
261         * C_setup.
262         */
263
264        /* set toc */
265        lwz r2, toc_pointer-base_addr(r1)
266
267        /* Set up stack pointer = beginning of text section - 56 */
268        addi    r1, r1, -56-4
269
270        /* Initialize the memory mapped MPC821 registers (done in C). */
271        EXTERN_PROC (_InitMBX8xx)
272        bl      PROC (_InitMBX8xx)
273        nop
274       
275        /* Clear the bss section. */
276        bl      bssclr
277        nop
278
279        lis     r5,environ@ha
280        la      r5,environ@l(r5)                /* environp */
281        /* clear argc and argv */
282        xor     r3, r3, r3
283        xor     r4, r4, r4
284       
285        EXTERN_PROC (boot_card)
286        bl       PROC (boot_card)       /* call the first C routine */
287        nop
288       
289        /* we should never return from boot_card, but in case we do ... */
290        /* The next instructions are dependent on your runtime environment */
291
292        /* Return to EPPCBug */
293        lis     r10, 0x0400             /* Data cache disable */
294        mtspr   568, r10
295        isync
296               
297        mtspr   560, r10                /* Instruction cache disable */
298        isync
299               
300stop_here:
301        li      r10, 0x0F00             /* .RETURN */
302        sc
303       
304        b       stop_here
305        nop
306
307/*
308 * bssclr - zero out bss
309 */
310bssclr:
311        lis     r3, base_addr@ha
312        addi    r3, r3, base_addr@l
313        lwz     r4, bss_addr-base_addr(r3)      /* Start of bss */
314        lwz     r5, bss_length-base_addr(r3)    /* Length of bss */
315
316        rlwinm. r5,r5,30,0x3FFFFFFF             /* form length/4 */
317        beqlr                                   /* no bss - return */
318        mtctr   r5                              /* set ctr reg */
319       
320        li      r5,0x0000                       /* r5 = 0 */
321clear_bss:
322        stw     r5,0(r4)                        /* store r6 */
323        addi    r4,r4,0x4                       /* update r4 */
324        bdnz    clear_bss                       /* dec counter and loop */
325       
326        blr                                     /* return */
327
328/*
329 * initregs
330 *      Initialize the MSR and basic core PowerPC registers
331 *
332 * Register usage:
333 *      r0 - scratch
334 */
335initregs:
336        /*       
337         * Disable address translation. We should already be running in real space,
338         * so this should be a no-op, i.e. no need to switch instruction stream
339         * addresses from virtual space to real space. Other bits set the processor
340         * for big-endian mode, exceptions vectored to 0x000n_nnnn (vectors are
341         * already in low memory!), no execution tracing, machine check exceptions
342         * enabled, floating-point not available (MPC8xx has none), supervisor
343         * priviledge level, external interrupts disabled, power management
344         * disabled (normal operation mode).
345         */
346        li      r0, 0x1000      /* MSR_ME */
347        mtmsr   r0              /* Context-synchronizing */
348        isync
349       
350        /*
351         * Clear the exception handling registers.
352         * Note SPRG3 is reserved for use by EPPCBug on the MBX8xx.
353         */     
354        li      r0, 0x0000
355        mtdar   r0
356        mtspr   sprg0, r0
357        mtspr   sprg1, r0
358        mtspr   sprg2, r0
359        mtspr   srr0, r0
360        mtspr   srr1, r0
361                       
362        mr      r6, r0
363        mr      r7, r0
364        mr      r8, r0
365        mr      r9, r0
366        mr      r10, r0
367        mr      r11, r0
368        mr      r12, r0
369        mr      r13, r0
370        mr      r14, r0
371        mr      r15, r0
372        mr      r16, r0
373        mr      r17, r0
374        mr      r18, r0
375        mr      r19, r0
376        mr      r20, r0
377        mr      r21, r0
378        mr      r22, r0
379        mr      r23, r0
380        mr      r24, r0
381        mr      r25, r0
382        mr      r26, r0
383        mr      r27, r0
384        mr      r28, r0
385        mr      r29, r0
386        mr      r30, r0
387        mr      r31, r0
388       
389        blr                     /* return */
390       
391.L_text_e:
392
393        .comm   environ,4,4
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