source: rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c @ fb19f111

4.104.114.84.95
Last change on this file since fb19f111 was fb19f111, checked in by Joel Sherrill <joel.sherrill@…>, on 04/17/02 at 13:30:41

2002-04-16 Ralf Corsepius <corsepiu@…>

  • startup/bspstart.c: Include <libcpu/cpuIdent.h>, <rtems/bspIo.h>.
  • Property mode set to 100644
File size: 6.8 KB
Line 
1/*  bspstart.c
2 *
3 *  This set of routines starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  COPYRIGHT (c) 1989-1998.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 *  The license and distribution terms for this file may be
12 *  found in the file LICENSE in this distribution or at
13 *  http://www.OARcorp.com/rtems/license.html.
14 *
15 *  Modifications for MBX860:
16 *  Copyright (c) 1999, National Research Council of Canada
17 *
18 *  $Id$
19 */
20
21#include <string.h>
22
23#include <bsp.h>
24#include <rtems/libio.h>
25#include <rtems/libcsupport.h>
26#include <rtems/bspIo.h>
27#include <libcpu/cpuIdent.h>
28
29/*
30 *  The original table from the application (in ROM) and our copy of it with
31 *  some changes. Configuration is defined in <confdefs.h>. Make sure that
32 *  our configuration tables are uninitialized so that they get allocated in
33 *  the .bss section (RAM).
34 */
35extern rtems_configuration_table Configuration;
36extern unsigned long intrStackPtr;
37rtems_configuration_table  BSP_Configuration;
38
39rtems_cpu_table Cpu_table;
40
41char *rtems_progname;
42
43/*
44 *  Use the shared implementations of the following routines.
45 *  Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
46 *  rtems/c/src/lib/libbsp/shared/bsplibc.c.
47 */
48void bsp_postdriver_hook(void);
49void bsp_libc_init( void *, unsigned32, int );
50
51void BSP_panic(char *s)
52{
53  printk("%s PANIC %s\n",_RTEMS_version, s);
54  __asm__ __volatile ("sc");
55}
56
57void _BSP_Fatal_error(unsigned int v)
58{
59  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
60  __asm__ __volatile ("sc");
61}
62
63/*
64 *  bsp_pretasking_hook
65 *
66 *  Called when RTEMS initialization is complete but before interrupts and
67 *  tasking are enabled. Used to setup libc and install any BSP extensions.
68 *
69 *  Must not use libc (to do io) from here, since drivers are not yet
70 *  initialized.
71 *
72 *  Installed in the rtems_cpu_table defined in
73 *  rtems/c/src/exec/score/cpu/m68k/cpu.h in main() below. Called from
74 *  rtems_initialize_executive() defined in rtems/c/src/exec/sapi/src/init.c
75 *
76 *  Input parameters: NONE
77 *
78 *  Output parameters: NONE
79 *
80 *  Return values: NONE
81 */
82void bsp_pretasking_hook(void)
83{
84  /*
85   *  These are assigned addresses in the linkcmds file for the BSP. This
86   *  approach is better than having these defined as manifest constants and
87   *  compiled into the kernel, but it is still not ideal when dealing with
88   *  multiprocessor configuration in which each board as a different memory
89   *  map. A better place for defining these symbols might be the makefiles.
90   *  Consideration should also be given to developing an approach in which
91   *  the kernel and the application can be linked and burned into ROM
92   *  independently of each other.
93   */
94    extern unsigned char _HeapStart;
95    extern unsigned char _HeapEnd;
96
97    bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
98 
99#ifdef RTEMS_DEBUG
100  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
101#endif
102}
103
104
105/*
106 *  bsp_start()
107 *
108 *  Board-specific initialization code. Called from the generic boot_card()
109 *  function defined in rtems/c/src/lib/libbsp/shared/main.c. That function
110 *  does some of the board independent initialization. It is called from the
111 *  MBX8xx entry point _start() defined in
112 *  rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S
113 *
114 *  _start() has set up a stack, has zeroed the .bss section, has turned off
115 *  interrupts, and placed the processor in the supervisor mode. boot_card()
116 *  has left the processor in that state when bsp_start() was called.
117 *
118 *  RUNS WITH ADDRESS TRANSLATION AND CACHING TURNED OFF!
119 *  ASSUMES THAT THE VIRTUAL ADDRESSES WILL BE IDENTICAL TO THE PHYSICAL
120 *  ADDRESSES. Software-controlled address translation would be required
121 *  otherwise.
122 *
123 *  Input parameters: NONE
124 *
125 *  Output parameters: NONE
126 *
127 *  Return values: NONE
128 */
129void bsp_start(void)
130{
131  extern void *_WorkspaceBase;
132 
133  ppc_cpu_id_t myCpu;
134  ppc_cpu_revision_t myCpuRevision;
135  register unsigned char* intrStack;
136  register unsigned int intrNestingLevel = 0;
137 
138  /*
139   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
140   * store the result in global variables so that it can be used latter...
141   */
142  myCpu         = get_ppc_cpu_type();
143  myCpuRevision = get_ppc_cpu_revision();
144
145  mmu_init();
146 
147  /*
148   * Enable instruction and data caches. Do not force writethrough mode.
149   */
150#if NVRAM_CONFIGURE == 1
151  if ( nvram->cache_mode & 0x02 )
152    rtems_cache_enable_instruction();
153  if ( nvram->cache_mode & 0x01 )
154    rtems_cache_enable_data();
155#else
156#ifdef INSTRUCTION_CACHE_ENABLE
157  rtems_cache_enable_instruction();
158#endif
159#ifdef DATA_CACHE_ENABLE
160  rtems_cache_enable_data();
161#endif
162#endif
163  /*
164   * Initialize some SPRG registers related to irq handling
165   */
166 
167  intrStack = (((unsigned char*)&intrStackPtr) - CPU_MINIMUM_STACK_FRAME_SIZE);
168  asm volatile ("mtspr  273, %0" : "=r" (intrStack) : "0" (intrStack));
169  asm volatile ("mtspr  272, %0" : "=r" (intrNestingLevel) : "0" (intrNestingLevel));
170
171  /*
172   * Install our own set of exception vectors
173   */
174  initialize_exceptions();
175
176
177  /*
178   *  Allocate the memory for the RTEMS Work Space.  This can come from
179   *  a variety of places: hard coded address, malloc'ed from outside
180   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
181   *  typically done by stock BSPs) by subtracting the required amount
182   *  of work space from the last physical address on the CPU board.
183   *
184   *  In this case, the memory is not malloc'ed.  It is just
185   *  "pulled from the air".
186   */
187  BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
188
189  /*
190   *  initialize the CPU table for this BSP
191   */
192
193  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
194  Cpu_table.postdriver_hook = bsp_postdriver_hook;
195  if( Cpu_table.interrupt_stack_size < 4 * 1024 )
196      Cpu_table.interrupt_stack_size = 4 * 1024;
197
198  Cpu_table.clicks_per_usec = 1;  /* for 4MHz extclk */
199  Cpu_table.serial_per_sec = 10000000;
200  Cpu_table.serial_external_clock = 1;
201  Cpu_table.serial_xon_xoff = 0;
202  Cpu_table.serial_cts_rts = 1;
203  Cpu_table.serial_rate = 9600;
204#if ( defined(mbx821_001) || defined(mbx821_001b) || defined(mbx860_001b) )
205  Cpu_table.clock_speed = 50000000;
206  Cpu_table.timer_average_overhead = 3;
207  Cpu_table.timer_least_valid = 3;
208#else
209  Cpu_table.clock_speed = 40000000;
210  Cpu_table.timer_average_overhead = 3;
211  Cpu_table.timer_least_valid = 3;
212#endif
213
214  /*
215   * Call this in case we use TERMIOS for console I/O
216   */
217  m8xx_uart_reserve_resources( &BSP_Configuration );
218
219  m8xx.scc2.sccm=0;
220  m8xx.scc2p.rbase=0;
221  m8xx.scc2p.tbase=0;
222  m8xx_cp_execute_cmd( M8xx_CR_OP_STOP_TX | M8xx_CR_CHAN_SCC2 );
223  /*
224   * Initalize RTEMS IRQ system
225   */
226  BSP_rtems_irq_mng_init(0);
227#ifdef SHOW_MORE_INIT_SETTINGS
228  printk("Exit from bspstart\n");
229#endif 
230
231}
232
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