source: rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c @ f05b2ac

4.104.114.84.95
Last change on this file since f05b2ac was f05b2ac, checked in by Ralf Corsepius <ralf.corsepius@…>, on 04/21/04 at 16:01:48

Remove duplicate white lines.

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File size: 6.8 KB
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1/*  bspstart.c
2 *
3 *  This set of routines starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  COPYRIGHT (c) 1989-1998.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 *  The license and distribution terms for this file may be
12 *  found in the file LICENSE in this distribution or at
13 *  http://www.rtems.com/license/LICENSE.
14 *
15 *  Modifications for MBX860:
16 *  Copyright (c) 1999, National Research Council of Canada
17 *
18 *  $Id$
19 */
20
21#include <string.h>
22
23#include <bsp.h>
24#include <bsp/irq.h>
25#include <rtems/libio.h>
26#include <rtems/libcsupport.h>
27#include <rtems/bspIo.h>
28#include <libcpu/cpuIdent.h>
29#include <libcpu/spr.h>
30
31SPR_RW(SPRG0)
32SPR_RW(SPRG1)
33
34/*
35 *  The original table from the application (in ROM) and our copy of it with
36 *  some changes. Configuration is defined in <confdefs.h>. Make sure that
37 *  our configuration tables are uninitialized so that they get allocated in
38 *  the .bss section (RAM).
39 */
40extern rtems_configuration_table Configuration;
41extern unsigned long intrStackPtr;
42rtems_configuration_table  BSP_Configuration;
43
44rtems_cpu_table Cpu_table;
45
46char *rtems_progname;
47
48/*
49 *  Use the shared implementations of the following routines.
50 *  Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
51 *  rtems/c/src/lib/libbsp/shared/bsplibc.c.
52 */
53void bsp_postdriver_hook(void);
54void bsp_libc_init( void *, uint32_t, int );
55
56void BSP_panic(char *s)
57{
58  printk("%s PANIC %s\n",_RTEMS_version, s);
59  __asm__ __volatile ("sc");
60}
61
62void _BSP_Fatal_error(unsigned int v)
63{
64  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
65  __asm__ __volatile ("sc");
66}
67
68/*
69 *  bsp_pretasking_hook
70 *
71 *  Called when RTEMS initialization is complete but before interrupts and
72 *  tasking are enabled. Used to setup libc and install any BSP extensions.
73 *
74 *  Must not use libc (to do io) from here, since drivers are not yet
75 *  initialized.
76 *
77 *  Installed in the rtems_cpu_table defined in
78 *  rtems/c/src/exec/score/cpu/m68k/cpu.h in main() below. Called from
79 *  rtems_initialize_executive() defined in rtems/c/src/exec/sapi/src/init.c
80 *
81 *  Input parameters: NONE
82 *
83 *  Output parameters: NONE
84 *
85 *  Return values: NONE
86 */
87void bsp_pretasking_hook(void)
88{
89  /*
90   *  These are assigned addresses in the linkcmds file for the BSP. This
91   *  approach is better than having these defined as manifest constants and
92   *  compiled into the kernel, but it is still not ideal when dealing with
93   *  multiprocessor configuration in which each board as a different memory
94   *  map. A better place for defining these symbols might be the makefiles.
95   *  Consideration should also be given to developing an approach in which
96   *  the kernel and the application can be linked and burned into ROM
97   *  independently of each other.
98   */
99    extern unsigned char _HeapStart;
100    extern unsigned char _HeapEnd;
101
102    bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
103
104#ifdef RTEMS_DEBUG
105  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
106#endif
107}
108
109/*
110 *  bsp_start()
111 *
112 *  Board-specific initialization code. Called from the generic boot_card()
113 *  function defined in rtems/c/src/lib/libbsp/shared/main.c. That function
114 *  does some of the board independent initialization. It is called from the
115 *  MBX8xx entry point _start() defined in
116 *  rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S
117 *
118 *  _start() has set up a stack, has zeroed the .bss section, has turned off
119 *  interrupts, and placed the processor in the supervisor mode. boot_card()
120 *  has left the processor in that state when bsp_start() was called.
121 *
122 *  RUNS WITH ADDRESS TRANSLATION AND CACHING TURNED OFF!
123 *  ASSUMES THAT THE VIRTUAL ADDRESSES WILL BE IDENTICAL TO THE PHYSICAL
124 *  ADDRESSES. Software-controlled address translation would be required
125 *  otherwise.
126 *
127 *  Input parameters: NONE
128 *
129 *  Output parameters: NONE
130 *
131 *  Return values: NONE
132 */
133void bsp_start(void)
134{
135  extern void *_WorkspaceBase;
136
137  ppc_cpu_id_t myCpu;
138  ppc_cpu_revision_t myCpuRevision;
139  register unsigned char* intrStack;
140
141  /*
142   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
143   * store the result in global variables so that it can be used latter...
144   */
145  myCpu         = get_ppc_cpu_type();
146  myCpuRevision = get_ppc_cpu_revision();
147
148  mmu_init();
149
150  /*
151   * Enable instruction and data caches. Do not force writethrough mode.
152   */
153#if NVRAM_CONFIGURE == 1
154  if ( nvram->cache_mode & 0x02 )
155    rtems_cache_enable_instruction();
156  if ( nvram->cache_mode & 0x01 )
157    rtems_cache_enable_data();
158#else
159#ifdef INSTRUCTION_CACHE_ENABLE
160  rtems_cache_enable_instruction();
161#endif
162#ifdef DATA_CACHE_ENABLE
163  rtems_cache_enable_data();
164#endif
165#endif
166  /*
167   * Initialize some SPRG registers related to irq handling
168   */
169
170  intrStack = (((unsigned char*)&intrStackPtr) - CPU_MINIMUM_STACK_FRAME_SIZE);
171  _write_SPRG1((unsigned int)intrStack);
172  /* signal them that we have fixed PR288 - eventually, this should go away */
173  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
174
175  /*
176   * Install our own set of exception vectors
177   */
178  initialize_exceptions();
179
180  /*
181   *  Allocate the memory for the RTEMS Work Space.  This can come from
182   *  a variety of places: hard coded address, malloc'ed from outside
183   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
184   *  typically done by stock BSPs) by subtracting the required amount
185   *  of work space from the last physical address on the CPU board.
186   *
187   *  In this case, the memory is not malloc'ed.  It is just
188   *  "pulled from the air".
189   */
190  BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
191
192  /*
193   *  initialize the CPU table for this BSP
194   */
195
196  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
197  Cpu_table.postdriver_hook = bsp_postdriver_hook;
198  if( Cpu_table.interrupt_stack_size < 4 * 1024 )
199      Cpu_table.interrupt_stack_size = 4 * 1024;
200
201  Cpu_table.clicks_per_usec = 1;  /* for 4MHz extclk */
202  Cpu_table.serial_per_sec = 10000000;
203  Cpu_table.serial_external_clock = 1;
204  Cpu_table.serial_xon_xoff = 0;
205  Cpu_table.serial_cts_rts = 1;
206  Cpu_table.serial_rate = 9600;
207#if ( defined(mbx821_001) || defined(mbx821_001b) || defined(mbx860_001b) )
208  Cpu_table.clock_speed = 50000000;
209  Cpu_table.timer_average_overhead = 3;
210  Cpu_table.timer_least_valid = 3;
211#else
212  Cpu_table.clock_speed = 40000000;
213  Cpu_table.timer_average_overhead = 3;
214  Cpu_table.timer_least_valid = 3;
215#endif
216
217  /*
218   * Call this in case we use TERMIOS for console I/O
219   */
220  m8xx_uart_reserve_resources( &BSP_Configuration );
221
222  m8xx.scc2.sccm=0;
223  m8xx.scc2p.rbase=0;
224  m8xx.scc2p.tbase=0;
225  m8xx_cp_execute_cmd( M8xx_CR_OP_STOP_TX | M8xx_CR_CHAN_SCC2 );
226  /*
227   * Initalize RTEMS IRQ system
228   */
229  BSP_rtems_irq_mng_init(0);
230#ifdef SHOW_MORE_INIT_SETTINGS
231  printk("Exit from bspstart\n");
232#endif
233
234}
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