source: rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c @ ae20a3e2

4.104.114.84.95
Last change on this file since ae20a3e2 was ae20a3e2, checked in by Joel Sherrill <joel.sherrill@…>, on 07/18/03 at 17:24:18

2003-07-18 Till Straumann <strauman@…>

PR 288/rtems

  • irq/irq_asm.S, startup/bspstart.c: _ISR_Nest_level is now properly maintained.
  • Property mode set to 100644
File size: 6.8 KB
Line 
1/*  bspstart.c
2 *
3 *  This set of routines starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  COPYRIGHT (c) 1989-1998.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 *  The license and distribution terms for this file may be
12 *  found in the file LICENSE in this distribution or at
13 *  http://www.OARcorp.com/rtems/license.html.
14 *
15 *  Modifications for MBX860:
16 *  Copyright (c) 1999, National Research Council of Canada
17 *
18 *  $Id$
19 */
20
21#include <string.h>
22
23#include <bsp.h>
24#include <bsp/irq.h>
25#include <rtems/libio.h>
26#include <rtems/libcsupport.h>
27#include <rtems/bspIo.h>
28#include <libcpu/cpuIdent.h>
29#include <libcpu/spr.h>
30
31
32SPR_RW(SPRG0)
33SPR_RW(SPRG1)
34
35/*
36 *  The original table from the application (in ROM) and our copy of it with
37 *  some changes. Configuration is defined in <confdefs.h>. Make sure that
38 *  our configuration tables are uninitialized so that they get allocated in
39 *  the .bss section (RAM).
40 */
41extern rtems_configuration_table Configuration;
42extern unsigned long intrStackPtr;
43rtems_configuration_table  BSP_Configuration;
44
45rtems_cpu_table Cpu_table;
46
47char *rtems_progname;
48
49/*
50 *  Use the shared implementations of the following routines.
51 *  Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
52 *  rtems/c/src/lib/libbsp/shared/bsplibc.c.
53 */
54void bsp_postdriver_hook(void);
55void bsp_libc_init( void *, unsigned32, int );
56
57void BSP_panic(char *s)
58{
59  printk("%s PANIC %s\n",_RTEMS_version, s);
60  __asm__ __volatile ("sc");
61}
62
63void _BSP_Fatal_error(unsigned int v)
64{
65  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
66  __asm__ __volatile ("sc");
67}
68
69/*
70 *  bsp_pretasking_hook
71 *
72 *  Called when RTEMS initialization is complete but before interrupts and
73 *  tasking are enabled. Used to setup libc and install any BSP extensions.
74 *
75 *  Must not use libc (to do io) from here, since drivers are not yet
76 *  initialized.
77 *
78 *  Installed in the rtems_cpu_table defined in
79 *  rtems/c/src/exec/score/cpu/m68k/cpu.h in main() below. Called from
80 *  rtems_initialize_executive() defined in rtems/c/src/exec/sapi/src/init.c
81 *
82 *  Input parameters: NONE
83 *
84 *  Output parameters: NONE
85 *
86 *  Return values: NONE
87 */
88void bsp_pretasking_hook(void)
89{
90  /*
91   *  These are assigned addresses in the linkcmds file for the BSP. This
92   *  approach is better than having these defined as manifest constants and
93   *  compiled into the kernel, but it is still not ideal when dealing with
94   *  multiprocessor configuration in which each board as a different memory
95   *  map. A better place for defining these symbols might be the makefiles.
96   *  Consideration should also be given to developing an approach in which
97   *  the kernel and the application can be linked and burned into ROM
98   *  independently of each other.
99   */
100    extern unsigned char _HeapStart;
101    extern unsigned char _HeapEnd;
102
103    bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
104 
105#ifdef RTEMS_DEBUG
106  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
107#endif
108}
109
110
111/*
112 *  bsp_start()
113 *
114 *  Board-specific initialization code. Called from the generic boot_card()
115 *  function defined in rtems/c/src/lib/libbsp/shared/main.c. That function
116 *  does some of the board independent initialization. It is called from the
117 *  MBX8xx entry point _start() defined in
118 *  rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S
119 *
120 *  _start() has set up a stack, has zeroed the .bss section, has turned off
121 *  interrupts, and placed the processor in the supervisor mode. boot_card()
122 *  has left the processor in that state when bsp_start() was called.
123 *
124 *  RUNS WITH ADDRESS TRANSLATION AND CACHING TURNED OFF!
125 *  ASSUMES THAT THE VIRTUAL ADDRESSES WILL BE IDENTICAL TO THE PHYSICAL
126 *  ADDRESSES. Software-controlled address translation would be required
127 *  otherwise.
128 *
129 *  Input parameters: NONE
130 *
131 *  Output parameters: NONE
132 *
133 *  Return values: NONE
134 */
135void bsp_start(void)
136{
137  extern void *_WorkspaceBase;
138 
139  ppc_cpu_id_t myCpu;
140  ppc_cpu_revision_t myCpuRevision;
141  register unsigned char* intrStack;
142 
143  /*
144   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
145   * store the result in global variables so that it can be used latter...
146   */
147  myCpu         = get_ppc_cpu_type();
148  myCpuRevision = get_ppc_cpu_revision();
149
150  mmu_init();
151 
152  /*
153   * Enable instruction and data caches. Do not force writethrough mode.
154   */
155#if NVRAM_CONFIGURE == 1
156  if ( nvram->cache_mode & 0x02 )
157    rtems_cache_enable_instruction();
158  if ( nvram->cache_mode & 0x01 )
159    rtems_cache_enable_data();
160#else
161#ifdef INSTRUCTION_CACHE_ENABLE
162  rtems_cache_enable_instruction();
163#endif
164#ifdef DATA_CACHE_ENABLE
165  rtems_cache_enable_data();
166#endif
167#endif
168  /*
169   * Initialize some SPRG registers related to irq handling
170   */
171 
172  intrStack = (((unsigned char*)&intrStackPtr) - CPU_MINIMUM_STACK_FRAME_SIZE);
173  _write_SPRG1((unsigned int)intrStack);
174  /* signal them that we have fixed PR288 - eventually, this should go away */
175  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
176
177  /*
178   * Install our own set of exception vectors
179   */
180  initialize_exceptions();
181
182
183  /*
184   *  Allocate the memory for the RTEMS Work Space.  This can come from
185   *  a variety of places: hard coded address, malloc'ed from outside
186   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
187   *  typically done by stock BSPs) by subtracting the required amount
188   *  of work space from the last physical address on the CPU board.
189   *
190   *  In this case, the memory is not malloc'ed.  It is just
191   *  "pulled from the air".
192   */
193  BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
194
195  /*
196   *  initialize the CPU table for this BSP
197   */
198
199  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
200  Cpu_table.postdriver_hook = bsp_postdriver_hook;
201  if( Cpu_table.interrupt_stack_size < 4 * 1024 )
202      Cpu_table.interrupt_stack_size = 4 * 1024;
203
204  Cpu_table.clicks_per_usec = 1;  /* for 4MHz extclk */
205  Cpu_table.serial_per_sec = 10000000;
206  Cpu_table.serial_external_clock = 1;
207  Cpu_table.serial_xon_xoff = 0;
208  Cpu_table.serial_cts_rts = 1;
209  Cpu_table.serial_rate = 9600;
210#if ( defined(mbx821_001) || defined(mbx821_001b) || defined(mbx860_001b) )
211  Cpu_table.clock_speed = 50000000;
212  Cpu_table.timer_average_overhead = 3;
213  Cpu_table.timer_least_valid = 3;
214#else
215  Cpu_table.clock_speed = 40000000;
216  Cpu_table.timer_average_overhead = 3;
217  Cpu_table.timer_least_valid = 3;
218#endif
219
220  /*
221   * Call this in case we use TERMIOS for console I/O
222   */
223  m8xx_uart_reserve_resources( &BSP_Configuration );
224
225  m8xx.scc2.sccm=0;
226  m8xx.scc2p.rbase=0;
227  m8xx.scc2p.tbase=0;
228  m8xx_cp_execute_cmd( M8xx_CR_OP_STOP_TX | M8xx_CR_CHAN_SCC2 );
229  /*
230   * Initalize RTEMS IRQ system
231   */
232  BSP_rtems_irq_mng_init(0);
233#ifdef SHOW_MORE_INIT_SETTINGS
234  printk("Exit from bspstart\n");
235#endif 
236
237}
238
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