source: rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c @ a86f3aac

4.104.114.9
Last change on this file since a86f3aac was a86f3aac, checked in by Thomas Doerfler <Thomas.Doerfler@…>, on Jul 11, 2008 at 10:01:37 AM

adapted powerpc BSPs to new exception code

  • Property mode set to 100644
File size: 6.8 KB
Line 
1/*  bspstart.c
2 *
3 *  This set of routines starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  COPYRIGHT (c) 1989-2007.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 *  The license and distribution terms for this file may be
12 *  found in the file LICENSE in this distribution or at
13 *  http://www.rtems.com/license/LICENSE.
14 *
15 *  Modifications for MBX860:
16 *  Copyright (c) 1999, National Research Council of Canada
17 *
18 *  $Id$
19 */
20
21#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
22
23#include <string.h>
24
25#include <bsp.h>
26#include <bsp/irq.h>
27#include <rtems/libio.h>
28#include <rtems/libcsupport.h>
29#include <rtems/bspIo.h>
30#include <libcpu/cpuIdent.h>
31#include <libcpu/spr.h>
32#include <rtems/powerpc/powerpc.h>
33
34SPR_RW(SPRG1)
35
36extern unsigned long intrStackPtr;
37
38/*
39 *  Driver configuration parameters
40 */
41uint32_t   bsp_clicks_per_usec;
42uint32_t   bsp_clock_speed;
43uint32_t   bsp_serial_per_sec;         /* Serial clocks per second */
44boolean    bsp_serial_external_clock;
45boolean    bsp_serial_xon_xoff;
46boolean    bsp_serial_cts_rts;
47uint32_t   bsp_serial_rate;
48uint32_t   bsp_timer_average_overhead; /* Average overhead of timer in ticks */
49uint32_t   bsp_timer_least_valid;      /* Least valid number from timer      */
50boolean    bsp_timer_internal_clock;   /* TRUE, when timer runs with CPU clk */
51
52/*
53 *  Use the shared implementations of the following routines.
54 *  Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
55 *  rtems/c/src/lib/libbsp/shared/bsplibc.c.
56 */
57void bsp_libc_init( void *, uint32_t, int );
58
59void BSP_panic(char *s)
60{
61  printk("%s PANIC %s\n",_RTEMS_version, s);
62  __asm__ __volatile ("sc");
63}
64
65void _BSP_Fatal_error(unsigned int v)
66{
67  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
68  __asm__ __volatile ("sc");
69}
70
71/*
72 *  bsp_pretasking_hook
73 *
74 *  Called when RTEMS initialization is complete but before interrupts and
75 *  tasking are enabled. Used to setup libc and install any BSP extensions.
76 *
77 *  Must not use libc (to do io) from here, since drivers are not yet
78 *  initialized.
79 *
80 *  Input parameters: NONE
81 *
82 *  Output parameters: NONE
83 *
84 *  Return values: NONE
85 */
86void bsp_pretasking_hook(void)
87{
88  /*
89   *  These are assigned addresses in the linkcmds file for the BSP. This
90   *  approach is better than having these defined as manifest constants and
91   *  compiled into the kernel, but it is still not ideal when dealing with
92   *  multiprocessor configuration in which each board as a different memory
93   *  map. A better place for defining these symbols might be the makefiles.
94   *  Consideration should also be given to developing an approach in which
95   *  the kernel and the application can be linked and burned into ROM
96   *  independently of each other.
97   */
98  extern unsigned char _HeapStart;
99  extern unsigned char _HeapEnd;
100
101  bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
102}
103
104/*
105 *  bsp_start()
106 *
107 *  Board-specific initialization code. Called from the generic boot_card()
108 *  function defined in rtems/c/src/lib/libbsp/shared/main.c. That function
109 *  does some of the board independent initialization. It is called from the
110 *  MBX8xx entry point _start() defined in
111 *  rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S
112 *
113 *  _start() has set up a stack, has zeroed the .bss section, has turned off
114 *  interrupts, and placed the processor in the supervisor mode. boot_card()
115 *  has left the processor in that state when bsp_start() was called.
116 *
117 *  RUNS WITH ADDRESS TRANSLATION AND CACHING TURNED OFF!
118 *  ASSUMES THAT THE VIRTUAL ADDRESSES WILL BE IDENTICAL TO THE PHYSICAL
119 *  ADDRESSES. Software-controlled address translation would be required
120 *  otherwise.
121 *
122 *  Input parameters: NONE
123 *
124 *  Output parameters: NONE
125 *
126 *  Return values: NONE
127 */
128void bsp_start(void)
129{
130  extern void *_WorkspaceBase;
131
132  ppc_cpu_id_t myCpu;
133  ppc_cpu_revision_t myCpuRevision;
134  register unsigned char* intrStack;
135
136  /*
137   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
138   * store the result in global variables so that it can be used latter...
139   */
140  myCpu         = get_ppc_cpu_type();
141  myCpuRevision = get_ppc_cpu_revision();
142
143  mmu_init();
144
145  /*
146   * Enable instruction and data caches. Do not force writethrough mode.
147   */
148#if NVRAM_CONFIGURE == 1
149  if ( nvram->cache_mode & 0x02 )
150    rtems_cache_enable_instruction();
151  if ( nvram->cache_mode & 0x01 )
152    rtems_cache_enable_data();
153#else
154#ifdef INSTRUCTION_CACHE_ENABLE
155  rtems_cache_enable_instruction();
156#endif
157#ifdef DATA_CACHE_ENABLE
158  rtems_cache_enable_data();
159#endif
160#endif
161  /*
162   * Initialize some SPRG registers related to irq handling
163   */
164
165  intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
166  _write_SPRG1((unsigned int)intrStack);
167
168  /*
169   * Install our own set of exception vectors
170   */
171  initialize_exceptions();
172
173  /*
174   *  Allocate the memory for the RTEMS Work Space.  This can come from
175   *  a variety of places: hard coded address, malloc'ed from outside
176   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
177   *  typically done by stock BSPs) by subtracting the required amount
178   *  of work space from the last physical address on the CPU board.
179   *
180   *  In this case, the memory is not malloc'ed.  It is just
181   *  "pulled from the air".
182   */
183  Configuration.work_space_start = (void *)&_WorkspaceBase;
184
185  /*
186   *  initialize the device driver parameters
187   */
188
189#if    ( defined(mbx860_001b) || \
190         defined(mbx860_002b) || \
191         defined(mbx860_003b) || \
192         defined(mbx860_003b) || \
193         defined(mbx860_004b) || \
194         defined(mbx860_005b) || \
195         defined(mbx860_006b) || \
196         defined(mbx821_001b) || \
197         defined(mbx821_002b) || \
198         defined(mbx821_003b) || \
199         defined(mbx821_004b) || \
200         defined(mbx821_005b) || \
201         defined(mbx821_006b))
202  bsp_clicks_per_usec = 0;  /* for 32768Hz extclk */
203#else
204  bsp_clicks_per_usec = 1;  /* for 4MHz extclk */
205#endif
206
207  bsp_serial_per_sec = 10000000;
208  bsp_serial_external_clock = 1;
209  bsp_serial_xon_xoff = 0;
210  bsp_serial_cts_rts = 1;
211  bsp_serial_rate = 9600;
212#if ( defined(mbx821_001) || defined(mbx821_001b) || defined(mbx860_001b) )
213  bsp_clock_speed = 50000000;
214  bsp_timer_average_overhead = 3;
215  bsp_timer_least_valid = 3;
216#else
217  bsp_clock_speed = 40000000;
218  bsp_timer_average_overhead = 3;
219  bsp_timer_least_valid = 3;
220#endif
221
222  m8xx.scc2.sccm=0;
223  m8xx.scc2p.rbase=0;
224  m8xx.scc2p.tbase=0;
225  m8xx_cp_execute_cmd( M8xx_CR_OP_STOP_TX | M8xx_CR_CHAN_SCC2 );
226  /*
227   * Initalize RTEMS IRQ system
228   */
229  BSP_rtems_irq_mng_init(0);
230#ifdef SHOW_MORE_INIT_SETTINGS
231  printk("Exit from bspstart\n");
232#endif
233
234}
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