source: rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c @ 9b4422a2

4.11
Last change on this file since 9b4422a2 was 9b4422a2, checked in by Joel Sherrill <joel.sherrill@…>, on May 3, 2012 at 3:09:24 PM

Remove All CVS Id Strings Possible Using a Script

Script does what is expected and tries to do it as
smartly as possible.

+ remove occurrences of two blank comment lines

next to each other after Id string line removed.

+ remove entire comment blocks which only exited to

contain CVS Ids

+ If the processing left a blank line at the top of

a file, it was removed.

  • Property mode set to 100644
File size: 4.9 KB
Line 
1/*  bspstart.c
2 *
3 *  This set of routines starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  COPYRIGHT (c) 1989-2007.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 *  The license and distribution terms for this file may be
12 *  found in the file LICENSE in this distribution or at
13 *  http://www.rtems.com/license/LICENSE.
14 *
15 *  Modifications for MBX860:
16 *  Copyright (c) 1999, National Research Council of Canada
17 */
18
19#include <bsp.h>
20#include <bsp/irq.h>
21#include <rtems/bspIo.h>
22#include <libcpu/cpuIdent.h>
23#include <libcpu/spr.h>
24#include <rtems/powerpc/powerpc.h>
25
26SPR_RW(SPRG1)
27
28int bsp_interrupt_initialize(void);
29
30/*
31 *  Driver configuration parameters
32 */
33uint32_t   bsp_clicks_per_usec;
34uint32_t   bsp_clock_speed;
35uint32_t   bsp_serial_per_sec;         /* Serial clocks per second */
36bool       bsp_serial_external_clock;
37bool       bsp_serial_xon_xoff;
38bool       bsp_serial_cts_rts;
39uint32_t   bsp_serial_rate;
40uint32_t   bsp_timer_average_overhead; /* Average overhead of timer in ticks */
41uint32_t   bsp_timer_least_valid;      /* Least valid number from timer      */
42bool       bsp_timer_internal_clock;   /* TRUE, when timer runs with CPU clk */
43
44extern char IntrStack_start [];
45extern char intrStack [];
46
47void BSP_panic(char *s)
48{
49  printk("%s PANIC %s\n",_RTEMS_version, s);
50  __asm__ __volatile ("sc");
51}
52
53void _BSP_Fatal_error(unsigned int v)
54{
55  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
56  __asm__ __volatile ("sc");
57}
58
59/*
60 *  bsp_start()
61 *
62 *  Board-specific initialization code. Called from the generic boot_card()
63 *  function defined in rtems/c/src/lib/libbsp/shared/main.c. That function
64 *  does some of the board independent initialization. It is called from the
65 *  MBX8xx entry point _start() defined in
66 *  rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S
67 *
68 *  _start() has set up a stack, has zeroed the .bss section, has turned off
69 *  interrupts, and placed the processor in the supervisor mode. boot_card()
70 *  has left the processor in that state when bsp_start() was called.
71 *
72 *  RUNS WITH ADDRESS TRANSLATION AND CACHING TURNED OFF!
73 *  ASSUMES THAT THE VIRTUAL ADDRESSES WILL BE IDENTICAL TO THE PHYSICAL
74 *  ADDRESSES. Software-controlled address translation would be required
75 *  otherwise.
76 *
77 *  Input parameters: NONE
78 *
79 *  Output parameters: NONE
80 *
81 *  Return values: NONE
82 */
83void bsp_start(void)
84{
85  rtems_status_code sc = RTEMS_SUCCESSFUL;
86  ppc_cpu_id_t myCpu;
87  ppc_cpu_revision_t myCpuRevision;
88
89  /*
90   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
91   * store the result in global variables so that it can be used latter...
92   */
93  myCpu         = get_ppc_cpu_type();
94  myCpuRevision = get_ppc_cpu_revision();
95
96  mmu_init();
97
98  /*
99   * Enable instruction and data caches. Do not force writethrough mode.
100   */
101#if NVRAM_CONFIGURE == 1
102  if ( nvram->cache_mode & 0x02 )
103    rtems_cache_enable_instruction();
104  if ( nvram->cache_mode & 0x01 )
105    rtems_cache_enable_data();
106#else
107#if BSP_INSTRUCTION_CACHE_ENABLED
108  rtems_cache_enable_instruction();
109#endif
110#if BSP_DATA_CACHE_ENABLED
111  rtems_cache_enable_data();
112#endif
113#endif
114
115  /* Initialize exception handler */
116  sc = ppc_exc_initialize(
117    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
118    (uintptr_t) IntrStack_start,
119    (uintptr_t) intrStack - (uintptr_t) IntrStack_start
120  );
121  if ( sc != RTEMS_SUCCESSFUL ) {
122    BSP_panic( "cannot initialize exceptions" );
123  }
124
125  /* Initalize interrupt support */
126  sc = bsp_interrupt_initialize();
127  if ( sc != RTEMS_SUCCESSFUL ) {
128    BSP_panic( "cannot initialize interrupts" );
129  }
130
131  /*
132   *  initialize the device driver parameters
133   */
134
135#if    ( defined(mbx860_001b) || \
136         defined(mbx860_002b) || \
137         defined(mbx860_003b) || \
138         defined(mbx860_003b) || \
139         defined(mbx860_004b) || \
140         defined(mbx860_005b) || \
141         defined(mbx860_006b) || \
142         defined(mbx821_001b) || \
143         defined(mbx821_002b) || \
144         defined(mbx821_003b) || \
145         defined(mbx821_004b) || \
146         defined(mbx821_005b) || \
147         defined(mbx821_006b))
148  bsp_clicks_per_usec = 0;  /* for 32768Hz extclk */
149#else
150  bsp_clicks_per_usec = 1;  /* for 4MHz extclk */
151#endif
152
153  bsp_serial_per_sec = 10000000;
154  bsp_serial_external_clock = true;
155  bsp_serial_xon_xoff = false;
156  bsp_serial_cts_rts = true;
157  bsp_serial_rate = 9600;
158#if ( defined(mbx821_001) || defined(mbx821_001b) || defined(mbx860_001b) )
159  bsp_clock_speed = 50000000;
160  bsp_timer_average_overhead = 3;
161  bsp_timer_least_valid = 3;
162#else
163  bsp_clock_speed = 40000000;
164  bsp_timer_average_overhead = 3;
165  bsp_timer_least_valid = 3;
166#endif
167
168  m8xx.scc2.sccm=0;
169  m8xx.scc2p.rbase=0;
170  m8xx.scc2p.tbase=0;
171  m8xx_cp_execute_cmd( M8xx_CR_OP_STOP_TX | M8xx_CR_CHAN_SCC2 );
172
173#ifdef SHOW_MORE_INIT_SETTINGS
174  printk("Exit from bspstart\n");
175#endif
176
177}
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