source: rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c @ 3d1c0aa

4.104.114.84.95
Last change on this file since 3d1c0aa was 3d1c0aa, checked in by Joel Sherrill <joel.sherrill@…>, on 11/01/02 at 21:54:51

2002-11-01 Joel Sherrill <joel@…>

  • clock/p_clock.c, console/console.c, startup/bspstart.c: Removed warnings.
  • Property mode set to 100644
File size: 6.8 KB
Line 
1/*  bspstart.c
2 *
3 *  This set of routines starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  COPYRIGHT (c) 1989-1998.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 *  The license and distribution terms for this file may be
12 *  found in the file LICENSE in this distribution or at
13 *  http://www.OARcorp.com/rtems/license.html.
14 *
15 *  Modifications for MBX860:
16 *  Copyright (c) 1999, National Research Council of Canada
17 *
18 *  $Id$
19 */
20
21#include <string.h>
22
23#include <bsp.h>
24#include <bsp/irq.h>
25#include <rtems/libio.h>
26#include <rtems/libcsupport.h>
27#include <rtems/bspIo.h>
28#include <libcpu/cpuIdent.h>
29
30/*
31 *  The original table from the application (in ROM) and our copy of it with
32 *  some changes. Configuration is defined in <confdefs.h>. Make sure that
33 *  our configuration tables are uninitialized so that they get allocated in
34 *  the .bss section (RAM).
35 */
36extern rtems_configuration_table Configuration;
37extern unsigned long intrStackPtr;
38rtems_configuration_table  BSP_Configuration;
39
40rtems_cpu_table Cpu_table;
41
42char *rtems_progname;
43
44/*
45 *  Use the shared implementations of the following routines.
46 *  Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
47 *  rtems/c/src/lib/libbsp/shared/bsplibc.c.
48 */
49void bsp_postdriver_hook(void);
50void bsp_libc_init( void *, unsigned32, int );
51
52void BSP_panic(char *s)
53{
54  printk("%s PANIC %s\n",_RTEMS_version, s);
55  __asm__ __volatile ("sc");
56}
57
58void _BSP_Fatal_error(unsigned int v)
59{
60  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
61  __asm__ __volatile ("sc");
62}
63
64/*
65 *  bsp_pretasking_hook
66 *
67 *  Called when RTEMS initialization is complete but before interrupts and
68 *  tasking are enabled. Used to setup libc and install any BSP extensions.
69 *
70 *  Must not use libc (to do io) from here, since drivers are not yet
71 *  initialized.
72 *
73 *  Installed in the rtems_cpu_table defined in
74 *  rtems/c/src/exec/score/cpu/m68k/cpu.h in main() below. Called from
75 *  rtems_initialize_executive() defined in rtems/c/src/exec/sapi/src/init.c
76 *
77 *  Input parameters: NONE
78 *
79 *  Output parameters: NONE
80 *
81 *  Return values: NONE
82 */
83void bsp_pretasking_hook(void)
84{
85  /*
86   *  These are assigned addresses in the linkcmds file for the BSP. This
87   *  approach is better than having these defined as manifest constants and
88   *  compiled into the kernel, but it is still not ideal when dealing with
89   *  multiprocessor configuration in which each board as a different memory
90   *  map. A better place for defining these symbols might be the makefiles.
91   *  Consideration should also be given to developing an approach in which
92   *  the kernel and the application can be linked and burned into ROM
93   *  independently of each other.
94   */
95    extern unsigned char _HeapStart;
96    extern unsigned char _HeapEnd;
97
98    bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
99 
100#ifdef RTEMS_DEBUG
101  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
102#endif
103}
104
105
106/*
107 *  bsp_start()
108 *
109 *  Board-specific initialization code. Called from the generic boot_card()
110 *  function defined in rtems/c/src/lib/libbsp/shared/main.c. That function
111 *  does some of the board independent initialization. It is called from the
112 *  MBX8xx entry point _start() defined in
113 *  rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S
114 *
115 *  _start() has set up a stack, has zeroed the .bss section, has turned off
116 *  interrupts, and placed the processor in the supervisor mode. boot_card()
117 *  has left the processor in that state when bsp_start() was called.
118 *
119 *  RUNS WITH ADDRESS TRANSLATION AND CACHING TURNED OFF!
120 *  ASSUMES THAT THE VIRTUAL ADDRESSES WILL BE IDENTICAL TO THE PHYSICAL
121 *  ADDRESSES. Software-controlled address translation would be required
122 *  otherwise.
123 *
124 *  Input parameters: NONE
125 *
126 *  Output parameters: NONE
127 *
128 *  Return values: NONE
129 */
130void bsp_start(void)
131{
132  extern void *_WorkspaceBase;
133 
134  ppc_cpu_id_t myCpu;
135  ppc_cpu_revision_t myCpuRevision;
136  register unsigned char* intrStack;
137  register unsigned int intrNestingLevel = 0;
138 
139  /*
140   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
141   * store the result in global variables so that it can be used latter...
142   */
143  myCpu         = get_ppc_cpu_type();
144  myCpuRevision = get_ppc_cpu_revision();
145
146  mmu_init();
147 
148  /*
149   * Enable instruction and data caches. Do not force writethrough mode.
150   */
151#if NVRAM_CONFIGURE == 1
152  if ( nvram->cache_mode & 0x02 )
153    rtems_cache_enable_instruction();
154  if ( nvram->cache_mode & 0x01 )
155    rtems_cache_enable_data();
156#else
157#ifdef INSTRUCTION_CACHE_ENABLE
158  rtems_cache_enable_instruction();
159#endif
160#ifdef DATA_CACHE_ENABLE
161  rtems_cache_enable_data();
162#endif
163#endif
164  /*
165   * Initialize some SPRG registers related to irq handling
166   */
167 
168  intrStack = (((unsigned char*)&intrStackPtr) - CPU_MINIMUM_STACK_FRAME_SIZE);
169  asm volatile ("mtspr  273, %0" : "=r" (intrStack) : "0" (intrStack));
170  asm volatile ("mtspr  272, %0" : "=r" (intrNestingLevel) : "0" (intrNestingLevel));
171
172  /*
173   * Install our own set of exception vectors
174   */
175  initialize_exceptions();
176
177
178  /*
179   *  Allocate the memory for the RTEMS Work Space.  This can come from
180   *  a variety of places: hard coded address, malloc'ed from outside
181   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
182   *  typically done by stock BSPs) by subtracting the required amount
183   *  of work space from the last physical address on the CPU board.
184   *
185   *  In this case, the memory is not malloc'ed.  It is just
186   *  "pulled from the air".
187   */
188  BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
189
190  /*
191   *  initialize the CPU table for this BSP
192   */
193
194  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
195  Cpu_table.postdriver_hook = bsp_postdriver_hook;
196  if( Cpu_table.interrupt_stack_size < 4 * 1024 )
197      Cpu_table.interrupt_stack_size = 4 * 1024;
198
199  Cpu_table.clicks_per_usec = 1;  /* for 4MHz extclk */
200  Cpu_table.serial_per_sec = 10000000;
201  Cpu_table.serial_external_clock = 1;
202  Cpu_table.serial_xon_xoff = 0;
203  Cpu_table.serial_cts_rts = 1;
204  Cpu_table.serial_rate = 9600;
205#if ( defined(mbx821_001) || defined(mbx821_001b) || defined(mbx860_001b) )
206  Cpu_table.clock_speed = 50000000;
207  Cpu_table.timer_average_overhead = 3;
208  Cpu_table.timer_least_valid = 3;
209#else
210  Cpu_table.clock_speed = 40000000;
211  Cpu_table.timer_average_overhead = 3;
212  Cpu_table.timer_least_valid = 3;
213#endif
214
215  /*
216   * Call this in case we use TERMIOS for console I/O
217   */
218  m8xx_uart_reserve_resources( &BSP_Configuration );
219
220  m8xx.scc2.sccm=0;
221  m8xx.scc2p.rbase=0;
222  m8xx.scc2p.tbase=0;
223  m8xx_cp_execute_cmd( M8xx_CR_OP_STOP_TX | M8xx_CR_CHAN_SCC2 );
224  /*
225   * Initalize RTEMS IRQ system
226   */
227  BSP_rtems_irq_mng_init(0);
228#ifdef SHOW_MORE_INIT_SETTINGS
229  printk("Exit from bspstart\n");
230#endif 
231
232}
233
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