source: rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c @ 35bb69b

4.104.114.84.95
Last change on this file since 35bb69b was 35bb69b, checked in by Joel Sherrill <joel.sherrill@…>, on Apr 6, 2001 at 3:52:03 PM

2001-03-30 Eric Valette <valette@…>

  • clock/.cvsignore, clock/Makefile.am, clock/p_clock.c, include/8xx_immap.h, include/commproc.h, include/mbx.h, irq/.cvsignore, irq/Makefile.am, irq/irq.c, irq/irq.h, irq/irq_asm.S, irq/irq_init.c, vectors/.cvsignore, vectors/Makefile.am, vectors/vectors.S, vectors/vectors.h, vectors/vectors_init.c: New files.
  • Makefile.am, configure.in, console/console.c, include/Makefile.am, network/network.c, startup/Makefile.am, startup/bspstart.c, startup/imbx8xx.c, startup/linkcmds, startup/mmutlbtab.c, startup/start.S, wrapup/Makefile.am: The modifications to this BSP reflect the conversion of the mpc8xx CPU to the "new exception processing model."
  • Property mode set to 100644
File size: 6.8 KB
Line 
1/*  bspstart.c
2 *
3 *  This set of routines starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  COPYRIGHT (c) 1989-1998.
9 *  On-Line Applications Research Corporation (OAR).
10 *  Copyright assigned to U.S. Government, 1994.
11 *
12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
14 *  http://www.OARcorp.com/rtems/license.html.
15 *
16 *  Modifications for MBX860:
17 *  Copyright (c) 1999, National Research Council of Canada
18 *
19 *  $Id$
20 */
21
22#include <string.h>
23
24#include <bsp.h>
25#include <rtems/libio.h>
26#include <rtems/libcsupport.h>
27
28/*
29 *  The original table from the application (in ROM) and our copy of it with
30 *  some changes. Configuration is defined in <confdefs.h>. Make sure that
31 *  our configuration tables are uninitialized so that they get allocated in
32 *  the .bss section (RAM).
33 */
34extern rtems_configuration_table Configuration;
35extern unsigned long intrStackPtr;
36rtems_configuration_table  BSP_Configuration;
37
38rtems_cpu_table Cpu_table;
39
40char *rtems_progname;
41
42/*
43 *  Use the shared implementations of the following routines.
44 *  Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
45 *  rtems/c/src/lib/libbsp/shared/bsplibc.c.
46 */
47void bsp_postdriver_hook(void);
48void bsp_libc_init( void *, unsigned32, int );
49
50void BSP_panic(char *s)
51{
52  printk("%s PANIC %s\n",_RTEMS_version, s);
53  __asm__ __volatile ("sc"); 
54}
55
56void _BSP_Fatal_error(unsigned int v)
57{
58  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
59  __asm__ __volatile ("sc"); 
60}
61
62/*
63 *  bsp_pretasking_hook
64 *
65 *  Called when RTEMS initialization is complete but before interrupts and
66 *  tasking are enabled. Used to setup libc and install any BSP extensions.
67 *
68 *  Must not use libc (to do io) from here, since drivers are not yet
69 *  initialized.
70 *
71 *  Installed in the rtems_cpu_table defined in
72 *  rtems/c/src/exec/score/cpu/m68k/cpu.h in main() below. Called from
73 *  rtems_initialize_executive() defined in rtems/c/src/exec/sapi/src/init.c
74 *
75 *  Input parameters: NONE
76 *
77 *  Output parameters: NONE
78 *
79 *  Return values: NONE
80 */
81void bsp_pretasking_hook(void)
82{
83  /*
84   *  These are assigned addresses in the linkcmds file for the BSP. This
85   *  approach is better than having these defined as manifest constants and
86   *  compiled into the kernel, but it is still not ideal when dealing with
87   *  multiprocessor configuration in which each board as a different memory
88   *  map. A better place for defining these symbols might be the makefiles.
89   *  Consideration should also be given to developing an approach in which
90   *  the kernel and the application can be linked and burned into ROM
91   *  independently of each other.
92   */
93    extern unsigned char _HeapStart;
94    extern unsigned char _HeapEnd;
95
96    bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
97 
98#ifdef RTEMS_DEBUG
99  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
100#endif
101}
102
103
104/*
105 *  bsp_start()
106 *
107 *  Board-specific initialization code. Called from the generic boot_card()
108 *  function defined in rtems/c/src/lib/libbsp/shared/main.c. That function
109 *  does some of the board independent initialization. It is called from the
110 *  MBX8xx entry point _start() defined in
111 *  rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S
112 *
113 *  _start() has set up a stack, has zeroed the .bss section, has turned off
114 *  interrupts, and placed the processor in the supervisor mode. boot_card()
115 *  has left the processor in that state when bsp_start() was called.
116 *
117 *  RUNS WITH ADDRESS TRANSLATION AND CACHING TURNED OFF!
118 *  ASSUMES THAT THE VIRTUAL ADDRESSES WILL BE IDENTICAL TO THE PHYSICAL
119 *  ADDRESSES. Software-controlled address translation would be required
120 *  otherwise.
121 *
122 *  Input parameters: NONE
123 *
124 *  Output parameters: NONE
125 *
126 *  Return values: NONE
127 */
128void bsp_start(void)
129{
130  extern void *_WorkspaceBase;
131 
132  ppc_cpu_id_t myCpu;
133  ppc_cpu_revision_t myCpuRevision;
134  register unsigned char* intrStack;
135  register unsigned int intrNestingLevel = 0;
136 
137  /*
138   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
139   * store the result in global variables so that it can be used latter...
140   */
141  myCpu         = get_ppc_cpu_type();
142  myCpuRevision = get_ppc_cpu_revision();
143
144  mmu_init();
145 
146  /*
147   * Enable instruction and data caches. Do not force writethrough mode.
148   */
149#if NVRAM_CONFIGURE == 1
150  if ( nvram->cache_mode & 0x02 )
151    rtems_cache_enable_instruction();
152  if ( nvram->cache_mode & 0x01 )
153    rtems_cache_enable_data();
154#else
155#ifdef INSTRUCTION_CACHE_ENABLE
156  rtems_cache_enable_instruction();
157#endif
158#ifdef DATA_CACHE_ENABLE
159  rtems_cache_enable_data();
160#endif
161#endif
162  /*
163   * Initialize some SPRG registers related to irq handling
164   */
165 
166  intrStack = (((unsigned char*)&intrStackPtr) - CPU_MINIMUM_STACK_FRAME_SIZE);
167  asm volatile ("mtspr  273, %0" : "=r" (intrStack) : "0" (intrStack));
168  asm volatile ("mtspr  272, %0" : "=r" (intrNestingLevel) : "0" (intrNestingLevel));
169
170  /*
171   * Install our own set of exception vectors
172   */
173  initialize_exceptions();
174
175
176  /*
177   *  Allocate the memory for the RTEMS Work Space.  This can come from
178   *  a variety of places: hard coded address, malloc'ed from outside
179   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
180   *  typically done by stock BSPs) by subtracting the required amount
181   *  of work space from the last physical address on the CPU board.
182   *
183   *  In this case, the memory is not malloc'ed.  It is just
184   *  "pulled from the air".
185   */
186  BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
187
188  /*
189   *  initialize the CPU table for this BSP
190   */
191
192  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
193  Cpu_table.postdriver_hook = bsp_postdriver_hook;
194  if( Cpu_table.interrupt_stack_size < 4 * 1024 )
195      Cpu_table.interrupt_stack_size = 4 * 1024;
196
197  Cpu_table.clicks_per_usec = 1;  /* for 4MHz extclk */
198  Cpu_table.serial_per_sec = 10000000;
199  Cpu_table.serial_external_clock = 1;
200  Cpu_table.serial_xon_xoff = 0;
201  Cpu_table.serial_cts_rts = 1;
202  Cpu_table.serial_rate = 9600;
203#if ( defined(mbx821_001) || defined(mbx821_001b) || defined(mbx860_001b) )
204  Cpu_table.clock_speed = 50000000;
205  Cpu_table.timer_average_overhead = 3;
206  Cpu_table.timer_least_valid = 3;
207#else
208  Cpu_table.clock_speed = 40000000;
209  Cpu_table.timer_average_overhead = 3;
210  Cpu_table.timer_least_valid = 3;
211#endif
212
213  /*
214   * Call this in case we use TERMIOS for console I/O
215   */
216  m8xx_uart_reserve_resources( &BSP_Configuration );
217
218  m8xx.scc2.sccm=0;
219  m8xx.scc2p.rbase=0;
220  m8xx.scc2p.tbase=0;
221  m8xx_cp_execute_cmd( M8xx_CR_OP_STOP_TX | M8xx_CR_CHAN_SCC2 );
222  /*
223   * Initalize RTEMS IRQ system
224   */
225  BSP_rtems_irq_mng_init(0);
226#ifdef SHOW_MORE_INIT_SETTINGS
227  printk("Exit from bspstart\n");
228#endif 
229
230}
231
Note: See TracBrowser for help on using the repository browser.