source: rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c @ 24bf11e

4.115
Last change on this file since 24bf11e was 24bf11e, checked in by Sebastian Huber <sebastian.huber@…>, on 02/12/14 at 09:31:38

score: Add CPU counter support

Add a CPU counter interface to allow access to a free-running counter.
It is useful to measure short time intervals. This can be used for
example to enable profiling of critical low-level functions.

Add two busy wait functions rtems_counter_delay_ticks() and
rtems_counter_delay_nanoseconds() implemented via the CPU counter.

  • Property mode set to 100644
File size: 4.8 KB
Line 
1/*  bspstart.c
2 *
3 *  This set of routines starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  COPYRIGHT (c) 1989-2007.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 *  The license and distribution terms for this file may be
12 *  found in the file LICENSE in this distribution or at
13 *  http://www.rtems.com/license/LICENSE.
14 *
15 *  Modifications for MBX860:
16 *  Copyright (c) 1999, National Research Council of Canada
17 */
18
19#include <bsp.h>
20#include <bsp/irq.h>
21#include <rtems/bspIo.h>
22#include <rtems/counter.h>
23#include <libcpu/cpuIdent.h>
24#include <libcpu/spr.h>
25#include <rtems/powerpc/powerpc.h>
26
27SPR_RW(SPRG1)
28
29int bsp_interrupt_initialize(void);
30
31/*
32 *  Driver configuration parameters
33 */
34uint32_t   bsp_clicks_per_usec;
35uint32_t   bsp_clock_speed;
36uint32_t   bsp_serial_per_sec;         /* Serial clocks per second */
37bool       bsp_serial_external_clock;
38bool       bsp_serial_xon_xoff;
39bool       bsp_serial_cts_rts;
40uint32_t   bsp_serial_rate;
41uint32_t   bsp_timer_average_overhead; /* Average overhead of timer in ticks */
42uint32_t   bsp_timer_least_valid;      /* Least valid number from timer      */
43bool       bsp_timer_internal_clock;   /* TRUE, when timer runs with CPU clk */
44
45extern char IntrStack_start [];
46extern char intrStack [];
47
48void BSP_panic(char *s)
49{
50  printk("%s PANIC %s\n",_RTEMS_version, s);
51  __asm__ __volatile ("sc");
52}
53
54void _BSP_Fatal_error(unsigned int v)
55{
56  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
57  __asm__ __volatile ("sc");
58}
59
60/*
61 *  bsp_start()
62 *
63 *  Board-specific initialization code. Called from the generic boot_card()
64 *  function defined in rtems/c/src/lib/libbsp/shared/main.c. That function
65 *  does some of the board independent initialization. It is called from the
66 *  MBX8xx entry point _start() defined in
67 *  rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S
68 *
69 *  _start() has set up a stack, has zeroed the .bss section, has turned off
70 *  interrupts, and placed the processor in the supervisor mode. boot_card()
71 *  has left the processor in that state when bsp_start() was called.
72 *
73 *  RUNS WITH ADDRESS TRANSLATION AND CACHING TURNED OFF!
74 *  ASSUMES THAT THE VIRTUAL ADDRESSES WILL BE IDENTICAL TO THE PHYSICAL
75 *  ADDRESSES. Software-controlled address translation would be required
76 *  otherwise.
77 *
78 *  Input parameters: NONE
79 *
80 *  Output parameters: NONE
81 *
82 *  Return values: NONE
83 */
84void bsp_start(void)
85{
86  ppc_cpu_id_t myCpu;
87  ppc_cpu_revision_t myCpuRevision;
88
89  /*
90   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
91   * store the result in global variables so that it can be used latter...
92   */
93  myCpu         = get_ppc_cpu_type();
94  myCpuRevision = get_ppc_cpu_revision();
95
96  mmu_init();
97
98  /*
99   * Enable instruction and data caches. Do not force writethrough mode.
100   */
101#if NVRAM_CONFIGURE == 1
102  if ( nvram->cache_mode & 0x02 )
103    rtems_cache_enable_instruction();
104  if ( nvram->cache_mode & 0x01 )
105    rtems_cache_enable_data();
106#else
107#if BSP_INSTRUCTION_CACHE_ENABLED
108  rtems_cache_enable_instruction();
109#endif
110#if BSP_DATA_CACHE_ENABLED
111  rtems_cache_enable_data();
112#endif
113#endif
114
115  /* Initialize exception handler */
116  ppc_exc_initialize(
117    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
118    (uintptr_t) IntrStack_start,
119    (uintptr_t) intrStack - (uintptr_t) IntrStack_start
120  );
121
122  /* Initalize interrupt support */
123  bsp_interrupt_initialize();
124
125  /*
126   *  initialize the device driver parameters
127   */
128
129#if    ( defined(mbx860_001b) || \
130         defined(mbx860_002b) || \
131         defined(mbx860_003b) || \
132         defined(mbx860_003b) || \
133         defined(mbx860_004b) || \
134         defined(mbx860_005b) || \
135         defined(mbx860_006b) || \
136         defined(mbx821_001b) || \
137         defined(mbx821_002b) || \
138         defined(mbx821_003b) || \
139         defined(mbx821_004b) || \
140         defined(mbx821_005b) || \
141         defined(mbx821_006b))
142  bsp_clicks_per_usec = 0;  /* for 32768Hz extclk */
143#else
144  bsp_clicks_per_usec = 1;  /* for 4MHz extclk */
145#endif
146  rtems_counter_initialize_converter(bsp_clicks_per_usec * 1000000);
147
148  bsp_serial_per_sec = 10000000;
149  bsp_serial_external_clock = true;
150  bsp_serial_xon_xoff = false;
151  bsp_serial_cts_rts = true;
152  bsp_serial_rate = 9600;
153#if ( defined(mbx821_001) || defined(mbx821_001b) || defined(mbx860_001b) )
154  bsp_clock_speed = 50000000;
155  bsp_timer_average_overhead = 3;
156  bsp_timer_least_valid = 3;
157#else
158  bsp_clock_speed = 40000000;
159  bsp_timer_average_overhead = 3;
160  bsp_timer_least_valid = 3;
161#endif
162
163  m8xx.scc2.sccm=0;
164  m8xx.scc2p.rbase=0;
165  m8xx.scc2p.tbase=0;
166  m8xx_cp_execute_cmd( M8xx_CR_OP_STOP_TX | M8xx_CR_CHAN_SCC2 );
167
168#ifdef SHOW_MORE_INIT_SETTINGS
169  printk("Exit from bspstart\n");
170#endif
171
172}
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