source: rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c @ 182712f7

4.104.114.84.95
Last change on this file since 182712f7 was 182712f7, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 12, 2001 at 9:07:01 PM

2001-10-12 Joel Sherrill <joel@…>

  • clock/p_clock.c, include/bsp.h, include/coverhd.h, startup/bspstart.c, startup/bspstart.c.nocache, startup/setvec.c, startup/start.S: Fixed typo.
  • Property mode set to 100644
File size: 6.8 KB
Line 
1/*  bspstart.c
2 *
3 *  This set of routines starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  COPYRIGHT (c) 1989-1998.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 *  The license and distribution terms for this file may be
12 *  found in the file LICENSE in this distribution or at
13 *  http://www.OARcorp.com/rtems/license.html.
14 *
15 *  Modifications for MBX860:
16 *  Copyright (c) 1999, National Research Council of Canada
17 *
18 *  $Id$
19 */
20
21#include <string.h>
22
23#include <bsp.h>
24#include <rtems/libio.h>
25#include <rtems/libcsupport.h>
26
27/*
28 *  The original table from the application (in ROM) and our copy of it with
29 *  some changes. Configuration is defined in <confdefs.h>. Make sure that
30 *  our configuration tables are uninitialized so that they get allocated in
31 *  the .bss section (RAM).
32 */
33extern rtems_configuration_table Configuration;
34extern unsigned long intrStackPtr;
35rtems_configuration_table  BSP_Configuration;
36
37rtems_cpu_table Cpu_table;
38
39char *rtems_progname;
40
41/*
42 *  Use the shared implementations of the following routines.
43 *  Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
44 *  rtems/c/src/lib/libbsp/shared/bsplibc.c.
45 */
46void bsp_postdriver_hook(void);
47void bsp_libc_init( void *, unsigned32, int );
48
49void BSP_panic(char *s)
50{
51  printk("%s PANIC %s\n",_RTEMS_version, s);
52  __asm__ __volatile ("sc"); 
53}
54
55void _BSP_Fatal_error(unsigned int v)
56{
57  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
58  __asm__ __volatile ("sc"); 
59}
60
61/*
62 *  bsp_pretasking_hook
63 *
64 *  Called when RTEMS initialization is complete but before interrupts and
65 *  tasking are enabled. Used to setup libc and install any BSP extensions.
66 *
67 *  Must not use libc (to do io) from here, since drivers are not yet
68 *  initialized.
69 *
70 *  Installed in the rtems_cpu_table defined in
71 *  rtems/c/src/exec/score/cpu/m68k/cpu.h in main() below. Called from
72 *  rtems_initialize_executive() defined in rtems/c/src/exec/sapi/src/init.c
73 *
74 *  Input parameters: NONE
75 *
76 *  Output parameters: NONE
77 *
78 *  Return values: NONE
79 */
80void bsp_pretasking_hook(void)
81{
82  /*
83   *  These are assigned addresses in the linkcmds file for the BSP. This
84   *  approach is better than having these defined as manifest constants and
85   *  compiled into the kernel, but it is still not ideal when dealing with
86   *  multiprocessor configuration in which each board as a different memory
87   *  map. A better place for defining these symbols might be the makefiles.
88   *  Consideration should also be given to developing an approach in which
89   *  the kernel and the application can be linked and burned into ROM
90   *  independently of each other.
91   */
92    extern unsigned char _HeapStart;
93    extern unsigned char _HeapEnd;
94
95    bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
96 
97#ifdef RTEMS_DEBUG
98  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
99#endif
100}
101
102
103/*
104 *  bsp_start()
105 *
106 *  Board-specific initialization code. Called from the generic boot_card()
107 *  function defined in rtems/c/src/lib/libbsp/shared/main.c. That function
108 *  does some of the board independent initialization. It is called from the
109 *  MBX8xx entry point _start() defined in
110 *  rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S
111 *
112 *  _start() has set up a stack, has zeroed the .bss section, has turned off
113 *  interrupts, and placed the processor in the supervisor mode. boot_card()
114 *  has left the processor in that state when bsp_start() was called.
115 *
116 *  RUNS WITH ADDRESS TRANSLATION AND CACHING TURNED OFF!
117 *  ASSUMES THAT THE VIRTUAL ADDRESSES WILL BE IDENTICAL TO THE PHYSICAL
118 *  ADDRESSES. Software-controlled address translation would be required
119 *  otherwise.
120 *
121 *  Input parameters: NONE
122 *
123 *  Output parameters: NONE
124 *
125 *  Return values: NONE
126 */
127void bsp_start(void)
128{
129  extern void *_WorkspaceBase;
130 
131  ppc_cpu_id_t myCpu;
132  ppc_cpu_revision_t myCpuRevision;
133  register unsigned char* intrStack;
134  register unsigned int intrNestingLevel = 0;
135 
136  /*
137   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
138   * store the result in global variables so that it can be used latter...
139   */
140  myCpu         = get_ppc_cpu_type();
141  myCpuRevision = get_ppc_cpu_revision();
142
143  mmu_init();
144 
145  /*
146   * Enable instruction and data caches. Do not force writethrough mode.
147   */
148#if NVRAM_CONFIGURE == 1
149  if ( nvram->cache_mode & 0x02 )
150    rtems_cache_enable_instruction();
151  if ( nvram->cache_mode & 0x01 )
152    rtems_cache_enable_data();
153#else
154#ifdef INSTRUCTION_CACHE_ENABLE
155  rtems_cache_enable_instruction();
156#endif
157#ifdef DATA_CACHE_ENABLE
158  rtems_cache_enable_data();
159#endif
160#endif
161  /*
162   * Initialize some SPRG registers related to irq handling
163   */
164 
165  intrStack = (((unsigned char*)&intrStackPtr) - CPU_MINIMUM_STACK_FRAME_SIZE);
166  asm volatile ("mtspr  273, %0" : "=r" (intrStack) : "0" (intrStack));
167  asm volatile ("mtspr  272, %0" : "=r" (intrNestingLevel) : "0" (intrNestingLevel));
168
169  /*
170   * Install our own set of exception vectors
171   */
172  initialize_exceptions();
173
174
175  /*
176   *  Allocate the memory for the RTEMS Work Space.  This can come from
177   *  a variety of places: hard coded address, malloc'ed from outside
178   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
179   *  typically done by stock BSPs) by subtracting the required amount
180   *  of work space from the last physical address on the CPU board.
181   *
182   *  In this case, the memory is not malloc'ed.  It is just
183   *  "pulled from the air".
184   */
185  BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
186
187  /*
188   *  initialize the CPU table for this BSP
189   */
190
191  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
192  Cpu_table.postdriver_hook = bsp_postdriver_hook;
193  if( Cpu_table.interrupt_stack_size < 4 * 1024 )
194      Cpu_table.interrupt_stack_size = 4 * 1024;
195
196  Cpu_table.clicks_per_usec = 1;  /* for 4MHz extclk */
197  Cpu_table.serial_per_sec = 10000000;
198  Cpu_table.serial_external_clock = 1;
199  Cpu_table.serial_xon_xoff = 0;
200  Cpu_table.serial_cts_rts = 1;
201  Cpu_table.serial_rate = 9600;
202#if ( defined(mbx821_001) || defined(mbx821_001b) || defined(mbx860_001b) )
203  Cpu_table.clock_speed = 50000000;
204  Cpu_table.timer_average_overhead = 3;
205  Cpu_table.timer_least_valid = 3;
206#else
207  Cpu_table.clock_speed = 40000000;
208  Cpu_table.timer_average_overhead = 3;
209  Cpu_table.timer_least_valid = 3;
210#endif
211
212  /*
213   * Call this in case we use TERMIOS for console I/O
214   */
215  m8xx_uart_reserve_resources( &BSP_Configuration );
216
217  m8xx.scc2.sccm=0;
218  m8xx.scc2p.rbase=0;
219  m8xx.scc2p.tbase=0;
220  m8xx_cp_execute_cmd( M8xx_CR_OP_STOP_TX | M8xx_CR_CHAN_SCC2 );
221  /*
222   * Initalize RTEMS IRQ system
223   */
224  BSP_rtems_irq_mng_init(0);
225#ifdef SHOW_MORE_INIT_SETTINGS
226  printk("Exit from bspstart\n");
227#endif 
228
229}
230
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