source: rtems/c/src/lib/libbsp/powerpc/mbx8xx/network/network.c @ c7179542

4.104.114.84.95
Last change on this file since c7179542 was c7179542, checked in by Ralf Corsepius <ralf.corsepius@…>, on 09/19/05 at 06:15:46

2005-09-19 Ralf Corsepius <ralf.corsepius@…>

  • network/network.c: Include <errno.h> instead of <sys/errno.h>.
  • Property mode set to 100644
File size: 42.4 KB
Line 
1/*
2 * RTEMS/TCPIP driver for MPC8xx SCC1 Ethernet
3 *
4 *  Modified for MPC860 by Jay Monkman (jmonkman@frasca.com)
5 *
6 *  This supports Ethernet on either SCC1 or the FEC of the MPC860T.
7 *  Right now, we only do 10 Mbps, even with the FEC. The function
8 *  rtems_enet_driver_attach determines which one to use. Currently,
9 *  only one may be used at a time.
10 *
11 *  Based on the MC68360 network driver by
12 *  W. Eric Norum
13 *  Saskatchewan Accelerator Laboratory
14 *  University of Saskatchewan
15 *  Saskatoon, Saskatchewan, CANADA
16 *  eric@skatter.usask.ca
17 *
18 *  This supports ethernet on SCC1. Right now, we only do 10 Mbps.
19 *
20 *  Modifications by Darlene Stewart <Darlene.Stewart@iit.nrc.ca>
21 *  and Charles-Antoine Gauthier <charles.gauthier@iit.nrc.ca>
22 *  Copyright (c) 1999, National Research Council of Canada
23 *
24 *  $Id$
25 */
26#include <bsp.h>
27#include <stdio.h>
28#include <errno.h>
29#include <rtems/error.h>
30#include <rtems/rtems_bsdnet.h>
31
32#include <sys/param.h>
33#include <sys/mbuf.h>
34#include <sys/socket.h>
35#include <sys/sockio.h>
36
37#include <net/if.h>
38
39#include <netinet/in.h>
40#include <netinet/if_ether.h>
41#include <bsp/irq.h>
42
43#include <sys/types.h>
44#include <sys/socket.h>
45#include <arpa/inet.h>
46
47/*
48 * Number of interfaces supported by this driver
49 */
50#define NIFACES 1
51
52/*
53 * Default number of buffer descriptors set aside for this driver.
54 * The number of transmit buffer descriptors has to be quite large
55 * since a single frame often uses four or more buffer descriptors.
56 */
57#define RX_BUF_COUNT     32
58#define TX_BUF_COUNT     8
59#define TX_BD_PER_BUF    4
60
61#define INET_ADDR_MAX_BUF_SIZE (sizeof "255.255.255.255")
62
63/*
64 * RTEMS event used by interrupt handler to signal daemons.
65 * This must *not* be the same event used by the TCP/IP task synchronization.
66 */
67#define INTERRUPT_EVENT RTEMS_EVENT_1
68
69/*
70 * RTEMS event used to start transmit daemon.
71 * This must not be the same as INTERRUPT_EVENT.
72 */
73#define START_TRANSMIT_EVENT RTEMS_EVENT_2
74
75/*
76 * Receive buffer size -- Allow for a full ethernet packet plus CRC (1518).
77 * Round off to nearest multiple of RBUF_ALIGN.
78 */
79#define MAX_MTU_SIZE    1518
80#define RBUF_ALIGN              4
81#define RBUF_SIZE       ((MAX_MTU_SIZE + RBUF_ALIGN) & ~RBUF_ALIGN)
82
83#if (MCLBYTES < RBUF_SIZE)
84# error "Driver must have MCLBYTES > RBUF_SIZE"
85#endif
86
87/*
88 * Per-device data
89 */
90struct m8xx_enet_struct {
91        struct arpcom           arpcom;
92        struct mbuf             **rxMbuf;
93        struct mbuf             **txMbuf;
94        int                     acceptBroadcast;
95        int                     rxBdCount;
96        int                     txBdCount;
97        int                     txBdHead;
98        int                     txBdTail;
99        int                     txBdActiveCount;
100        m8xxBufferDescriptor_t  *rxBdBase;
101        m8xxBufferDescriptor_t  *txBdBase;
102        rtems_id                rxDaemonTid;
103        rtems_id                txDaemonTid;
104
105        /*
106         * Statistics
107         */
108        unsigned long   rxInterrupts;
109        unsigned long   rxNotFirst;
110        unsigned long   rxNotLast;
111        unsigned long   rxGiant;
112        unsigned long   rxNonOctet;
113        unsigned long   rxRunt;
114        unsigned long   rxBadCRC;
115        unsigned long   rxOverrun;
116        unsigned long   rxCollision;
117
118        unsigned long   txInterrupts;
119        unsigned long   txDeferred;
120        unsigned long   txHeartbeat;
121        unsigned long   txLateCollision;
122        unsigned long   txRetryLimit;
123        unsigned long   txUnderrun;
124        unsigned long   txLostCarrier;
125        unsigned long   txRawWait;
126};
127static struct m8xx_enet_struct enet_driver[NIFACES];
128
129static void  m8xx_scc1_ethernet_on(const rtems_irq_connect_data* ptr)
130{
131}
132
133static void  m8xx_scc1_ethernet_off(const rtems_irq_connect_data* ptr)
134{
135  /*
136   * Please put relevant code there
137   */
138}
139
140static void  m8xx_scc1_ethernet_isOn(const rtems_irq_connect_data* ptr)
141{
142  int BSP_irq_enabled_at_cpm(const rtems_irq_number );
143  BSP_irq_enabled_at_cpm (ptr->name);
144}
145
146/*
147 * SCC1 interrupt handler
148 */
149static void m8xx_scc1_interrupt_handler (void *unused)
150{
151    /* Frame received? */
152        if ((m8xx.scc1.sccm & 0x8) && (m8xx.scc1.scce & 0x8)) {
153                m8xx.scc1.scce = 0x8;           /* Clear receive frame int */
154                m8xx.scc1.sccm &= ~0x8;         /* Disable receive frame ints */
155                enet_driver[0].rxInterrupts++; /* Rx int has occurred */
156                rtems_event_send (enet_driver[0].rxDaemonTid, INTERRUPT_EVENT);
157        }
158
159        /* Buffer transmitted or transmitter error? */
160        if ((m8xx.scc1.sccm & 0x12) && (m8xx.scc1.scce & 0x12)) {
161                m8xx.scc1.scce = 0x12;          /* Clear Tx int */
162                m8xx.scc1.sccm &= ~0x12;        /* Disable Tx ints */
163                enet_driver[0].txInterrupts++; /* Tx int has occurred */
164                rtems_event_send (enet_driver[0].txDaemonTid, INTERRUPT_EVENT);
165        }
166}
167
168#ifdef MPC860T
169/*
170 * FEC interrupt handler
171 */
172static void m860_fec_interrupt_handler ()
173{
174  /*
175   * Frame received?
176   */
177  if (m8xx.fec.ievent & M8xx_FEC_IEVENT_RFINT) {
178    m8xx.fec.ievent = M8xx_FEC_IEVENT_RFINT;
179    enet_driver[0].rxInterrupts++;
180    rtems_event_send (enet_driver[0].rxDaemonTid, INTERRUPT_EVENT);
181  }
182
183  /*
184   * Buffer transmitted or transmitter error?
185   */
186  if (m8xx.fec.ievent & M8xx_FEC_IEVENT_TFINT) {
187    m8xx.fec.ievent = M8xx_FEC_IEVENT_TFINT;
188    enet_driver[0].txInterrupts++;
189    rtems_event_send (enet_driver[0].txDaemonTid, INTERRUPT_EVENT);
190  }
191}
192#endif
193
194static rtems_irq_connect_data ethernetSCC1IrqData = {
195  BSP_CPM_IRQ_SCC1,
196  (rtems_irq_hdl) m8xx_scc1_interrupt_handler,
197  0,
198  (rtems_irq_enable) m8xx_scc1_ethernet_on,
199  (rtems_irq_disable) m8xx_scc1_ethernet_off,
200  (rtems_irq_is_enabled)m8xx_scc1_ethernet_isOn
201};
202
203/*
204 * Initialize the ethernet hardware
205 */
206static void
207m8xx_enet_initialize (struct m8xx_enet_struct *sc)
208{
209  int i;
210  unsigned char *hwaddr;
211
212  /*
213   * Configure port A
214   * PA15 is enet RxD. Set PAPAR(15) to 1, PADIR(15) to 0.
215   * PA14 is enet TxD. Set PAPAR(14) to 1, PADIR(14) to 0, PAODR(14) to 0.
216   * PA7 is input CLK1. Set PAPAR(7) to 1, PADIR(7) to 0.
217   * PA6 is input CLK2. Set PAPAR(6) to 1, PADIR(6) to 0.
218   */
219  m8xx.papar |=  0x303;
220  m8xx.padir &= ~0x303;
221  m8xx.paodr &= ~0x2;
222
223  /*
224   * Configure port C
225   * PC11 is CTS1*. Set PCPAR(11) to 0, PCDIR(11) to 0, and PCSO(11) to 1.
226   * PC10 is CD1*. Set PCPAR(10) to 0, PCDIR(10) to 0, and PCSO(10) to 1.
227   */
228  m8xx.pcpar &= ~0x30;
229  m8xx.pcdir &= ~0x30;
230  m8xx.pcso  |=  0x30;
231
232  /*
233   * Connect CLK1 and CLK2 to SCC1 in the SICR.
234   * CLK1 is TxClk, CLK2 is RxClk. No grant mechanism, SCC1 is directly
235   * connected to the NMSI pins.
236   * R1CS = 0b101 (CLK2)
237   * T1CS = 0b100 (CLK1)
238   */
239  m8xx.sicr |= 0x2C;
240
241  /*
242   * Initialize SDMA configuration register
243   */
244  m8xx.sdcr = 1;
245
246  /*
247   * Allocate mbuf pointers
248   */
249  sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf,
250                       M_MBUF, M_NOWAIT);
251  sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf,
252                       M_MBUF, M_NOWAIT);
253  if (!sc->rxMbuf || !sc->txMbuf)
254    rtems_panic ("No memory for mbuf pointers");
255
256  /*
257   * Set receiver and transmitter buffer descriptor bases
258   */
259  sc->rxBdBase = m8xx_bd_allocate(sc->rxBdCount);
260  sc->txBdBase = m8xx_bd_allocate(sc->txBdCount);
261  m8xx.scc1p.rbase = (char *)sc->rxBdBase - (char *)&m8xx;
262  m8xx.scc1p.tbase = (char *)sc->txBdBase - (char *)&m8xx;
263
264  /*
265   * Send "Init parameters" command
266   */
267  m8xx_cp_execute_cmd (M8xx_CR_OP_INIT_RX_TX | M8xx_CR_CHAN_SCC1);
268
269  /*
270   * Set receive and transmit function codes
271   */
272  m8xx.scc1p.rfcr = M8xx_RFCR_MOT | M8xx_RFCR_DMA_SPACE(0);
273  m8xx.scc1p.tfcr = M8xx_TFCR_MOT | M8xx_TFCR_DMA_SPACE(0);
274
275  /*
276   * Set maximum receive buffer length
277   */
278  m8xx.scc1p.mrblr = RBUF_SIZE;
279
280  /*
281   * Set CRC parameters
282   */
283  m8xx.scc1p.un.ethernet.c_pres = 0xFFFFFFFF;
284  m8xx.scc1p.un.ethernet.c_mask = 0xDEBB20E3;
285
286  /*
287   * Clear diagnostic counters
288   */
289  m8xx.scc1p.un.ethernet.crcec = 0;
290  m8xx.scc1p.un.ethernet.alec = 0;
291  m8xx.scc1p.un.ethernet.disfc = 0;
292
293  /*
294   * Set pad value
295   */
296  m8xx.scc1p.un.ethernet.pads = 0x8888;
297
298  /*
299   * Set retry limit
300   */
301  m8xx.scc1p.un.ethernet.ret_lim = 15;
302
303  /*
304   * Set maximum and minimum frame length
305   */
306  m8xx.scc1p.un.ethernet.mflr = 1518;
307  m8xx.scc1p.un.ethernet.minflr = 64;
308  m8xx.scc1p.un.ethernet.maxd1 = MAX_MTU_SIZE;
309  m8xx.scc1p.un.ethernet.maxd2 = MAX_MTU_SIZE;
310
311  /*
312   * Clear group address hash table
313   */
314  m8xx.scc1p.un.ethernet.gaddr1 = 0;
315  m8xx.scc1p.un.ethernet.gaddr2 = 0;
316  m8xx.scc1p.un.ethernet.gaddr3 = 0;
317  m8xx.scc1p.un.ethernet.gaddr4 = 0;
318
319  /*
320   * Set our physical address
321   */
322  hwaddr = sc->arpcom.ac_enaddr;
323
324  m8xx.scc1p.un.ethernet.paddr_h = (hwaddr[5] << 8) | hwaddr[4];
325  m8xx.scc1p.un.ethernet.paddr_m = (hwaddr[3] << 8) | hwaddr[2];
326  m8xx.scc1p.un.ethernet.paddr_l = (hwaddr[1] << 8) | hwaddr[0];
327
328  /*
329   * Aggressive retry
330   */
331  m8xx.scc1p.un.ethernet.p_per = 0;
332
333  /*
334   * Clear individual address hash table
335   */
336  m8xx.scc1p.un.ethernet.iaddr1 = 0;
337  m8xx.scc1p.un.ethernet.iaddr2 = 0;
338  m8xx.scc1p.un.ethernet.iaddr3 = 0;
339  m8xx.scc1p.un.ethernet.iaddr4 = 0;
340
341  /*
342   * Clear temp address
343   */
344  m8xx.scc1p.un.ethernet.taddr_l = 0;
345  m8xx.scc1p.un.ethernet.taddr_m = 0;
346  m8xx.scc1p.un.ethernet.taddr_h = 0;
347
348  /*
349   * Set up receive buffer descriptors
350   */
351  for (i = 0 ; i < sc->rxBdCount ; i++) {
352    (sc->rxBdBase + i)->status = 0;
353  }
354
355  /*
356   * Set up transmit buffer descriptors
357   */
358  for (i = 0 ; i < sc->txBdCount ; i++) {
359    (sc->txBdBase + i)->status = 0;
360    sc->txMbuf[i] = NULL;
361  }
362  sc->txBdHead = sc->txBdTail = 0;
363  sc->txBdActiveCount = 0;
364
365  /*
366   * Clear any outstanding events
367   */
368  m8xx.scc1.scce = 0xFFFF;
369
370  /*
371   * Set up interrupts
372   */
373  if (!BSP_install_rtems_irq_handler (&ethernetSCC1IrqData)) {
374    rtems_panic ("Can't attach M8xx SCC1 interrupt handler\n");
375  }
376  m8xx.scc1.sccm = 0;     /* No interrupts unmasked till necessary */
377
378  /*
379   * Set up General SCC Mode Register
380   * Ethernet configuration
381   */
382  m8xx.scc1.gsmr_h = 0x0;
383  m8xx.scc1.gsmr_l = 0x1088000c;
384
385  /*
386   * Set up data synchronization register
387   * Ethernet synchronization pattern
388   */
389  m8xx.scc1.dsr = 0xd555;
390
391  /*
392   * Set up protocol-specific mode register
393   *      No Heartbeat check
394   *      No force collision
395   *      Discard short frames
396   *      Individual address mode
397   *      Ethernet CRC
398   *      Not promisuous
399   *      Ignore/accept broadcast packets as specified
400   *      Normal backoff timer
401   *      No loopback
402   *      No input sample at end of frame
403   *      64-byte limit for late collision
404   *      Wait 22 bits before looking for start of frame delimiter
405   *      Disable full-duplex operation
406   */
407  m8xx.scc1.psmr = 0x080A | (sc->acceptBroadcast ? 0 : 0x100);
408
409  /*
410   * Enable the TENA (RTS1*) pin
411   */
412  m8xx.pcpar |=  0x1;
413  m8xx.pcdir &= ~0x1;
414
415  /*
416   * Enable receiver and transmitter
417   */
418  m8xx.scc1.gsmr_l = 0x1088003c;
419}
420
421#ifdef MPC860T
422/*
423 * Please organize FEC controller code better by moving code from
424 * m860_fec_initialize_hardware to m8xx_fec_ethernet_on
425 */
426static void m8xx_fec_ethernet_on(){};
427static void m8xx_fec_ethernet_off(){};
428static int m8xx_fec_ethernet_isOn (const rtems_irq_connect_data* ptr)
429{
430  return BSP_irq_enabled_at_siu (ptr->name);
431}
432
433static rtems_irq_connect_data ethernetFECIrqData = {
434  BSP_FAST_ETHERNET_CTRL,
435  (rtems_irq_hdl) m8xx_fec_interrupt_handler,
436  (rtems_irq_enable) m8xx_fec_ethernet_on,
437  (rtems_irq_disable) m8xx_fec_ethernet_off,
438  (rtems_irq_is_enabled)m8xx_fec_ethernet_isOn
439};
440
441static void
442m860_fec_initialize_hardware (struct m860_enet_struct *sc)
443{
444  int i;
445  unsigned char *hwaddr;
446  rtems_status_code status;
447  rtems_isr_entry old_handler;
448
449  /*
450   * Issue reset to FEC
451   */
452  m8xx.fec.ecntrl=0x1;
453
454  /*
455   * Put ethernet transciever in reset
456   */
457  m8xx.pgcra |= 0x80;
458
459  /*
460   * Configure I/O ports
461   */
462  m8xx.pdpar = 0x1fff;
463  m8xx.pddir = 0x1c58;
464
465  /*
466   * Take ethernet transciever out of reset
467   */
468  m8xx.pgcra &= ~0x80;
469
470  /*
471   * Set SIU interrupt level to LVL2
472   *
473   */
474  m8xx.fec.ivec = ((((unsigned) BSP_FAST_ETHERNET_CTRL)/2) << 29);
475
476  /*
477   * Set the TX and RX fifo sizes. For now, we'll split it evenly
478   */
479  /* If you uncomment these, the FEC will not work right.
480  m8xx.fec.r_fstart = ((m8xx.fec.r_bound & 0x3ff) >> 2) & 0x3ff;
481  m8xx.fec.x_fstart = 0;
482  */
483
484  /*
485   * Set our physical address
486   */
487  hwaddr = sc->arpcom.ac_enaddr;
488
489  m8xx.fec.addr_low = (hwaddr[0] << 24) | (hwaddr[1] << 16) |
490                      (hwaddr[2] << 8)  | (hwaddr[3] << 0);
491  m8xx.fec.addr_high = (hwaddr[4] << 24) | (hwaddr[5] << 16);
492
493  /*
494   * Clear the hash table
495   */
496  m8xx.fec.hash_table_high = 0;
497  m8xx.fec.hash_table_low  = 0;
498
499  /*
500   * Set up receive buffer size
501   */
502  m8xx.fec.r_buf_size = 0x5f0; /* set to 1520 */
503
504  /*
505   * Allocate mbuf pointers
506   */
507  sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf,
508                       M_MBUF, M_NOWAIT);
509  sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf,
510                       M_MBUF, M_NOWAIT);
511  if (!sc->rxMbuf || !sc->txMbuf)
512    rtems_panic ("No memory for mbuf pointers");
513
514  /*
515   * Set receiver and transmitter buffer descriptor bases
516   */
517  sc->rxBdBase = m8xx_bd_allocate(sc->rxBdCount);
518  sc->txBdBase = m8xx_bd_allocate(sc->txBdCount);
519  m8xx.fec.r_des_start = (int)sc->rxBdBase;
520  m8xx.fec.x_des_start = (int)sc->txBdBase;
521
522  /*
523   * Set up Receive Control Register:
524   *   Not promiscuous mode
525   *   MII mode
526   *   Half duplex
527   *   No loopback
528   */
529  m8xx.fec.r_cntrl = 0x00000006;
530
531  /*
532   * Set up Transmit Control Register:
533   *   Half duplex
534   *   No heartbeat
535   */
536  m8xx.fec.x_cntrl = 0x00000000;
537
538  /*
539   * Set up DMA function code:
540   *   Big-endian
541   *   DMA functino code = 0
542   */
543  m8xx.fec.fun_code = 0x78000000;
544
545  /*
546   * Initialize SDMA configuration register
547   *   SDMA ignores FRZ
548   *   FEC not aggressive
549   *   FEC arbitration ID = 0 => U-bus arbitration = 6
550   *   RISC arbitration ID = 1 => U-bus arbitration = 5
551   */
552  m8xx.sdcr = 1;
553
554  /*
555   * Set MII speed to 2.5 MHz for 25 Mhz system clock
556   */
557  m8xx.fec.mii_speed = 0x0a;
558  m8xx.fec.mii_data = 0x58021000;
559
560  /*
561   * Set up receive buffer descriptors
562   */
563  for (i = 0 ; i < sc->rxBdCount ; i++)
564    (sc->rxBdBase + i)->status = 0;
565
566  /*
567   * Set up transmit buffer descriptors
568   */
569  for (i = 0 ; i < sc->txBdCount ; i++) {
570    (sc->txBdBase + i)->status = 0;
571    sc->txMbuf[i] = NULL;
572  }
573  sc->txBdHead = sc->txBdTail = 0;
574  sc->txBdActiveCount = 0;
575
576  /*
577   * Mask all FEC interrupts and clear events
578   */
579  m8xx.fec.imask = M8xx_FEC_IEVENT_TFINT |
580                   M8xx_FEC_IEVENT_RFINT;
581  m8xx.fec.ievent = ~0;
582
583  /*
584   * Set up interrupts
585   */
586  if (!BSP_install_rtems_irq_handler (&ethernetFECIrqData))
587    rtems_panic ("Can't attach M860 FEC interrupt handler\n");
588
589}
590#endif
591
592/*
593 * Soak up buffer descriptors that have been sent.
594 * Note that a buffer descriptor can't be retired as soon as it becomes
595 * ready. The MPC860 manual (MPC860UM/AD 07/98 Rev.1) and the MPC821
596 * manual state that, "If an Ethernet frame is made up of multiple
597 * buffers, the user should not reuse the first buffer descriptor until
598 * the last buffer descriptor of the frame has had its ready bit cleared
599 * by the CPM".
600 */
601static void
602m8xx_Enet_retire_tx_bd (struct m8xx_enet_struct *sc)
603{
604  uint16_t   status;
605  int i;
606  int nRetired;
607  struct mbuf *m, *n;
608
609  i = sc->txBdTail;
610  nRetired = 0;
611  while ((sc->txBdActiveCount != 0)
612        &&  (((status = (sc->txBdBase + i)->status) & M8xx_BD_READY) == 0)) {
613    /*
614     * See if anything went wrong
615     */
616    if (status & (M8xx_BD_DEFER |
617                  M8xx_BD_HEARTBEAT |
618                  M8xx_BD_LATE_COLLISION |
619                  M8xx_BD_RETRY_LIMIT |
620                  M8xx_BD_UNDERRUN |
621                  M8xx_BD_CARRIER_LOST)) {
622      /*
623       * Check for errors which stop the transmitter.
624       */
625      if (status & (M8xx_BD_LATE_COLLISION |
626                    M8xx_BD_RETRY_LIMIT |
627                    M8xx_BD_UNDERRUN)) {
628        if (status & M8xx_BD_LATE_COLLISION)
629          enet_driver[0].txLateCollision++;
630        if (status & M8xx_BD_RETRY_LIMIT)
631          enet_driver[0].txRetryLimit++;
632        if (status & M8xx_BD_UNDERRUN)
633          enet_driver[0].txUnderrun++;
634
635        /*
636         * Restart the transmitter
637         */
638        /* FIXME: this should get executed only if using the SCC */
639        m8xx_cp_execute_cmd (M8xx_CR_OP_RESTART_TX | M8xx_CR_CHAN_SCC1);
640      }
641      if (status & M8xx_BD_DEFER)
642        enet_driver[0].txDeferred++;
643      if (status & M8xx_BD_HEARTBEAT)
644        enet_driver[0].txHeartbeat++;
645      if (status & M8xx_BD_CARRIER_LOST)
646        enet_driver[0].txLostCarrier++;
647    }
648    nRetired++;
649    if (status & M8xx_BD_LAST) {
650      /*
651       * A full frame has been transmitted.
652       * Free all the associated buffer descriptors.
653       */
654      sc->txBdActiveCount -= nRetired;
655      while (nRetired) {
656        nRetired--;
657        m = sc->txMbuf[sc->txBdTail];
658        MFREE (m, n);
659        if (++sc->txBdTail == sc->txBdCount)
660          sc->txBdTail = 0;
661      }
662    }
663    if (++i == sc->txBdCount)
664      i = 0;
665  }
666}
667
668/*
669 * reader task
670 */
671static void
672scc_rxDaemon (void *arg)
673{
674  struct m8xx_enet_struct *sc = (struct m8xx_enet_struct *)arg;
675  struct ifnet *ifp = &sc->arpcom.ac_if;
676  struct mbuf *m;
677  uint16_t   status;
678  m8xxBufferDescriptor_t *rxBd;
679  int rxBdIndex;
680
681  /*
682   * Allocate space for incoming packets and start reception
683   */
684  for (rxBdIndex = 0 ; ;) {
685    rxBd = sc->rxBdBase + rxBdIndex;
686    MGETHDR (m, M_WAIT, MT_DATA);
687    MCLGET (m, M_WAIT);
688    m->m_pkthdr.rcvif = ifp;
689    sc->rxMbuf[rxBdIndex] = m;
690    rxBd->buffer = mtod (m, void *);
691    rxBd->status = M8xx_BD_EMPTY | M8xx_BD_INTERRUPT;
692    if (++rxBdIndex == sc->rxBdCount) {
693      rxBd->status |= M8xx_BD_WRAP;
694      break;
695    }
696  }
697
698  /*
699   * Input packet handling loop
700   */
701  rxBdIndex = 0;
702  for (;;) {
703    rxBd = sc->rxBdBase + rxBdIndex;
704
705    /*
706     * Wait for packet if there's not one ready
707     */
708    if ((status = rxBd->status) & M8xx_BD_EMPTY) {
709      /*
710       * Clear old events
711       */
712      m8xx.scc1.scce = 0x8;
713
714      /*
715       * Wait for packet
716       * Note that the buffer descriptor is checked
717       * *before* the event wait -- this catches the
718       * possibility that a packet arrived between the
719       * `if' above, and the clearing of the event register.
720       */
721      while ((status = rxBd->status) & M8xx_BD_EMPTY) {
722        rtems_event_set events;
723
724        /*
725         * Unmask RXF (Full frame received) event
726         */
727        m8xx.scc1.sccm |= 0x8;
728
729        rtems_bsdnet_event_receive (INTERRUPT_EVENT,
730                                    RTEMS_WAIT|RTEMS_EVENT_ANY,
731                                    RTEMS_NO_TIMEOUT,
732                                    &events);
733      }
734    }
735
736    /*
737     * Check that packet is valid
738     */
739    if ((status & (M8xx_BD_LAST |
740                   M8xx_BD_FIRST_IN_FRAME |
741                   M8xx_BD_LONG |
742                   M8xx_BD_NONALIGNED |
743                   M8xx_BD_SHORT |
744                   M8xx_BD_CRC_ERROR |
745                   M8xx_BD_OVERRUN |
746                   M8xx_BD_COLLISION)) ==
747        (M8xx_BD_LAST |
748         M8xx_BD_FIRST_IN_FRAME)) {
749      /*
750       * Pass the packet up the chain.
751       * FIXME: Packet filtering hook could be done here.
752       */
753      struct ether_header *eh;
754
755        /*
756         * Invalidate the buffer for this descriptor
757         */
758        rtems_cache_invalidate_multiple_data_lines((const void *)rxBd->buffer, rxBd->length);
759
760      m = sc->rxMbuf[rxBdIndex];
761      m->m_len = m->m_pkthdr.len = rxBd->length -
762        sizeof(uint32_t) -
763        sizeof(struct ether_header);
764      eh = mtod (m, struct ether_header *);
765      m->m_data += sizeof(struct ether_header);
766      ether_input (ifp, eh, m);
767
768      /*
769       * Allocate a new mbuf
770       */
771      MGETHDR (m, M_WAIT, MT_DATA);
772      MCLGET (m, M_WAIT);
773      m->m_pkthdr.rcvif = ifp;
774      sc->rxMbuf[rxBdIndex] = m;
775      rxBd->buffer = mtod (m, void *);
776    }
777    else {
778      /*
779       * Something went wrong with the reception
780       */
781      if (!(status & M8xx_BD_LAST))
782        sc->rxNotLast++;
783      if (!(status & M8xx_BD_FIRST_IN_FRAME))
784        sc->rxNotFirst++;
785      if (status & M8xx_BD_LONG)
786        sc->rxGiant++;
787      if (status & M8xx_BD_NONALIGNED)
788        sc->rxNonOctet++;
789      if (status & M8xx_BD_SHORT)
790        sc->rxRunt++;
791      if (status & M8xx_BD_CRC_ERROR)
792        sc->rxBadCRC++;
793      if (status & M8xx_BD_OVERRUN)
794        sc->rxOverrun++;
795      if (status & M8xx_BD_COLLISION)
796        sc->rxCollision++;
797    }
798
799    /*
800     * Reenable the buffer descriptor
801     */
802    rxBd->status = (status & (M8xx_BD_WRAP | M8xx_BD_INTERRUPT)) |
803                    M8xx_BD_EMPTY;
804
805    /*
806     * Move to next buffer descriptor
807     */
808    if (++rxBdIndex == sc->rxBdCount)
809      rxBdIndex = 0;
810  }
811}
812
813#ifdef MPC860T
814static void
815fec_rxDaemon (void *arg)
816{
817  struct m8xx_enet_struct *sc = (struct m8xx_enet_struct *)arg;
818  struct ifnet *ifp = &sc->arpcom.ac_if;
819  struct mbuf *m;
820  uint16_t   status;
821  m8xxBufferDescriptor_t *rxBd;
822  int rxBdIndex;
823
824  /*
825   * Allocate space for incoming packets and start reception
826   */
827  for (rxBdIndex = 0 ; ;) {
828    rxBd = sc->rxBdBase + rxBdIndex;
829    MGETHDR (m, M_WAIT, MT_DATA);
830    MCLGET (m, M_WAIT);
831    m->m_pkthdr.rcvif = ifp;
832    sc->rxMbuf[rxBdIndex] = m;
833    rxBd->buffer = mtod (m, void *);
834    rxBd->status = M8xx_BD_EMPTY;
835    m8xx.fec.r_des_active = 0x1000000;
836    if (++rxBdIndex == sc->rxBdCount) {
837      rxBd->status |= M8xx_BD_WRAP;
838      break;
839    }
840  }
841
842  /*
843   * Input packet handling loop
844   */
845  rxBdIndex = 0;
846  for (;;) {
847    rxBd = sc->rxBdBase + rxBdIndex;
848
849    /*
850     * Wait for packet if there's not one ready
851     */
852    if ((status = rxBd->status) & M8xx_BD_EMPTY) {
853      /*
854       * Clear old events
855       */
856      m8xx.fec.ievent = M8xx_FEC_IEVENT_RFINT;
857
858      /*
859       * Wait for packet
860       * Note that the buffer descriptor is checked
861       * *before* the event wait -- this catches the
862       * possibility that a packet arrived between the
863       * `if' above, and the clearing of the event register.
864       */
865      while ((status = rxBd->status) & M8xx_BD_EMPTY) {
866        rtems_event_set events;
867
868        /*
869         * Unmask RXF (Full frame received) event
870         */
871        m8xx.fec.ievent |= M8xx_FEC_IEVENT_RFINT;
872
873        rtems_bsdnet_event_receive (INTERRUPT_EVENT,
874                                    RTEMS_WAIT|RTEMS_EVENT_ANY,
875                                    RTEMS_NO_TIMEOUT,
876                                    &events);
877      }
878    }
879
880    /*
881     * Check that packet is valid
882     */
883    if (status & M8xx_BD_LAST) {
884      /*
885       * Pass the packet up the chain.
886       * FIXME: Packet filtering hook could be done here.
887       */
888      struct ether_header *eh;
889
890        /*
891                         * Invalidate the buffer for this descriptor
892                         */
893                        rtems_cache_invalidate_multiple_data_lines((const void *)rxBd->buffer, rxBd->length);
894
895      m = sc->rxMbuf[rxBdIndex];
896      m->m_len = m->m_pkthdr.len = rxBd->length -
897        sizeof(uint32_t) -
898        sizeof(struct ether_header);
899      eh = mtod (m, struct ether_header *);
900      m->m_data += sizeof(struct ether_header);
901      ether_input (ifp, eh, m);
902
903      /*
904       * Allocate a new mbuf
905       */
906      MGETHDR (m, M_WAIT, MT_DATA);
907      MCLGET (m, M_WAIT);
908      m->m_pkthdr.rcvif = ifp;
909      sc->rxMbuf[rxBdIndex] = m;
910      rxBd->buffer = mtod (m, void *);
911    }
912    else {
913      /*
914       * Something went wrong with the reception
915       */
916      if (!(status & M8xx_BD_LAST))
917        sc->rxNotLast++;
918      if (status & M8xx_BD_LONG)
919        sc->rxGiant++;
920      if (status & M8xx_BD_NONALIGNED)
921        sc->rxNonOctet++;
922      if (status & M8xx_BD_SHORT)
923        sc->rxRunt++;
924      if (status & M8xx_BD_CRC_ERROR)
925        sc->rxBadCRC++;
926      if (status & M8xx_BD_OVERRUN)
927        sc->rxOverrun++;
928      if (status & M8xx_BD_COLLISION)
929        sc->rxCollision++;
930    }
931    /*
932     * Reenable the buffer descriptor
933     */
934    rxBd->status = (status & M8xx_BD_WRAP) |
935                    M8xx_BD_EMPTY;
936    m8xx.fec.r_des_active = 0x1000000;
937    /*
938     * Move to next buffer descriptor
939     */
940    if (++rxBdIndex == sc->rxBdCount)
941      rxBdIndex = 0;
942  }
943}
944#endif
945
946static void
947scc_sendpacket (struct ifnet *ifp, struct mbuf *m)
948{
949  struct m8xx_enet_struct *sc = ifp->if_softc;
950  volatile m8xxBufferDescriptor_t *firstTxBd, *txBd;
951  struct mbuf *l = NULL;
952  uint16_t   status;
953  int nAdded;
954
955  /*
956   * Free up buffer descriptors
957   */
958  m8xx_Enet_retire_tx_bd (sc);
959
960  /*
961   * Set up the transmit buffer descriptors.
962   * No need to pad out short packets since the
963   * hardware takes care of that automatically.
964   * No need to copy the packet to a contiguous buffer
965   * since the hardware is capable of scatter/gather DMA.
966   */
967  nAdded = 0;
968  txBd = firstTxBd = sc->txBdBase + sc->txBdHead;
969  for (;;) {
970    /*
971     * Wait for buffer descriptor to become available.
972     */
973    if ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
974      /*
975       * Clear old events
976       */
977      m8xx.scc1.scce = 0x12;
978
979      /*
980       * Wait for buffer descriptor to become available.
981       * Note that the buffer descriptors are checked
982       * *before* * entering the wait loop -- this catches
983       * the possibility that a buffer descriptor became
984       * available between the `if' above, and the clearing
985       * of the event register.
986       * This is to catch the case where the transmitter
987       * stops in the middle of a frame -- and only the
988       * last buffer descriptor in a frame can generate
989       * an interrupt.
990       */
991      m8xx_Enet_retire_tx_bd (sc);
992      while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
993        rtems_event_set events;
994
995                                /*
996                                 * Unmask TXB (buffer transmitted) and
997                                 * TXE (transmitter error) events.
998                                 */
999        m8xx.scc1.sccm |= 0x12;
1000        rtems_bsdnet_event_receive (INTERRUPT_EVENT,
1001                                    RTEMS_WAIT|RTEMS_EVENT_ANY,
1002                                    RTEMS_NO_TIMEOUT,
1003                                    &events);
1004        m8xx_Enet_retire_tx_bd (sc);
1005      }
1006    }
1007
1008    /*
1009     * Don't set the READY flag till the
1010     * whole packet has been readied.
1011     */
1012    status = nAdded ? M8xx_BD_READY : 0;
1013
1014    /*
1015     *  FIXME: Why not deal with empty mbufs at at higher level?
1016     * The IP fragmentation routine in ip_output
1017     * can produce packet fragments with zero length.
1018     * I think that ip_output should be changed to get
1019     * rid of these zero-length mbufs, but for now,
1020     * I'll deal with them here.
1021     */
1022    if (m->m_len) {
1023      /*
1024       * Fill in the buffer descriptor
1025       */
1026      txBd->buffer = mtod (m, void *);
1027      txBd->length = m->m_len;
1028
1029      /*
1030       * Flush the buffer for this descriptor
1031       */
1032      rtems_cache_flush_multiple_data_lines((const void *)txBd->buffer, txBd->length);
1033
1034      sc->txMbuf[sc->txBdHead] = m;
1035      nAdded++;
1036      if (++sc->txBdHead == sc->txBdCount) {
1037        status |= M8xx_BD_WRAP;
1038        sc->txBdHead = 0;
1039      }
1040      l = m;
1041      m = m->m_next;
1042    }
1043    else {
1044      /*
1045       * Just toss empty mbufs
1046       */
1047      struct mbuf *n;
1048      MFREE (m, n);
1049      m = n;
1050      if (l != NULL)
1051        l->m_next = m;
1052    }
1053
1054    /*
1055     * Set the transmit buffer status.
1056     * Break out of the loop if this mbuf is the last in the frame.
1057     */
1058    if (m == NULL) {
1059      if (nAdded) {
1060        status |= M8xx_BD_PAD | M8xx_BD_LAST | M8xx_BD_TX_CRC | M8xx_BD_INTERRUPT;
1061        txBd->status = status;
1062        firstTxBd->status |= M8xx_BD_READY;
1063        sc->txBdActiveCount += nAdded;
1064      }
1065      break;
1066    }
1067    txBd->status = status;
1068    txBd = sc->txBdBase + sc->txBdHead;
1069  }
1070}
1071
1072#ifdef MPC860T
1073static void
1074fec_sendpacket (struct ifnet *ifp, struct mbuf *m)
1075{
1076  struct m8xx_enet_struct *sc = ifp->if_softc;
1077  volatile m8xxBufferDescriptor_t *firstTxBd, *txBd;
1078  /*  struct mbuf *l = NULL; */
1079  uint16_t   status;
1080  int nAdded;
1081
1082  /*
1083   * Free up buffer descriptors
1084   */
1085  m8xx_Enet_retire_tx_bd (sc);
1086
1087  /*
1088   * Set up the transmit buffer descriptors.
1089   * No need to pad out short packets since the
1090   * hardware takes care of that automatically.
1091   * No need to copy the packet to a contiguous buffer
1092   * since the hardware is capable of scatter/gather DMA.
1093   */
1094  nAdded = 0;
1095  txBd = firstTxBd = sc->txBdBase + sc->txBdHead;
1096  for (;;) {
1097    /*
1098     * Wait for buffer descriptor to become available.
1099     */
1100    if ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
1101      /*
1102       * Clear old events
1103       */
1104      m8xx.fec.ievent = M8xx_FEC_IEVENT_TFINT;
1105
1106      /*
1107       * Wait for buffer descriptor to become available.
1108       * Note that the buffer descriptors are checked
1109       * *before* * entering the wait loop -- this catches
1110       * the possibility that a buffer descriptor became
1111       * available between the `if' above, and the clearing
1112       * of the event register.
1113       * This is to catch the case where the transmitter
1114       * stops in the middle of a frame -- and only the
1115       * last buffer descriptor in a frame can generate
1116       * an interrupt.
1117       */
1118      m8xx_Enet_retire_tx_bd (sc);
1119      while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
1120        rtems_event_set events;
1121
1122        /*
1123         * Unmask TXB (buffer transmitted) and
1124         * TXE (transmitter error) events.
1125         */
1126        m8xx.fec.ievent |= M8xx_FEC_IEVENT_TFINT;
1127        rtems_bsdnet_event_receive (INTERRUPT_EVENT,
1128                                    RTEMS_WAIT|RTEMS_EVENT_ANY,
1129                                    RTEMS_NO_TIMEOUT,
1130                                    &events);
1131        m8xx_Enet_retire_tx_bd (sc);
1132      }
1133    }
1134
1135    /*
1136     * Don't set the READY flag till the
1137     * whole packet has been readied.
1138     */
1139    status = nAdded ? M8xx_BD_READY : 0;
1140
1141    /*
1142     *  FIXME: Why not deal with empty mbufs at at higher level?
1143     * The IP fragmentation routine in ip_output
1144     * can produce packet fragments with zero length.
1145     * I think that ip_output should be changed to get
1146     * rid of these zero-length mbufs, but for now,
1147     * I'll deal with them here.
1148     */
1149    if (m->m_len) {
1150      /*
1151       * Fill in the buffer descriptor
1152       */
1153      txBd->buffer = mtod (m, void *);
1154      txBd->length = m->m_len;
1155
1156      /*
1157       * Flush the buffer for this descriptor
1158       */
1159      rtems_cache_flush_multiple_data_lines(txBd->buffer, txBd->length);
1160
1161      sc->txMbuf[sc->txBdHead] = m;
1162      nAdded++;
1163      if (++sc->txBdHead == sc->txBdCount) {
1164        status |= M8xx_BD_WRAP;
1165        sc->txBdHead = 0;
1166      }
1167      /*      l = m;*/
1168      m = m->m_next;
1169    }
1170    else {
1171      /*
1172       * Just toss empty mbufs
1173       */
1174      struct mbuf *n;
1175      MFREE (m, n);
1176      m = n;
1177      /*
1178      if (l != NULL)
1179        l->m_next = m;
1180      */
1181    }
1182
1183    /*
1184     * Set the transmit buffer status.
1185     * Break out of the loop if this mbuf is the last in the frame.
1186     */
1187    if (m == NULL) {
1188      if (nAdded) {
1189        status |= M8xx_BD_LAST | M8xx_BD_TX_CRC;
1190        txBd->status = status;
1191        firstTxBd->status |= M8xx_BD_READY;
1192        m8xx.fec.x_des_active = 0x1000000;
1193        sc->txBdActiveCount += nAdded;
1194      }
1195      break;
1196    }
1197    txBd->status = status;
1198    txBd = sc->txBdBase + sc->txBdHead;
1199  }
1200}
1201#endif
1202
1203/*
1204 * Driver transmit daemon
1205 */
1206void
1207scc_txDaemon (void *arg)
1208{
1209  struct m8xx_enet_struct *sc = (struct m8xx_enet_struct *)arg;
1210  struct ifnet *ifp = &sc->arpcom.ac_if;
1211  struct mbuf *m;
1212  rtems_event_set events;
1213
1214  for (;;) {
1215    /*
1216     * Wait for packet
1217     */
1218    rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, RTEMS_EVENT_ANY | RTEMS_WAIT, RTEMS_NO_TIMEOUT, &events);
1219
1220    /*
1221     * Send packets till queue is empty
1222     */
1223    for (;;) {
1224      /*
1225       * Get the next mbuf chain to transmit.
1226       */
1227      IF_DEQUEUE(&ifp->if_snd, m);
1228      if (!m)
1229        break;
1230      scc_sendpacket (ifp, m);
1231    }
1232    ifp->if_flags &= ~IFF_OACTIVE;
1233  }
1234}
1235
1236#ifdef MPC860T
1237void
1238fec_txDaemon (void *arg)
1239{
1240  struct m8xx_enet_struct *sc = (struct m8xx_enet_struct *)arg;
1241  struct ifnet *ifp = &sc->arpcom.ac_if;
1242  struct mbuf *m;
1243  rtems_event_set events;
1244
1245  for (;;) {
1246    /*
1247     * Wait for packet
1248     */
1249    rtems_bsdnet_event_receive (START_TRANSMIT_EVENT,
1250                                RTEMS_EVENT_ANY | RTEMS_WAIT,
1251                                RTEMS_NO_TIMEOUT,
1252                                &events);
1253
1254    /*
1255     * Send packets till queue is empty
1256     */
1257    for (;;) {
1258      /*
1259       * Get the next mbuf chain to transmit.
1260       */
1261      IF_DEQUEUE(&ifp->if_snd, m);
1262      if (!m)
1263        break;
1264      fec_sendpacket (ifp, m);
1265    }
1266    ifp->if_flags &= ~IFF_OACTIVE;
1267  }
1268}
1269#endif
1270
1271/*
1272 * Send packet (caller provides header).
1273 */
1274static void
1275m8xx_enet_start (struct ifnet *ifp)
1276{
1277  struct m8xx_enet_struct *sc = ifp->if_softc;
1278
1279  rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT);
1280  ifp->if_flags |= IFF_OACTIVE;
1281}
1282
1283/*
1284 * Initialize and start the device
1285 */
1286static void
1287scc_init (void *arg)
1288{
1289  struct m8xx_enet_struct *sc = arg;
1290  struct ifnet *ifp = &sc->arpcom.ac_if;
1291
1292  if (sc->txDaemonTid == 0) {
1293
1294    /*
1295     * Set up SCC hardware
1296     */
1297    m8xx_enet_initialize (sc);
1298
1299    /*
1300     * Start driver tasks
1301     */
1302    sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, scc_txDaemon, sc);
1303    sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, scc_rxDaemon, sc);
1304
1305  }
1306
1307  /*
1308   * Set flags appropriately
1309   */
1310  if (ifp->if_flags & IFF_PROMISC)
1311    m8xx.scc1.psmr |= 0x200;
1312  else
1313    m8xx.scc1.psmr &= ~0x200;
1314
1315  /*
1316   * Tell the world that we're running.
1317   */
1318  ifp->if_flags |= IFF_RUNNING;
1319
1320  /*
1321   * Enable receiver and transmitter
1322   */
1323  m8xx.scc1.gsmr_l |= 0x30;
1324}
1325
1326#ifdef MPC860T
1327static void
1328fec_init (void *arg)
1329{
1330  struct m8xx_enet_struct *sc = arg;
1331  struct ifnet *ifp = &sc->arpcom.ac_if;
1332
1333  if (sc->txDaemonTid == 0) {
1334
1335    /*
1336     * Set up SCC hardware
1337     */
1338    m8xx_fec_initialize_hardware (sc);
1339
1340    /*
1341     * Start driver tasks
1342     */
1343    sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, fec_txDaemon, sc);
1344    sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, fec_rxDaemon, sc);
1345
1346  }
1347
1348  /*
1349   * Set flags appropriately
1350   */
1351  if (ifp->if_flags & IFF_PROMISC)
1352    m8xx.fec.r_cntrl |= 0x8;
1353  else
1354    m8xx.fec.r_cntrl &= ~0x8;
1355
1356  /*
1357   * Tell the world that we're running.
1358   */
1359  ifp->if_flags |= IFF_RUNNING;
1360
1361  /*
1362   * Enable receiver and transmitter
1363   */
1364  m8xx.fec.ecntrl = 0x2;
1365}
1366#endif
1367
1368/*
1369 * Stop the device
1370 */
1371static void
1372scc_stop (struct m8xx_enet_struct *sc)
1373{
1374  struct ifnet *ifp = &sc->arpcom.ac_if;
1375
1376  ifp->if_flags &= ~IFF_RUNNING;
1377
1378  /*
1379   * Shut down receiver and transmitter
1380   */
1381  m8xx.scc1.gsmr_l &= ~0x30;
1382}
1383
1384#ifdef MPC860T
1385static void
1386fec_stop (struct m8xx_enet_struct *sc)
1387{
1388  struct ifnet *ifp = &sc->arpcom.ac_if;
1389
1390  ifp->if_flags &= ~IFF_RUNNING;
1391
1392  /*
1393   * Shut down receiver and transmitter
1394   */
1395  m8xx.fec.ecntrl = 0x0;
1396}
1397#endif
1398
1399/*
1400 * Show interface statistics
1401 */
1402static void
1403enet_stats (struct m8xx_enet_struct *sc)
1404{
1405  printf ("      Rx Interrupts:%-8lu", sc->rxInterrupts);
1406  printf ("       Not First:%-8lu", sc->rxNotFirst);
1407  printf ("        Not Last:%-8lu\n", sc->rxNotLast);
1408  printf ("              Giant:%-8lu", sc->rxGiant);
1409  printf ("            Runt:%-8lu", sc->rxRunt);
1410  printf ("       Non-octet:%-8lu\n", sc->rxNonOctet);
1411  printf ("            Bad CRC:%-8lu", sc->rxBadCRC);
1412  printf ("         Overrun:%-8lu", sc->rxOverrun);
1413  printf ("       Collision:%-8lu\n", sc->rxCollision);
1414  printf ("          Discarded:%-8lu\n", (unsigned long)m8xx.scc1p.un.ethernet.disfc);
1415
1416  printf ("      Tx Interrupts:%-8lu", sc->txInterrupts);
1417  printf ("        Deferred:%-8lu", sc->txDeferred);
1418  printf (" Missed Hearbeat:%-8lu\n", sc->txHeartbeat);
1419  printf ("         No Carrier:%-8lu", sc->txLostCarrier);
1420  printf ("Retransmit Limit:%-8lu", sc->txRetryLimit);
1421  printf ("  Late Collision:%-8lu\n", sc->txLateCollision);
1422  printf ("           Underrun:%-8lu", sc->txUnderrun);
1423  printf (" Raw output wait:%-8lu\n", sc->txRawWait);
1424}
1425
1426/*
1427 * Driver ioctl handler
1428 */
1429static int
1430scc_ioctl (struct ifnet *ifp, u_long command, caddr_t data)
1431{
1432  struct m8xx_enet_struct *sc = ifp->if_softc;
1433  int error = 0;
1434
1435  switch (command) {
1436  case SIOCGIFADDR:
1437  case SIOCSIFADDR:
1438    ether_ioctl (ifp, command, data);
1439    break;
1440
1441  case SIOCSIFFLAGS:
1442    switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
1443    case IFF_RUNNING:
1444      scc_stop (sc);
1445      break;
1446
1447    case IFF_UP:
1448      scc_init (sc);
1449      break;
1450
1451    case IFF_UP | IFF_RUNNING:
1452      scc_stop (sc);
1453      scc_init (sc);
1454      break;
1455
1456    default:
1457      break;
1458    }
1459    break;
1460
1461  case SIO_RTEMS_SHOW_STATS:
1462    enet_stats (sc);
1463    break;
1464
1465    /*
1466     * FIXME: All sorts of multicast commands need to be added here!
1467     */
1468  default:
1469    error = EINVAL;
1470    break;
1471  }
1472  return error;
1473}
1474
1475#ifdef MPC860T
1476static int
1477fec_ioctl (struct ifnet *ifp, int command, caddr_t data)
1478{
1479  struct m8xx_enet_struct *sc = ifp->if_softc;
1480  int error = 0;
1481
1482  switch (command) {
1483  case SIOCGIFADDR:
1484  case SIOCSIFADDR:
1485    ether_ioctl (ifp, command, data);
1486    break;
1487
1488  case SIOCSIFFLAGS:
1489    switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
1490    case IFF_RUNNING:
1491      fec_stop (sc);
1492      break;
1493
1494    case IFF_UP:
1495      fec_init (sc);
1496      break;
1497
1498    case IFF_UP | IFF_RUNNING:
1499      fec_stop (sc);
1500      fec_init (sc);
1501      break;
1502
1503    default:
1504      break;
1505    }
1506    break;
1507
1508  case SIO_RTEMS_SHOW_STATS:
1509    enet_stats (sc);
1510    break;
1511
1512    /*
1513     * FIXME: All sorts of multicast commands need to be added here!
1514     */
1515  default:
1516    error = EINVAL;
1517    break;
1518  }
1519  return error;
1520}
1521#endif
1522
1523/*
1524 * Attach an SCC driver to the system
1525 */
1526int
1527rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config)
1528{
1529  struct m8xx_enet_struct *sc;
1530  struct ifnet *ifp;
1531  int mtu;
1532  int unitNumber;
1533  char *unitName;
1534#if NVRAM_CONFIGURE == 1
1535  char *pAddr;
1536  unsigned long addr;
1537#endif
1538
1539        /*
1540         * Parse driver name
1541         */
1542        if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0)
1543                return 0;
1544
1545        /*
1546         * Is driver free?
1547         */
1548        if ((unitNumber <= 0) || (unitNumber > NIFACES)) {
1549                printf ("Bad SCC unit number.\n");
1550                return 0;
1551        }
1552        sc = &enet_driver[unitNumber - 1];
1553        ifp = &sc->arpcom.ac_if;
1554        if (ifp->if_softc != NULL) {
1555                printf ("Driver already in use.\n");
1556                return 0;
1557        }
1558
1559  /*
1560   * Process options
1561   */
1562#if NVRAM_CONFIGURE == 1
1563
1564  /* Configure from NVRAM */
1565  if ( (addr = nvram->ipaddr) ) {
1566    /* We have a non-zero entry, copy the value */
1567    if ( (pAddr = malloc ( INET_ADDR_MAX_BUF_SIZE, 0, M_NOWAIT )) )
1568      config->ip_address = (char *)inet_ntop(AF_INET, &addr, pAddr, INET_ADDR_MAX_BUF_SIZE -1 );
1569    else
1570      rtems_panic("Can't allocate ip_address buffer!\n");
1571  }
1572
1573  if ( (addr = nvram->netmask) ) {
1574    /* We have a non-zero entry, copy the value */
1575    if ( (pAddr = malloc ( INET_ADDR_MAX_BUF_SIZE, 0, M_NOWAIT )) )
1576      config->ip_netmask = (char *)inet_ntop(AF_INET, &addr, pAddr, INET_ADDR_MAX_BUF_SIZE -1 );
1577    else
1578      rtems_panic("Can't allocate ip_netmask buffer!\n");
1579  }
1580
1581  /* Ethernet address requires special handling -- it must be copied into
1582   * the arpcom struct. The following if construct serves only to give the
1583   * User Area NVRAM parameter the highest priority.
1584   *
1585   * If the ethernet address is specified in NVRAM, go ahead and copy it.
1586   * (ETHER_ADDR_LEN = 6 bytes).
1587   */
1588  if ( nvram->enaddr[0] || nvram->enaddr[1] || nvram->enaddr[2] ) {
1589    /* Anything in the first three bytes indicates a non-zero entry, copy value */
1590        memcpy ((void *)sc->arpcom.ac_enaddr, &nvram->enaddr, ETHER_ADDR_LEN);
1591  }
1592  else if ( config->hardware_address ) {
1593    /* There is no entry in NVRAM, but there is in the ifconfig struct, so use it. */
1594    memcpy ((void *)sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
1595  }
1596  else {
1597    /* There is no ethernet address provided, so it could be read
1598     * from the Ethernet protocol block of SCC1 in DPRAM.
1599     */
1600    rtems_panic("No Ethernet address specified!\n");
1601  }
1602
1603#else /* NVRAM_CONFIGURE != 1 */
1604
1605  if (config->hardware_address) {
1606    memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
1607  }
1608  else {
1609    /* There is no ethernet address provided, so it could be read
1610     * from the Ethernet protocol block of SCC1 in DPRAM.
1611     */
1612    rtems_panic("No Ethernet address specified!\n");
1613  }
1614
1615#endif /* NVRAM_CONFIGURE != 1 */
1616
1617  if (config->mtu)
1618    mtu = config->mtu;
1619  else
1620    mtu = ETHERMTU;
1621  if (config->rbuf_count)
1622    sc->rxBdCount = config->rbuf_count;
1623  else
1624    sc->rxBdCount = RX_BUF_COUNT;
1625  if (config->xbuf_count)
1626    sc->txBdCount = config->xbuf_count;
1627  else
1628    sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF;
1629  sc->acceptBroadcast = !config->ignore_broadcast;
1630
1631  /*
1632   * Set up network interface values
1633   */
1634  ifp->if_softc = sc;
1635  ifp->if_unit = unitNumber;
1636  ifp->if_name = unitName;
1637  ifp->if_mtu = mtu;
1638  ifp->if_init = scc_init;
1639  ifp->if_ioctl = scc_ioctl;
1640  ifp->if_start = m8xx_enet_start;
1641  ifp->if_output = ether_output;
1642  ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX;
1643  if (ifp->if_snd.ifq_maxlen == 0)
1644    ifp->if_snd.ifq_maxlen = ifqmaxlen;
1645
1646  /*
1647   * Attach the interface
1648   */
1649  if_attach (ifp);
1650  ether_ifattach (ifp);
1651  return 1;
1652};
1653
1654#ifdef MPC860T
1655int
1656rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config)
1657{
1658  struct m8xx_enet_struct *sc;
1659  struct ifnet *ifp;
1660  int mtu;
1661  int unitNumber;
1662  char *unitName;
1663
1664        /*
1665         * Parse driver name
1666         */
1667        if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0)
1668                return 0;
1669
1670        /*
1671         * Is driver free?
1672         */
1673        if ((unitNumber <= 0) || (unitNumber > NIFACES)) {
1674                printf ("Bad SCC unit number.\n");
1675                return 0;
1676        }
1677        sc = &enet_driver[unitNumber - 1];
1678        ifp = &sc->arpcom.ac_if;
1679        if (ifp->if_softc != NULL) {
1680                printf ("Driver already in use.\n");
1681                return 0;
1682        }
1683
1684  /*
1685   * Process options
1686   */
1687  if (config->hardware_address) {
1688    memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
1689  }
1690  else {
1691                /* FIXME to read the enaddr from NVRAM */
1692  }
1693  if (config->mtu)
1694    mtu = config->mtu;
1695  else
1696    mtu = ETHERMTU;
1697  if (config->rbuf_count)
1698    sc->rxBdCount = config->rbuf_count;
1699  else
1700    sc->rxBdCount = RX_BUF_COUNT;
1701  if (config->xbuf_count)
1702    sc->txBdCount = config->xbuf_count;
1703  else
1704    sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF;
1705  sc->acceptBroadcast = !config->ignore_broadcast;
1706
1707  /*
1708   * Set up network interface values
1709   */
1710  ifp->if_softc = sc;
1711  ifp->if_unit = unitNumber;
1712  ifp->if_name = unitName;
1713  ifp->if_mtu = mtu;
1714  ifp->if_init = fec_init;
1715  ifp->if_ioctl = fec_ioctl;
1716  ifp->if_start = m8xx_enet_start;
1717  ifp->if_output = ether_output;
1718  ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX;
1719  if (ifp->if_snd.ifq_maxlen == 0)
1720    ifp->if_snd.ifq_maxlen = ifqmaxlen;
1721
1722  /*
1723   * Attach the interface
1724   */
1725  if_attach (ifp);
1726  ether_ifattach (ifp);
1727  return 1;
1728};
1729#endif
1730
1731int
1732rtems_enet_driver_attach(struct rtems_bsdnet_ifconfig *config, int attaching)
1733{
1734
1735#ifdef MPC860T
1736  if ((m8xx.fec.mii_data & 0xffff) == 0x2000) {
1737/*    rtems_scc1_driver_attach(config);*/
1738    return rtems_fec_driver_attach(config);
1739  }
1740  else {
1741#endif
1742    return rtems_scc1_driver_attach(config);
1743#ifdef MPC860T
1744  }
1745#endif
1746}
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