source: rtems/c/src/lib/libbsp/powerpc/helas403/startup/linkcmds @ c112b70b

4.104.114.84.95
Last change on this file since c112b70b was c112b70b, checked in by Ralf Corsepius <ralf.corsepius@…>, on Dec 15, 2003 at 8:06:07 AM

2003-12-15 Ralf Corsepius <corsepiu@…>

  • startup/linkcmds: Remove SEARCH_DIR.
  • startup/linkcmds.dl: Remove SEARCH_DIR.
  • Property mode set to 100644
File size: 5.6 KB
Line 
1/*
2 *  This file contains directives for the GNU linker which are specific
3 *  to the helas-403
4 *  This file is intended to be used together with flashentry.s
5 *  it will generate a ROM that can be started directly after powerup reset
6 *  $Id$
7 */
8
9OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
10              "elf32-powerpc")
11OUTPUT_ARCH(powerpc)
12 
13ENTRY(flash_entry)
14 
15MEMORY
16  {
17        RAM : ORIGIN = 0, LENGTH = 8M
18        FLASH : ORIGIN = 0xFFF00000, LENGTH = 512K
19  }
20
21  /* DIRTY TRICK: repeat addresses here, so we can work with them... */
22  flash.start = 0xFFF00000;
23  flash.size  = 512K;
24
25SECTIONS
26{
27  .entry :
28  {
29     *(.entry)
30  } > FLASH /* this is ROM for flash_entry */
31  .text :
32  {
33     text.start = . ;
34     *(.entry2)
35     *(.text)
36     *(.gnu.linkonce.t.*)
37     *(.rodata*)
38     *(.gnu.linkonce.r.*)
39     *(.rodata1)
40
41     /*
42      * Special FreeBSD sysctl sections.
43      */
44     . = ALIGN (16);
45     __start_set_sysctl_set = .;
46     *(set_sysctl_*);
47     __stop_set_sysctl_set = ABSOLUTE(.);
48     *(set_domain_*);
49     *(set_pseudo_*);
50
51     *(.eh_frame)
52     *(.descriptors)
53     *(rom_ver)
54     etext = ALIGN(0x10);
55     _etext = .;
56
57
58     __CTOR_LIST__ = .;
59     LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
60     *(.ctors)
61     LONG(0)
62     __CTOR_END__ = .;
63
64     __DTOR_LIST__ = .;
65     LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
66     *(.dtors)
67     LONG(0)
68     __DTOR_END__ = .;
69
70     *(.lit)
71     *(.shdata)
72     _init = .; *(.init)
73     _fini = .; *(.fini)
74     . = ALIGN(0x10);
75     _endtext = .;
76     text.end = .;
77     copy.src = .;
78     copy.tmptop.txt = .;
79  } > FLASH /* this is ROM for flash_entry */
80
81  text.size = text.end - text.start;
82
83  /* R/W Data */
84  /* place vectors to start at offset 0x100... */
85  /* IMPORTANT: sections ".fill" and ".vectors" must be the first in RAM!!*/
86  .fill 0x00010000 :
87  {
88    . = . + 0x0100;
89  } > RAM
90 
91  .vectors :              AT (copy.src)
92  {
93    copy.dest = .;
94    *(.vectors)
95    . = ALIGN(0x10);
96    copy.tmptop.vec = .;
97  } > RAM
98
99  .data :                 AT (copy.tmptop.vec - copy.dest + copy.src)
100  {
101    *(.data)
102    *(.data1)
103    *(.data.* .gnu.linkonce.d*)
104    PROVIDE (__SDATA_START__ = .);
105    *(.sdata)
106    *(.gnu.linkonce.s.*)
107    . = ALIGN(0x10);
108    copy.tmptop.dat = .;
109  } > RAM
110 
111  PROVIDE (__EXCEPT_START__ = .);
112  .gcc_except_table   :   AT (copy.tmptop.dat - copy.dest + copy.src)
113  {
114    *(.gcc_except_table)
115    . = ALIGN(0x10);
116    copy.tmptop.exc = .;
117  } >RAM
118  PROVIDE (__EXCEPT_END__ = .);
119
120  __GOT_START__ = .;
121  .got :                  AT (copy.tmptop.exc - copy.dest + copy.src)
122  {
123    s.got = .;
124    *(.got.plt) *(.got)
125    . = ALIGN(0x10);
126    copy.tmptop.got = .;
127  } > RAM
128  __GOT_END__ = .;
129
130  .got1 :                 AT (copy.tmptop.got - copy.dest + copy.src)
131  {
132    *(.got1)           
133    . = ALIGN(0x10);
134    copy.tmptop.gt1 = .;
135  } >RAM
136
137  PROVIDE (__GOT2_START__ = .);
138  PROVIDE (_GOT2_START_ = .);
139  .got2           :       AT (copy.tmptop.gt1 - copy.dest + copy.src)
140  {
141    *(.got2)   
142    . = ALIGN(0x10);
143    copy.tmptop.gt2 = .;
144  } >RAM
145  PROVIDE (__GOT2_END__ = .);
146  PROVIDE (_GOT2_END_ = .);
147
148  PROVIDE (__FIXUP_START__ = .);
149  PROVIDE (_FIXUP_START_ = .);
150  .fixup          :       AT (copy.tmptop.gt2 - copy.dest + copy.src)
151  {
152    *(.fixup)   
153    . = ALIGN(0x10);
154    copy.tmptop.fix = .;
155  } >RAM
156  PROVIDE (_FIXUP_END_ = .);
157  PROVIDE (__FIXUP_END__ = .);
158 
159  PROVIDE (__SDATA2_START__ = .);
160  .sdata2         :       AT (copy.tmptop.fix - copy.dest + copy.src)
161  {
162    *(.sdata2) 
163    . = ALIGN(0x10);
164    copy.tmptop.sda = .;
165  } >RAM
166
167  copy.size = copy.tmptop.sda - copy.dest;
168
169  .sbss2          :
170  {
171    *(.sbss2)   
172  } >RAM
173  PROVIDE (__SBSS2_END__ = .);
174
175  __SBSS_START__ = .;
176  .bss :
177  {
178    bss.start = .;
179    *(.bss) *(.sbss) *(COMMON)
180    bss.end = ALIGN(4);
181  } > RAM
182  __SBSS_END__ = .;
183 
184  bss.size = bss.end - bss.start;
185
186  /* reserve 16KByte for stack... */
187  stack.end = bss.end + 16K;
188  PROVIDE(_end = stack.end);
189
190
191  /* Stabs debugging sections.  */
192  .stab 0 : { *(.stab) }
193  .stabstr 0 : { *(.stabstr) }
194  .stab.excl 0 : { *(.stab.excl) }
195  .stab.exclstr 0 : { *(.stab.exclstr) }
196  .stab.index 0 : { *(.stab.index) }
197  .stab.indexstr 0 : { *(.stab.indexstr) }
198  .comment 0 : { *(.comment) }
199
200  /* DWARF debug sections.
201     Symbols in the DWARF debugging sections are relative to the beginning
202     of the section so we begin them at 0.  */
203  /* DWARF 1 */
204  .debug          0 : { *(.debug) }
205  .line           0 : { *(.line) }
206 
207  /* GNU DWARF 1 extensions */
208  .debug_srcinfo  0 : { *(.debug_srcinfo) }
209  .debug_sfnames  0 : { *(.debug_sfnames) }
210 
211  /* DWARF 1.1 and DWARF 2 */
212  .debug_aranges  0 : { *(.debug_aranges) }
213  .debug_pubnames 0 : { *(.debug_pubnames) }
214 
215  /* DWARF 2 */
216  .debug_info     0 : { *(.debug_info) }
217  .debug_abbrev   0 : { *(.debug_abbrev) }
218  .debug_line     0 : { *(.debug_line) }
219  .debug_frame    0 : { *(.debug_frame) }
220  .debug_str      0 : { *(.debug_str) }
221  .debug_loc      0 : { *(.debug_loc) }
222  .debug_macinfo  0 : { *(.debug_macinfo) }
223 
224  /* SGI/MIPS DWARF 2 extensions */
225  .debug_weaknames 0 : { *(.debug_weaknames) }
226  .debug_funcnames 0 : { *(.debug_funcnames) }
227  .debug_typenames 0 : { *(.debug_typenames) }
228  .debug_varnames  0 : { *(.debug_varnames) }
229
230  /* These must appear regardless of  .  */
231  /*
232   * place reset instruction into last word of FLASH
233   * NOTE: after reset, PPC403 starts executing from address
234   * 0xFFFFFFFC
235   * The reset section is placed in ROM at 0xF7FFFFFC instead,
236   * but a mirror of this address exists at 0xFFFFFFFC due to
237   * the initial memory controller setup
238   */
239  .reset  flash.start - 4 + flash.size :
240  {
241    *(.reset)
242  } > FLASH
243}
244
245
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