source: rtems/c/src/lib/libbsp/powerpc/helas403/startup/linkcmds @ 7c2239fe

4.104.114.84.95
Last change on this file since 7c2239fe was 7c2239fe, checked in by Ralf Corsepius <ralf.corsepius@…>, on Dec 9, 2003 at 2:52:05 PM

2003-12-09 Ralf Corsepius <corsepiu@…>

  • Makefile.am: Misc cleanups and fixes.
  • startup/Makefile.am: Misc cleanups and fixes.
  • startup/linkcmds: Preparations for gcc-3.3.x.
  • wrapup/Makefile.am: Misc cleanups and fixes.
  • Property mode set to 100644
File size: 5.6 KB
Line 
1/*
2 *  This file contains directives for the GNU linker which are specific
3 *  to the helas-403
4 *  This file is intended to be used together with flashentry.s
5 *  it will generate a ROM that can be started directly after powerup reset
6 *  $Id$
7 */
8
9OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
10              "elf32-powerpc")
11OUTPUT_ARCH(powerpc)
12 SEARCH_DIR(/usr/local/powerpc-rtems/lib);
13 
14ENTRY(flash_entry)
15 
16MEMORY
17  {
18        RAM : ORIGIN = 0, LENGTH = 8M
19        FLASH : ORIGIN = 0xFFF00000, LENGTH = 512K
20  }
21
22  /* DIRTY TRICK: repeat addresses here, so we can work with them... */
23  flash.start = 0xFFF00000;
24  flash.size  = 512K;
25
26SECTIONS
27{
28  .entry :
29  {
30     *(.entry)
31  } > FLASH /* this is ROM for flash_entry */
32  .text :
33  {
34     text.start = . ;
35     *(.entry2)
36     *(.text)
37     *(.gnu.linkonce.t.*)
38     *(.rodata*)
39     *(.gnu.linkonce.r.*)
40     *(.rodata1)
41
42     /*
43      * Special FreeBSD sysctl sections.
44      */
45     . = ALIGN (16);
46     __start_set_sysctl_set = .;
47     *(set_sysctl_*);
48     __stop_set_sysctl_set = ABSOLUTE(.);
49     *(set_domain_*);
50     *(set_pseudo_*);
51
52     *(.eh_frame)
53     *(.descriptors)
54     *(rom_ver)
55     etext = ALIGN(0x10);
56     _etext = .;
57
58
59     __CTOR_LIST__ = .;
60     LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
61     *(.ctors)
62     LONG(0)
63     __CTOR_END__ = .;
64
65     __DTOR_LIST__ = .;
66     LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
67     *(.dtors)
68     LONG(0)
69     __DTOR_END__ = .;
70
71     *(.lit)
72     *(.shdata)
73     _init = .; *(.init)
74     _fini = .; *(.fini)
75     . = ALIGN(0x10);
76     _endtext = .;
77     text.end = .;
78     copy.src = .;
79     copy.tmptop.txt = .;
80  } > FLASH /* this is ROM for flash_entry */
81
82  text.size = text.end - text.start;
83
84  /* R/W Data */
85  /* place vectors to start at offset 0x100... */
86  /* IMPORTANT: sections ".fill" and ".vectors" must be the first in RAM!!*/
87  .fill 0x00010000 :
88  {
89    . = . + 0x0100;
90  } > RAM
91 
92  .vectors :              AT (copy.src)
93  {
94    copy.dest = .;
95    *(.vectors)
96    . = ALIGN(0x10);
97    copy.tmptop.vec = .;
98  } > RAM
99
100  .data :                 AT (copy.tmptop.vec - copy.dest + copy.src)
101  {
102    *(.data)
103    *(.data1)
104    *(.data.* .gnu.linkonce.d*)
105    PROVIDE (__SDATA_START__ = .);
106    *(.sdata)
107    *(.gnu.linkonce.s.*)
108    . = ALIGN(0x10);
109    copy.tmptop.dat = .;
110  } > RAM
111 
112  PROVIDE (__EXCEPT_START__ = .);
113  .gcc_except_table   :   AT (copy.tmptop.dat - copy.dest + copy.src)
114  {
115    *(.gcc_except_table)
116    . = ALIGN(0x10);
117    copy.tmptop.exc = .;
118  } >RAM
119  PROVIDE (__EXCEPT_END__ = .);
120
121  __GOT_START__ = .;
122  .got :                  AT (copy.tmptop.exc - copy.dest + copy.src)
123  {
124    s.got = .;
125    *(.got.plt) *(.got)
126    . = ALIGN(0x10);
127    copy.tmptop.got = .;
128  } > RAM
129  __GOT_END__ = .;
130
131  .got1 :                 AT (copy.tmptop.got - copy.dest + copy.src)
132  {
133    *(.got1)           
134    . = ALIGN(0x10);
135    copy.tmptop.gt1 = .;
136  } >RAM
137
138  PROVIDE (__GOT2_START__ = .);
139  PROVIDE (_GOT2_START_ = .);
140  .got2           :       AT (copy.tmptop.gt1 - copy.dest + copy.src)
141  {
142    *(.got2)   
143    . = ALIGN(0x10);
144    copy.tmptop.gt2 = .;
145  } >RAM
146  PROVIDE (__GOT2_END__ = .);
147  PROVIDE (_GOT2_END_ = .);
148
149  PROVIDE (__FIXUP_START__ = .);
150  PROVIDE (_FIXUP_START_ = .);
151  .fixup          :       AT (copy.tmptop.gt2 - copy.dest + copy.src)
152  {
153    *(.fixup)   
154    . = ALIGN(0x10);
155    copy.tmptop.fix = .;
156  } >RAM
157  PROVIDE (_FIXUP_END_ = .);
158  PROVIDE (__FIXUP_END__ = .);
159 
160  PROVIDE (__SDATA2_START__ = .);
161  .sdata2         :       AT (copy.tmptop.fix - copy.dest + copy.src)
162  {
163    *(.sdata2) 
164    . = ALIGN(0x10);
165    copy.tmptop.sda = .;
166  } >RAM
167
168  copy.size = copy.tmptop.sda - copy.dest;
169
170  .sbss2          :
171  {
172    *(.sbss2)   
173  } >RAM
174  PROVIDE (__SBSS2_END__ = .);
175
176  __SBSS_START__ = .;
177  .bss :
178  {
179    bss.start = .;
180    *(.bss) *(.sbss) *(COMMON)
181    bss.end = ALIGN(4);
182  } > RAM
183  __SBSS_END__ = .;
184 
185  bss.size = bss.end - bss.start;
186
187  /* reserve 16KByte for stack... */
188  stack.end = bss.end + 16K;
189  PROVIDE(_end = stack.end);
190
191
192  /* Stabs debugging sections.  */
193  .stab 0 : { *(.stab) }
194  .stabstr 0 : { *(.stabstr) }
195  .stab.excl 0 : { *(.stab.excl) }
196  .stab.exclstr 0 : { *(.stab.exclstr) }
197  .stab.index 0 : { *(.stab.index) }
198  .stab.indexstr 0 : { *(.stab.indexstr) }
199  .comment 0 : { *(.comment) }
200
201  /* DWARF debug sections.
202     Symbols in the DWARF debugging sections are relative to the beginning
203     of the section so we begin them at 0.  */
204  /* DWARF 1 */
205  .debug          0 : { *(.debug) }
206  .line           0 : { *(.line) }
207 
208  /* GNU DWARF 1 extensions */
209  .debug_srcinfo  0 : { *(.debug_srcinfo) }
210  .debug_sfnames  0 : { *(.debug_sfnames) }
211 
212  /* DWARF 1.1 and DWARF 2 */
213  .debug_aranges  0 : { *(.debug_aranges) }
214  .debug_pubnames 0 : { *(.debug_pubnames) }
215 
216  /* DWARF 2 */
217  .debug_info     0 : { *(.debug_info) }
218  .debug_abbrev   0 : { *(.debug_abbrev) }
219  .debug_line     0 : { *(.debug_line) }
220  .debug_frame    0 : { *(.debug_frame) }
221  .debug_str      0 : { *(.debug_str) }
222  .debug_loc      0 : { *(.debug_loc) }
223  .debug_macinfo  0 : { *(.debug_macinfo) }
224 
225  /* SGI/MIPS DWARF 2 extensions */
226  .debug_weaknames 0 : { *(.debug_weaknames) }
227  .debug_funcnames 0 : { *(.debug_funcnames) }
228  .debug_typenames 0 : { *(.debug_typenames) }
229  .debug_varnames  0 : { *(.debug_varnames) }
230
231  /* These must appear regardless of  .  */
232  /*
233   * place reset instruction into last word of FLASH
234   * NOTE: after reset, PPC403 starts executing from address
235   * 0xFFFFFFFC
236   * The reset section is placed in ROM at 0xF7FFFFFC instead,
237   * but a mirror of this address exists at 0xFFFFFFFC due to
238   * the initial memory controller setup
239   */
240  .reset  flash.start - 4 + flash.size :
241  {
242    *(.reset)
243  } > FLASH
244}
245
246
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