source: rtems/c/src/lib/libbsp/powerpc/helas403/README @ 969de1f3

4.104.114.84.95
Last change on this file since 969de1f3 was 86dc490, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 5, 1998 at 6:21:11 PM

Update from Thomas Doerfler <td@…>.

  • Property mode set to 100644
File size: 2.9 KB
Line 
1#
2#  $Id$
3#
4
5BSP NAME:           helas403
6BOARD:              IMD, helas-ppc
7BUS:                N/A
8CPU FAMILY:         ppc
9CPU:                PowerPC 403GA
10COPROCESSORS:       N/A
11MODE:               32 bit mode
12
13DEBUG MONITOR:      Modified Motorola FBUG
14
15PERIPHERALS
16===========
17TIMERS:             403GA internal
18  RESOLUTION:         .04 microseconds
19SERIAL PORTS:       403GA internal
20REAL-TIME CLOCK:    403GA internal
21DMA:                403GA internal
22VIDEO:              none
23SCSI:               none
24NETWORKING:         none
25
26DRIVER INFORMATION
27==================
28CLOCK DRIVER:       403GA internal
29IOSUPP DRIVER:      N/A
30SHMSUPP:            N/A
31TIMER DRIVER:       403GA internal
32TTY DRIVER:         403GA internal
33
34STDIO
35=====
36PORT:               Console port 0
37ELECTRICAL:         RS-232
38BAUD:               9600
39BITS PER CHARACTER: 8
40PARITY:             None
41STOP BITS:          1
42
43Notes
44=====
45
46Board description
47-----------------
48clock rate:     25 MHz
49bus width:      8-bit PROM, 32-bit DRAM
50ROM:            Up to 512KByte (Am29F040), 90 nsec chip select 0
51RAM:            4 to 32 MByte DRAM SIMM (autodetect), 70 nsec,
52                no parity, at CS7 or CS6+CS7 (for two-bank-SIMMs)
53
54
55helas403 only supports single processor operations.
56
57Porting
58-------
59This board support package is written for a typical PPC403GA
60system. The rough features of this board are described above.
61
62This BSP contains files for two startup methods:
63- Direct start from Flash after powerup (with code run out of flash):
64  This is the default configuration, it uses the files
65        flashentry/flashentry.s
66        startup/linkcmds
67
68 Please note, that this configuration is good to startup the system,
69but it will not gain maximum performance due to slow Flash access (8
70bit wide only)
71
72- Start after software download into DRAM:
73  This configuration will use:
74        dlentry/dlentry.s
75        startup/linkcmds.dl
76
77If you want to use the download configuration, it is sufficient to
78rename the file "startup/linkcmds.dl" to "startup/linkcmds", it will
79automatically reference the dlentry.s as entry code. (Renaming is not
80quite elegant, a more sophisticated solution will follow in future,
81any hints welcome ;-)
82
83For adapting this BSP to other boards, the following files should be
84modified:
85
86- c/src/lib/libbsp/powerpc/helas403/flashentry/flashentry.s
87        for the memory controller configuration and other basic stuff
88
89- c/src/lib/libbsp/powerpc/helas403/startup/linkcmds[.dl]
90        for the memory layout required
91
92- c/src/lib/libbsp/powerpc/helas403/startup/bspstart.c
93        for adaption of BSP_Configuration. here you can select
94        the clock source for the timers and the serial interface
95        (system clock or external clock pin), the clock rates, initial
96        baud rate and other stuff
97
98- c/src/lib/libbsp/powerpc/helas403/include/bsp.h
99        some BSP-related constants
100
101The actual drivers are placed in
102- c/src/lib/libcpu/powerpc/ppc403/*
103        well, they should be generic, so there _should_ be no reason
104        to mess around there (but who knows...)
105
106
Note: See TracBrowser for help on using the repository browser.