1 | /* bsp_start() |
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2 | * |
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3 | * This routine starts the application. It includes application, |
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4 | * board, and monitor specific initialization and configuration. |
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5 | * The generic CPU dependent initialization has been performed |
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6 | * before this routine is invoked. |
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7 | * |
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8 | * INPUT: NONE |
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9 | * |
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10 | * OUTPUT: NONE |
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11 | * |
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12 | * Author: Thomas Doerfler <td@imd.m.isar.de> |
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13 | * IMD Ingenieurbuero fuer Microcomputertechnik |
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14 | * |
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15 | * COPYRIGHT (c) 1998 by IMD |
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16 | * |
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17 | * Changes from IMD are covered by the original distributions terms. |
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18 | * This file has been derived from the papyrus BSP: |
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19 | * |
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20 | * Author: Andrew Bray <andy@i-cubed.co.uk> |
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21 | * |
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22 | * COPYRIGHT (c) 1995 by i-cubed ltd. |
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23 | * |
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24 | * To anyone who acknowledges that this file is provided "AS IS" |
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25 | * without any express or implied warranty: |
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26 | * permission to use, copy, modify, and distribute this file |
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27 | * for any purpose is hereby granted without fee, provided that |
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28 | * the above copyright notice and this notice appears in all |
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29 | * copies, and that the name of i-cubed limited not be used in |
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30 | * advertising or publicity pertaining to distribution of the |
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31 | * software without specific, written prior permission. |
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32 | * i-cubed limited makes no representations about the suitability |
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33 | * of this software for any purpose. |
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34 | * |
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35 | * Modifications for spooling console driver and control of memory layout |
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36 | * with linker command file by |
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37 | * Thomas Doerfler <td@imd.m.isar.de> |
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38 | * for these modifications: |
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39 | * COPYRIGHT (c) 1997 by IMD, Puchheim, Germany. |
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40 | * |
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41 | * To anyone who acknowledges that this file is provided "AS IS" |
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42 | * without any express or implied warranty: |
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43 | * permission to use, copy, modify, and distribute this file |
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44 | * for any purpose is hereby granted without fee, provided that |
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45 | * the above copyright notice and this notice appears in all |
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46 | * copies. IMD makes no representations about the suitability |
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47 | * of this software for any purpose. |
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48 | * |
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49 | * Derived from c/src/lib/libbsp/no_cpu/no_bsp/startup/bspstart.c: |
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50 | * |
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51 | * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. |
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52 | * On-Line Applications Research Corporation (OAR). |
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53 | * |
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54 | * Modifications for PPC405GP by Dennis Ehlin |
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55 | * |
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56 | * Further modified for the PPC405EX Haleakala board by |
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57 | * Michael Hamel ADInstruments Ltd May 2008 |
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58 | * |
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59 | * $Id$ |
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60 | */ |
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61 | #include <string.h> |
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62 | #include <fcntl.h> |
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63 | |
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64 | #include <bsp.h> |
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65 | #include <bsp/uart.h> |
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66 | #include <rtems/libio.h> |
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67 | #include <rtems/libcsupport.h> |
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68 | #include <bsp/irq.h> |
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69 | #include <rtems/bspIo.h> |
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70 | #include <libcpu/cpuIdent.h> |
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71 | #include <rtems/powerpc/powerpc.h> |
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72 | #include <bsp/ppc_exc_bspsupp.h> |
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73 | #include <ppc4xx/ppc405gp.h> |
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74 | #include <ppc4xx/ppc405ex.h> |
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75 | |
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76 | #include <stdio.h> |
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77 | |
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78 | /* |
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79 | * Driver configuration parameters |
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80 | */ |
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81 | |
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82 | /* Expected by clock.c */ |
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83 | uint32_t bsp_clicks_per_usec; |
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84 | boolean bsp_timer_internal_clock; /* TRUE, when timer runs with CPU clk */ |
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85 | uint32_t bsp_timer_least_valid; |
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86 | uint32_t bsp_timer_average_overhead; |
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87 | |
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88 | |
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89 | /* Initialize whatever libc we are using |
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90 | * called from postdriver hook |
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91 | */ |
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92 | |
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93 | void bsp_postdriver_hook(void); |
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94 | void bsp_libc_init( void *, uint32_t, int ); |
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95 | |
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96 | /* |
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97 | * |
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98 | * bsp_predriver_hook |
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99 | * |
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100 | * Before drivers are setup. |
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101 | */ |
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102 | |
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103 | void bsp_predriver_hook(void) |
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104 | { |
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105 | |
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106 | } |
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107 | |
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108 | /* |
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109 | * Function: bsp_pretasking_hook |
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110 | * Created: 95/03/10 |
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111 | * |
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112 | * Description: |
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113 | * BSP pretasking hook. Called just before drivers are initialized. |
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114 | * Used to setup libc and install any BSP extensions. |
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115 | * |
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116 | * NOTES: |
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117 | * Must not use libc (to do io) from here, since drivers are |
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118 | * not yet initialized. |
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119 | * |
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120 | */ |
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121 | |
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122 | |
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123 | extern uint8_t _RAMEnd; /* Defined in linkcmds */ |
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124 | |
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125 | void bsp_pretasking_hook(void) |
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126 | /* Initialise libc with the address and size of the heap, which runs |
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127 | from the end of the RTEMS workspace to the top of RAM */ |
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128 | { |
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129 | uint32_t heap_start; |
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130 | |
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131 | heap_start = ( (uint32_t)Configuration.work_space_start + |
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132 | rtems_configuration_get_work_space_size() ); |
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133 | |
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134 | bsp_libc_init((void *)heap_start, (uint32_t)(&_RAMEnd) - heap_start, 0); |
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135 | |
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136 | #ifdef RTEMS_DEBUG |
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137 | rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); |
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138 | #endif |
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139 | } |
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140 | |
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141 | /*-------------------- Haleakala-specific UART setup -------------------------*/ |
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142 | |
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143 | static void |
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144 | EarlyUARTInit(int baudRate) |
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145 | { |
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146 | uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1); |
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147 | int divider = BSP_UART_BAUD_BASE / baudRate; |
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148 | up[LCR] = DLAB; /* Access DLM/DLL */ |
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149 | up[DLL] = divider & 0x0FF; |
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150 | up[DLM] = divider >> 8; |
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151 | up[LCR] = CHR_8_BITS; |
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152 | up[MCR] = DTR | RTS; |
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153 | up[FCR] = FIFO_EN | XMIT_RESET | RCV_RESET; |
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154 | up[THR] = '+'; |
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155 | } |
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156 | |
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157 | |
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158 | static void |
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159 | InitUARTClock(void) |
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160 | { |
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161 | uint32_t reg; |
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162 | mfsdr(SDR0_UART0,reg); |
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163 | reg &= ~0x008000FF; |
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164 | reg |= 0x00800001; /* Ext clock, div 1 */ |
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165 | mtsdr(SDR0_UART0,reg); |
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166 | } |
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167 | |
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168 | void GPIO_AlternateSelect(int bitnum, int source) |
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169 | /* PPC405EX: select a GPIO function for the specified pin */ |
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170 | { |
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171 | int shift; |
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172 | unsigned long value, mask; |
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173 | GPIORegisters* gpioPtr = (GPIORegisters*)(GPIOAddress); |
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174 | |
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175 | shift = (31 - bitnum) & 0xF; |
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176 | value = (source & 3) << (shift*2); |
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177 | mask = 3 << (shift*2); |
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178 | if (bitnum <= 15) { |
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179 | gpioPtr->OSRL = (gpioPtr->OSRL & ~mask) | value; |
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180 | gpioPtr->TSRL = (gpioPtr->TSRL & ~mask) | value; |
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181 | } else { |
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182 | gpioPtr->OSRH = (gpioPtr->OSRH & ~mask) | value; |
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183 | gpioPtr->TSRH = (gpioPtr->TSRH & ~mask) | value; |
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184 | } |
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185 | } |
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186 | |
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187 | void Init_FPGA(void) |
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188 | { |
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189 | /* Have to write to the FPGA to enable the UART drivers */ |
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190 | /* Have to enable CS2 as an output in GPIO to get the FPGA working */ |
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191 | mtebc(EBC0_B2CR,0xF0018000); /* Set up CS2 at 0xF0000000 */ |
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192 | mtebc(EBC0_B2AP,0x9400C800); |
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193 | GPIO_AlternateSelect(9,1); /* GPIO9 = PerCS2 */ |
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194 | { |
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195 | unsigned long *fpgaPtr = (unsigned long*)(0xF0000000); |
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196 | unsigned long n; |
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197 | n = *(fpgaPtr); |
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198 | n &= ~0x00100; /* User LEDs on */ |
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199 | n |= 0x30000; /* UART 0 and 1 transcievers on! */ |
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200 | *fpgaPtr = n; |
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201 | } |
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202 | } |
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203 | |
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204 | /*===================================================================*/ |
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205 | |
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206 | static void |
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207 | DirectUARTWrite(const char c) |
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208 | { |
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209 | uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1); |
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210 | while ((up[LSR] & THRE) == 0) { ; } |
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211 | up[THR] = c; |
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212 | if (c=='\n') |
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213 | DirectUARTWrite('\r'); |
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214 | } |
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215 | |
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216 | /* We will provide our own printk output function as it may get used early */ |
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217 | BSP_output_char_function_type BSP_output_char = DirectUARTWrite; |
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218 | |
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219 | |
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220 | /*===================================================================*/ |
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221 | |
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222 | |
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223 | /* |
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224 | * bsp_start |
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225 | * |
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226 | * This routine does the bulk of the system initialization. |
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227 | */ |
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228 | |
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229 | |
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230 | void bsp_start( void ) |
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231 | { |
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232 | LINKER_SYMBOL(intrStack_start); |
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233 | LINKER_SYMBOL(intrStack_size); |
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234 | ppc_cpu_id_t myCpu; |
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235 | ppc_cpu_revision_t myCpuRevision; |
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236 | |
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237 | /* Get the UART clock initialized first in case we call printk */ |
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238 | |
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239 | InitUARTClock(); |
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240 | Init_FPGA(); |
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241 | EarlyUARTInit(115200); |
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242 | |
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243 | /* |
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244 | * Get CPU identification dynamically. Note that the get_ppc_cpu_type() |
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245 | * function store the result in global variables |
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246 | * so that it can be used later... |
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247 | */ |
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248 | myCpu = get_ppc_cpu_type(); |
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249 | myCpuRevision = get_ppc_cpu_revision(); |
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250 | |
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251 | /* |
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252 | * initialize the device driver parameters |
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253 | */ |
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254 | |
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255 | /* Set globals visible to clock.c */ |
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256 | bsp_clicks_per_usec = 400; /* timebase register ticks/microsecond = CPU Clk in MHz */ |
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257 | bsp_timer_internal_clock = TRUE; |
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258 | bsp_timer_average_overhead = 2; |
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259 | bsp_timer_least_valid = 3; |
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260 | |
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261 | /* |
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262 | * Initialize default raw exception handlers. |
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263 | */ |
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264 | ppc_exc_initialize( |
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265 | PPC_INTERRUPT_DISABLE_MASK_DEFAULT, |
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266 | (uint32_t) intrStack_start, |
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267 | (uint32_t) intrStack_size); |
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268 | |
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269 | /* |
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270 | * Install our own set of exception vectors |
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271 | */ |
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272 | BSP_rtems_irq_mng_init(0); |
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273 | |
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274 | /* |
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275 | * Allocate the memory for the RTEMS Work Space. This can come from |
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276 | * a variety of places: hard coded address, malloc'ed from outside |
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277 | * RTEMS world (e.g. simulator or primitive memory manager), or (as |
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278 | * typically done by stock BSPs) by subtracting the required amount |
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279 | * of work space from the last physical address on the CPU board. |
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280 | */ |
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281 | /* In this case we allocate space at an address defined in linkcmds |
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282 | which points to a block above the stack and below the heap */ |
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283 | { |
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284 | extern uint8_t _WorkspaceStart; |
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285 | Configuration.work_space_start = &_WorkspaceStart; |
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286 | } |
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287 | |
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288 | } |
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289 | |
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290 | void BSP_ask_for_reset(void) |
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291 | { |
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292 | printk("system stopped, press RESET"); |
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293 | while(1) {}; |
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294 | } |
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295 | |
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296 | void BSP_panic(char *s) |
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297 | { |
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298 | printk("%s PANIC %s\n",_RTEMS_version, s); |
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299 | BSP_ask_for_reset(); |
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300 | } |
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301 | |
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302 | void _BSP_Fatal_error(unsigned int v) |
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303 | { |
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304 | printk("%s PANIC ERROR %x\n",_RTEMS_version, v); |
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305 | BSP_ask_for_reset(); |
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306 | } |
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307 | |
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308 | |
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