source: rtems/c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c @ d8de6b9

5
Last change on this file since d8de6b9 was 07d96453, checked in by Sebastian Huber <sebastian.huber@…>, on Nov 21, 2017 at 11:00:49 AM

powerpc: Remove _BSP_Fatal_error()

BSPs can use the bsp_fatal_extension() to provide BSP-specific fatal
error handling. There is no need for a _BSP_Fatal_error().

Close #3246.

  • Property mode set to 100644
File size: 5.8 KB
Line 
1/*
2 *  This routine does the bulk of the system initialization.
3 */
4
5/*
6 *  Author:     Thomas Doerfler <td@imd.m.isar.de>
7 *              IMD Ingenieurbuero fuer Microcomputertechnik
8 *
9 *  COPYRIGHT (c) 1998 by IMD
10 *
11 *  Changes from IMD are covered by the original distributions terms.
12 *  This file has been derived from the papyrus BSP:
13 *
14 *  Author:     Andrew Bray <andy@i-cubed.co.uk>
15 *
16 *  COPYRIGHT (c) 1995 by i-cubed ltd.
17 *
18 *  To anyone who acknowledges that this file is provided "AS IS"
19 *  without any express or implied warranty:
20 *      permission to use, copy, modify, and distribute this file
21 *      for any purpose is hereby granted without fee, provided that
22 *      the above copyright notice and this notice appears in all
23 *      copies, and that the name of i-cubed limited not be used in
24 *      advertising or publicity pertaining to distribution of the
25 *      software without specific, written prior permission.
26 *      i-cubed limited makes no representations about the suitability
27 *      of this software for any purpose.
28 *
29 *  Modifications for spooling console driver and control of memory layout
30 *  with linker command file by
31 *              Thomas Doerfler <td@imd.m.isar.de>
32 *  for these modifications:
33 *  COPYRIGHT (c) 1997 by IMD, Puchheim, Germany.
34 *
35 *  To anyone who acknowledges that this file is provided "AS IS"
36 *  without any express or implied warranty:
37 *      permission to use, copy, modify, and distribute this file
38 *      for any purpose is hereby granted without fee, provided that
39 *      the above copyright notice and this notice appears in all
40 *      copies. IMD makes no representations about the suitability
41 *      of this software for any purpose.
42 *
43 *  Derived from c/src/lib/libbsp/no_cpu/no_bsp/startup/bspstart.c:
44 *
45 *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
46 *  On-Line Applications Research Corporation (OAR).
47 *
48 *  Modifications for PPC405GP by Dennis Ehlin
49 *
50 *  Further modified for the PPC405EX Haleakala board by
51 *  Michael Hamel ADInstruments Ltd May 2008
52 */
53#include <string.h>
54#include <fcntl.h>
55
56#include <rtems/bspIo.h>
57#include <rtems/counter.h>
58
59#include <bsp.h>
60#include <bsp/bootcard.h>
61#include <bsp/uart.h>
62#include <bsp/irq.h>
63#include <libcpu/powerpc-utility.h>
64#include <bsp/vectors.h>
65#include <ppc4xx/ppc405gp.h>
66#include <ppc4xx/ppc405ex.h>
67
68#include <stdio.h>
69
70LINKER_SYMBOL(intrStack_start);
71LINKER_SYMBOL(intrStack_size);
72/*
73 *  Driver configuration parameters
74 */
75
76/* Expected by clock.c */
77uint32_t    bsp_clicks_per_usec;
78bool        bsp_timer_internal_clock;   /* true, when timer runs with CPU clk */
79uint32_t    bsp_timer_least_valid;
80uint32_t    bsp_timer_average_overhead;
81
82/*-------------------- Haleakala-specific UART setup -------------------------*/
83
84static void
85EarlyUARTInit(int baudRate)
86{
87  volatile uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
88  int divider = BSP_UART_BAUD_BASE / baudRate;
89  up[LCR] = DLAB;    /* Access DLM/DLL */
90  up[DLL] = divider & 0x0FF;
91  up[DLM] = divider >> 8;
92  up[LCR] = CHR_8_BITS;
93  up[MCR] = DTR | RTS;
94  up[FCR] = FIFO_EN | XMIT_RESET | RCV_RESET;
95  up[THR] = '+';
96}
97
98
99static void
100InitUARTClock(void)
101{
102  uint32_t reg;
103  mfsdr(SDR0_UART0,reg);
104  reg &= ~0x008000FF;
105  reg |= 0x00800001;    /* Ext clock, div 1 */
106  mtsdr(SDR0_UART0,reg);
107}
108
109static void GPIO_AlternateSelect(int bitnum, int source)
110/* PPC405EX: select a GPIO function for the specified pin */
111{
112  int shift;
113  unsigned long value, mask;
114  GPIORegisters* gpioPtr = (GPIORegisters*)(GPIOAddress);
115
116  shift = (31 - bitnum) & 0xF;
117  value = (source & 3) << (shift*2);
118  mask  = 3 << (shift*2);
119  if (bitnum <= 15) {
120    gpioPtr->OSRL = (gpioPtr->OSRL & ~mask) | value;
121    gpioPtr->TSRL = (gpioPtr->TSRL & ~mask) | value;
122  } else {
123    gpioPtr->OSRH = (gpioPtr->OSRH & ~mask) | value;
124    gpioPtr->TSRH = (gpioPtr->TSRH & ~mask) | value;
125  }
126}
127
128static void Init_FPGA(void)
129{
130  /* Have to write to the FPGA to enable the UART drivers */
131  /* Have to enable CS2 as an output in GPIO to get the FPGA working */
132  mtebc(EBC0_B2CR,0xF0018000);  /* Set up CS2 at 0xF0000000 */
133  mtebc(EBC0_B2AP,0x9400C800);
134  GPIO_AlternateSelect(9,1);    /* GPIO9 = PerCS2 */
135  {
136    unsigned long *fpgaPtr = (unsigned long*)(0xF0000000);
137    unsigned long n;
138    n = *(fpgaPtr);
139    n &= ~0x00100;    /* User LEDs on */
140    n |=  0x30000;    /* UART 0 and 1 transcievers on! */
141    *fpgaPtr = n;
142  }
143}
144
145/*===================================================================*/
146
147static void
148DirectUARTWrite(const char c)
149{
150  volatile uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
151  while ((up[LSR] & THRE) == 0) { ; }
152  up[THR] = c;
153}
154
155/* We will provide our own printk output function as it may get used early */
156BSP_output_char_function_type     BSP_output_char = DirectUARTWrite;
157BSP_polling_getchar_function_type BSP_poll_char = NULL;
158
159/*===================================================================*/
160
161void bsp_start( void )
162{
163  /* Get the UART clock initialized first in case we call printk */
164
165  InitUARTClock();
166  Init_FPGA();
167  EarlyUARTInit(115200);
168
169  /*
170   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
171   * function store the result in global variables
172   * so that it can be used later...
173   */
174  get_ppc_cpu_type();
175  get_ppc_cpu_revision();
176
177  /*
178   *  initialize the device driver parameters
179   */
180
181  /* Set globals visible to clock.c */
182  /* timebase register ticks/microsecond = CPU Clk in MHz */
183  bsp_clicks_per_usec = 400;
184  rtems_counter_initialize_converter(bsp_clicks_per_usec * 1000000);
185
186  bsp_timer_internal_clock  = TRUE;
187  bsp_timer_average_overhead = 2;
188  bsp_timer_least_valid = 3;
189
190  /*
191   * Initialize default raw exception handlers.
192   */
193  ppc_exc_initialize(
194    (uintptr_t) intrStack_start,
195    (uintptr_t) intrStack_size
196  );
197
198  /*
199   * Install our own set of exception vectors
200   */
201  BSP_rtems_irq_mng_init(0);
202}
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