source: rtems/c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c @ 39a9f8e

4.104.115
Last change on this file since 39a9f8e was 39a9f8e, checked in by Thomas Doerfler <Thomas.Doerfler@…>, on 12/17/09 at 08:42:17

adapted to new prototype for *_write function

  • Property mode set to 100644
File size: 6.5 KB
Line 
1/*  bsp_start()
2 *
3 *  This routine starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  INPUT:  NONE
9 *
10 *  OUTPUT: NONE
11 *
12 *  Author:     Thomas Doerfler <td@imd.m.isar.de>
13 *              IMD Ingenieurbuero fuer Microcomputertechnik
14 *
15 *  COPYRIGHT (c) 1998 by IMD
16 *
17 *  Changes from IMD are covered by the original distributions terms.
18 *  This file has been derived from the papyrus BSP:
19 *
20 *  Author:     Andrew Bray <andy@i-cubed.co.uk>
21 *
22 *  COPYRIGHT (c) 1995 by i-cubed ltd.
23 *
24 *  To anyone who acknowledges that this file is provided "AS IS"
25 *  without any express or implied warranty:
26 *      permission to use, copy, modify, and distribute this file
27 *      for any purpose is hereby granted without fee, provided that
28 *      the above copyright notice and this notice appears in all
29 *      copies, and that the name of i-cubed limited not be used in
30 *      advertising or publicity pertaining to distribution of the
31 *      software without specific, written prior permission.
32 *      i-cubed limited makes no representations about the suitability
33 *      of this software for any purpose.
34 *
35 *  Modifications for spooling console driver and control of memory layout
36 *  with linker command file by
37 *              Thomas Doerfler <td@imd.m.isar.de>
38 *  for these modifications:
39 *  COPYRIGHT (c) 1997 by IMD, Puchheim, Germany.
40 *
41 *  To anyone who acknowledges that this file is provided "AS IS"
42 *  without any express or implied warranty:
43 *      permission to use, copy, modify, and distribute this file
44 *      for any purpose is hereby granted without fee, provided that
45 *      the above copyright notice and this notice appears in all
46 *      copies. IMD makes no representations about the suitability
47 *      of this software for any purpose.
48 *
49 *  Derived from c/src/lib/libbsp/no_cpu/no_bsp/startup/bspstart.c:
50 *
51 *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
52 *  On-Line Applications Research Corporation (OAR).
53 *
54 *  Modifications for PPC405GP by Dennis Ehlin
55 *
56 *  Further modified for the PPC405EX Haleakala board by
57 *  Michael Hamel ADInstruments Ltd May 2008
58 *
59 *  $Id$
60 */
61#include <string.h>
62#include <fcntl.h>
63
64#include <bsp.h>
65#include <bsp/uart.h>
66#include <bsp/irq.h>
67#include <libcpu/powerpc-utility.h>
68#include <bsp/vectors.h>
69#include <ppc4xx/ppc405gp.h>
70#include <ppc4xx/ppc405ex.h>
71
72#include <stdio.h>
73
74LINKER_SYMBOL(intrStack_start);
75LINKER_SYMBOL(intrStack_size);
76/*
77 *  Driver configuration parameters
78 */
79
80/* Expected by clock.c */
81uint32_t    bsp_clicks_per_usec;
82bool        bsp_timer_internal_clock;   /* true, when timer runs with CPU clk */
83uint32_t    bsp_timer_least_valid;
84uint32_t    bsp_timer_average_overhead;
85
86/*-------------------- Haleakala-specific UART setup -------------------------*/
87
88static void
89EarlyUARTInit(int baudRate)
90{
91  volatile uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
92  int divider = BSP_UART_BAUD_BASE / baudRate;
93  up[LCR] = DLAB;    /* Access DLM/DLL */
94  up[DLL] = divider & 0x0FF;
95  up[DLM] = divider >> 8;
96  up[LCR] = CHR_8_BITS;
97  up[MCR] = DTR | RTS;
98  up[FCR] = FIFO_EN | XMIT_RESET | RCV_RESET;
99  up[THR] = '+';
100}
101
102
103static void
104InitUARTClock(void)
105{
106  uint32_t reg;
107  mfsdr(SDR0_UART0,reg);
108  reg &= ~0x008000FF;
109  reg |= 0x00800001;    /* Ext clock, div 1 */
110  mtsdr(SDR0_UART0,reg);
111}
112
113void GPIO_AlternateSelect(int bitnum, int source)
114/* PPC405EX: select a GPIO function for the specified pin */
115{
116  int shift;
117  unsigned long value, mask;
118  GPIORegisters* gpioPtr = (GPIORegisters*)(GPIOAddress);
119
120  shift = (31 - bitnum) & 0xF;
121  value = (source & 3) << (shift*2);
122  mask  = 3 << (shift*2);
123  if (bitnum <= 15) {
124    gpioPtr->OSRL = (gpioPtr->OSRL & ~mask) | value;
125    gpioPtr->TSRL = (gpioPtr->TSRL & ~mask) | value;
126  } else {
127    gpioPtr->OSRH = (gpioPtr->OSRH & ~mask) | value;
128    gpioPtr->TSRH = (gpioPtr->TSRH & ~mask) | value;
129  }
130}
131
132void Init_FPGA(void)
133{
134  /* Have to write to the FPGA to enable the UART drivers */
135  /* Have to enable CS2 as an output in GPIO to get the FPGA working */
136  mtebc(EBC0_B2CR,0xF0018000);  /* Set up CS2 at 0xF0000000 */
137  mtebc(EBC0_B2AP,0x9400C800);
138  GPIO_AlternateSelect(9,1);    /* GPIO9 = PerCS2 */
139  {
140    unsigned long *fpgaPtr = (unsigned long*)(0xF0000000);
141    unsigned long n;
142    n = *(fpgaPtr);
143    n &= ~0x00100;    /* User LEDs on */
144    n |=  0x30000;    /* UART 0 and 1 transcievers on! */
145    *fpgaPtr = n;
146  }
147}
148
149/*===================================================================*/
150
151static void
152DirectUARTWrite(const char c)
153{
154  volatile uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
155  while ((up[LSR] & THRE) == 0) { ; }
156  up[THR] = c;
157  if (c=='\n')
158    DirectUARTWrite('\r');
159}
160
161/* We will provide our own printk output function as it may get used early */
162BSP_output_char_function_type BSP_output_char = DirectUARTWrite;
163
164/*===================================================================*/
165
166
167/*
168 *  bsp_start
169 *
170 *  This routine does the bulk of the system initialization.
171 */
172void bsp_start( void )
173{
174  rtems_status_code sc = RTEMS_SUCCESSFUL;
175  ppc_cpu_id_t myCpu;
176  ppc_cpu_revision_t myCpuRevision;
177
178  /* Get the UART clock initialized first in case we call printk */
179
180  InitUARTClock();
181  Init_FPGA();
182  EarlyUARTInit(115200);
183
184  /*
185   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
186   * function store the result in global variables
187   * so that it can be used later...
188   */
189  myCpu       = get_ppc_cpu_type();
190  myCpuRevision = get_ppc_cpu_revision();
191
192  /*
193   *  initialize the device driver parameters
194   */
195
196  /* Set globals visible to clock.c */
197  /* timebase register ticks/microsecond = CPU Clk in MHz */
198  bsp_clicks_per_usec = 400;
199
200  bsp_timer_internal_clock  = TRUE;
201  bsp_timer_average_overhead = 2;
202  bsp_timer_least_valid = 3;
203
204  /*
205   * Initialize default raw exception handlers.
206   */
207  sc = ppc_exc_initialize(
208    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
209    (uintptr_t) intrStack_start,
210    (uintptr_t) intrStack_size
211  );
212  if (sc != RTEMS_SUCCESSFUL) {
213    BSP_panic("cannot initialize exceptions");
214  }
215
216  /*
217   * Install our own set of exception vectors
218   */
219  BSP_rtems_irq_mng_init(0);
220}
221
222void BSP_ask_for_reset(void)
223{
224  printk("system stopped, press RESET");
225  while(1) {};
226}
227
228void BSP_panic(char *s)
229{
230  printk("%s PANIC %s\n",_RTEMS_version, s);
231  BSP_ask_for_reset();
232}
233
234void _BSP_Fatal_error(unsigned int v)
235{
236  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
237  BSP_ask_for_reset();
238}
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