source: rtems/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c @ 112490e

4.9
Last change on this file since 112490e was 112490e, checked in by Thomas Doerfler <Thomas.Doerfler@…>, on 09/19/08 at 16:25:52

correct bsp_clicks_per_usec initialization for non-U-Boot case

  • Property mode set to 100644
File size: 4.6 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup mpc83xx
5 *
6 * @brief Source for BSP startup code.
7 */
8
9/*
10 * Copyright (c) 2008
11 * Embedded Brains GmbH
12 * Obere Lagerstr. 30
13 * D-82178 Puchheim
14 * Germany
15 * rtems@embedded-brains.de
16 *
17 * The license and distribution terms for this file may be found in the file
18 * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
19 *
20 * $Id$
21 */
22
23#include <string.h>
24
25#include <rtems/libio.h>
26#include <rtems/libcsupport.h>
27#include <rtems/score/thread.h>
28
29#include <libcpu/powerpc-utility.h>
30#include <libcpu/raw_exception.h>
31
32#include <bsp.h>
33#include <bsp/bootcard.h>
34#include <bsp/irq-generic.h>
35#include <bsp/ppc_exc_bspsupp.h>
36
37#ifdef HAS_UBOOT
38
39/*
40 * We want this in the data section, because the startup code clears the BSS
41 * section after the initialization of the board info.
42 */
43bd_t mpc83xx_uboot_board_info = { .bi_baudrate = 123 };
44
45/* Size in words */
46const size_t mpc83xx_uboot_board_info_size = (sizeof( bd_t) + 3) / 4;
47
48#endif /* HAS_UBOOT */
49
50/* Configuration parameters for console driver, ... */
51unsigned int BSP_bus_frequency;
52
53/* Configuration parameters for clock driver, ... */
54uint32_t bsp_clicks_per_usec;
55
56/* Default decrementer exception handler */
57static int mpc83xx_decrementer_exception_handler( BSP_Exception_frame *frame, unsigned number)
58{
59  ppc_set_decrementer_register(UINT32_MAX);
60
61  return 0;
62}
63
64void BSP_panic(char *s)
65{
66  rtems_interrupt_level level;
67
68  rtems_interrupt_disable(level);
69
70  printk("%s PANIC %s\n", rtems_get_version_string(), s);
71
72  while (1) {
73    /* Do nothing */
74  }
75}
76
77void _BSP_Fatal_error(unsigned n)
78{
79  rtems_interrupt_level level;
80
81  rtems_interrupt_disable( level);
82
83  printk( "%s PANIC ERROR %u\n", rtems_get_version_string(), n);
84
85  while (1) {
86    /* Do nothing */
87  }
88}
89
90void bsp_get_work_area(
91  void   **work_area_start,
92  size_t  *work_area_size,
93  void   **heap_start,
94  size_t  *heap_size)
95{
96#ifdef HAS_UBOOT
97  char *ram_end = (char *) mpc83xx_uboot_board_info.bi_memstart +
98                                 mpc83xx_uboot_board_info.bi_memsize;
99#else /* HAS_UBOOT */
100  char *ram_end = bsp_ram_end;
101#endif /* HAS_UBOOT */
102
103  *work_area_start = bsp_work_area_start;
104  *work_area_size = ram_end - bsp_work_area_start;
105  *heap_start = BSP_BOOTCARD_HEAP_USES_WORK_AREA;
106  *heap_size = BSP_BOOTCARD_HEAP_SIZE_DEFAULT;
107}
108
109void bsp_start( void)
110{
111  rtems_status_code sc = RTEMS_SUCCESSFUL;
112  int rv = 0;
113
114  ppc_cpu_id_t myCpu;
115  ppc_cpu_revision_t myCpuRevision;
116
117  uint32_t interrupt_stack_start = (uint32_t) bsp_interrupt_stack_start;
118  uint32_t interrupt_stack_size = (uint32_t) bsp_interrupt_stack_size;
119
120  /*
121   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
122   * store the result in global variables so that it can be used latter...
123   */
124  myCpu = get_ppc_cpu_type();
125  myCpuRevision = get_ppc_cpu_revision();
126
127  /* Basic CPU initialization */
128  cpu_init();
129
130  /*
131   * Enable instruction and data caches. Do not force writethrough mode.
132   */
133
134#if INSTRUCTION_CACHE_ENABLE
135  rtems_cache_enable_instruction();
136#endif
137
138#if DATA_CACHE_ENABLE
139  rtems_cache_enable_data();
140#endif
141
142  /*
143   * This is evaluated during runtime, so it should be ok to set it
144   * before we initialize the drivers.
145   */
146
147  /* Initialize some device driver parameters */
148
149#ifdef HAS_UBOOT
150  BSP_bus_frequency = mpc83xx_uboot_board_info.bi_busfreq;
151  bsp_clicks_per_usec = mpc83xx_uboot_board_info.bi_busfreq / 4000000;
152#else /* HAS_UBOOT */
153  BSP_bus_frequency = BSP_CLKIN_FRQ * BSP_SYSPLL_MF / BSP_SYSPLL_CKID;
154  bsp_clicks_per_usec = BSP_bus_frequency / 4000000;
155#endif /* HAS_UBOOT */
156
157  /* Initialize exception handler */
158  ppc_exc_initialize(
159    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
160    interrupt_stack_start,
161    interrupt_stack_size
162  );
163
164  /* Install default handler for the decrementer exception */
165  rv = ppc_exc_set_handler( ASM_DEC_VECTOR, mpc83xx_decrementer_exception_handler);
166  if (rv < 0) {
167    BSP_panic( "Cannot install decrementer exception handler!\n");
168  }
169
170  /* Initalize interrupt support */
171  sc = bsp_interrupt_initialize();
172  if (sc != RTEMS_SUCCESSFUL) {
173    BSP_panic( "Cannot intitialize interrupt support\n");
174  }
175
176#ifdef SHOW_MORE_INIT_SETTINGS
177  printk("Exit from bspstart\n");
178#endif
179}
180
181/**
182 * @brief Idle thread body.
183 *
184 * Replaces the one in c/src/exec/score/src/threadidlebody.c
185 * The MSR[POW] bit is set to put the CPU into the low power mode
186 * defined in HID0.  HID0 is set during starup in start.S.
187 */
188Thread _Thread_Idle_body( uint32_t ignored)
189{
190
191  while (1) {
192    asm volatile (
193      "mfmsr 3;"
194      "oris 3, 3, 4;"
195      "sync;"
196      "mtmsr 3;"
197      "isync;"
198      "ori 3, 3, 0;"
199      "ori 3, 3, 0"
200    );
201  }
202
203  return NULL;
204}
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