source: rtems/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c @ 41d7c0fe

4.104.114.95
Last change on this file since 41d7c0fe was 41d7c0fe, checked in by Thomas Doerfler <Thomas.Doerfler@…>, on 05/27/08 at 10:34:55

speed inprovements in mpc83xx tsec driver

  • Property mode set to 100644
File size: 6.2 KB
RevLine 
[f610e83f]1/*===============================================================*\
2| Project: RTEMS generic MPC83xx BSP                              |
3+-----------------------------------------------------------------+
4|                    Copyright (c) 2007                           |
5|                    Embedded Brains GmbH                         |
6|                    Obere Lagerstr. 30                           |
7|                    D-82178 Puchheim                             |
8|                    Germany                                      |
9|                    rtems@embedded-brains.de                     |
10+-----------------------------------------------------------------+
11| The license and distribution terms for this file may be         |
12| found in the file LICENSE in this distribution or at            |
13|                                                                 |
14| http://www.rtems.com/license/LICENSE.                           |
15|                                                                 |
16+-----------------------------------------------------------------+
17| this file contains the BSP startup code                         |
18\*===============================================================*/
19
[dfef80e8]20/*
[41d7c0fe]21<<<<<<< bspstart.c
[dfef80e8]22 *  $Id$
[41d7c0fe]23=======
24 *  $Id$
25>>>>>>> 1.11
[dfef80e8]26 */
27
[f610e83f]28#include <bsp.h>
29
30#include <rtems/libio.h>
31#include <rtems/libcsupport.h>
32#include <rtems/powerpc/powerpc.h>
33#include <rtems/score/thread.h>
34
35#include <rtems/bspIo.h>
36#include <libcpu/cpuIdent.h>
37#include <libcpu/spr.h>
38#include <bsp/irq.h>
39
40#include <string.h>
41
42SPR_RW(SPRG0)
43SPR_RW(SPRG1)
44
45extern unsigned long intrStackPtr;
46static char *BSP_heap_start, *BSP_heap_end;
47
48/*
49 * constants for c_clock driver:
50 * system bus frequency (for timebase etc)
51 * and
52 * Time base divisior: scaling value:
53 * BSP_time_base_divisor = TB ticks per millisecond/BSP_bus_frequency
54 */
[42bf1b9]55unsigned int BSP_bus_frequency;
[f610e83f]56unsigned int BSP_time_base_divisor = 4000;  /* 4 bus clicks per TB click */
57
[07e9642c]58/*
59 *  Driver configuration parameters
60 */
61uint32_t   bsp_clicks_per_usec;
62
[f610e83f]63/*
64 *  Use the shared implementations of the following routines.
[67a9b24a]65 *  Look in rtems/c/src/lib/libbsp/shared/bsplibc.c.
[f610e83f]66 */
67void bsp_libc_init( void *, uint32_t, int );
68extern void initialize_exceptions(void);
69extern void cpu_init(void);
70
71void BSP_panic(char *s)
72  {
73  printk("%s PANIC %s\n",_RTEMS_version, s);
74  /*
75   * FIXME: hang/restart system
76   */
77  __asm__ __volatile ("sc");
78  }
79
80void _BSP_Fatal_error(unsigned int v)
81  {
82  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
83  /*
84   * FIXME: hang/restart system
85   */
86  __asm__ __volatile ("sc");
87  }
88
89/*
90 *  Function:   bsp_pretasking_hook
91 *  Created:    95/03/10
92 *
93 *  Description:
94 *      BSP pretasking hook.  Called just before drivers are initialized.
95 *      Used to setup libc and install any BSP extensions.
96 *
97 *  NOTES:
98 *      Must not use libc (to do io) from here, since drivers are
99 *      not yet initialized.
100 *
101 */
102
103void
104bsp_pretasking_hook(void)
105{
106
107  /*
108   * initialize libc including the heap
109   */
110  bsp_libc_init( BSP_heap_start,
111                 BSP_heap_end - BSP_heap_start,
112                 0);
113}
114
115void bsp_calc_mem_layout()
116{
117  /*
118   * these labels (!) are defined in the linker command file
119   * or when the linker is invoked
120   * NOTE: the information(size) is the address of the object,
121   * not the object otself
122   */
123  extern unsigned char TopRamReserved;
[99e65f9c]124  extern unsigned char _WorkspaceBase[];
[f610e83f]125
126  /*
127   * compute the memory layout:
128   * - first unused address is Workspace start
129   * - Heap starts at end of workspace
130   * - Heap ends at end of memory - reserved memory area
131   */
[4130d8e2]132  Configuration.work_space_start = _WorkspaceBase;
[f610e83f]133
[4130d8e2]134  BSP_heap_start = ((char *)Configuration.work_space_start +
135                    rtems_configuration_get_work_space_size());
[f610e83f]136
137#if defined(HAS_UBOOT)
138  BSP_heap_end = (uboot_bdinfo_ptr->bi_memstart
139                  + uboot_bdinfo_ptr->bi_memsize
140                  - (uint32_t)&TopRamReserved);
141#else
142  BSP_heap_end = (void *)(RAM_END - (uint32_t)&TopRamReserved);
143#endif
144
145}
146
147
148void bsp_start(void)
149{
150  ppc_cpu_id_t myCpu;
151  ppc_cpu_revision_t myCpuRevision;
152  register unsigned char* intrStack;
153
154  /*
155   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
156   * store the result in global variables so that it can be used latter...
157   */
158  myCpu             = get_ppc_cpu_type();
159  myCpuRevision = get_ppc_cpu_revision();
160  /*
161   * determine heap and workspace placement
162   */
163  bsp_calc_mem_layout();
164
165  cpu_init();
166
167  /*
168   * Initialize some SPRG registers related to irq handling
169   */
170
171  intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
172
173  _write_SPRG1((unsigned int)intrStack);
174
[558bc25]175  /* Signal them that this BSP has fixed PR288 - eventually, this should
176   * go away
177   */
[f610e83f]178  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
179
[42bf1b9]180  /*
181   * this is evaluated during runtime, so it should be ok to set it
182   * before we initialize the drivers
183   */
184  BSP_bus_frequency   = BSP_CLKIN_FRQ * BSP_SYSPLL_MF / BSP_SYSPLL_CKID;
[f610e83f]185  /*
[cafa2c5]186   *  initialize the device driver parameters
[f610e83f]187   */
[42bf1b9]188  bsp_clicks_per_usec = (BSP_bus_frequency/1000000);
[07e9642c]189
190  /*
191   * Install our own set of exception vectors
192   */
[f610e83f]193
194  initialize_exceptions();
195
196  /*
197   * Enable instruction and data caches. Do not force writethrough mode.
198   */
199#if INSTRUCTION_CACHE_ENABLE
200  rtems_cache_enable_instruction();
201#endif
202#if DATA_CACHE_ENABLE
203  rtems_cache_enable_data();
204#endif
205
206  /*
207   *  Allocate the memory for the RTEMS Work Space.  This can come from
208   *  a variety of places: hard coded address, malloc'ed from outside
209   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
210   *  typically done by stock BSPs) by subtracting the required amount
211   *  of work space from the last physical address on the CPU board.
212   */
213
214  /*
215   * Initalize RTEMS IRQ system
216   */
217  BSP_rtems_irq_mng_init(0);
218
219#ifdef SHOW_MORE_INIT_SETTINGS
220  printk("Exit from bspstart\n");
221#endif
222
223  }
224
225/*
226 *
227 *  _Thread_Idle_body
228 *
229 *  Replaces the one in c/src/exec/score/src/threadidlebody.c
230 *  The MSR[POW] bit is set to put the CPU into the low power mode
231 *  defined in HID0.  HID0 is set during starup in start.S.
232 *
233 */
234Thread _Thread_Idle_body(uint32_t ignored )
235  {
236
237  for(;;)
238    {
239
240    asm volatile("mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0");
241
242    }
243
244  return 0;
245
246  }
247
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