[f610e83f] | 1 | /*===============================================================*\ |
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| 2 | | Project: RTEMS generic MPC83xx BSP | |
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| 3 | +-----------------------------------------------------------------+ |
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| 4 | | Copyright (c) 2007 | |
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| 5 | | Embedded Brains GmbH | |
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| 6 | | Obere Lagerstr. 30 | |
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| 7 | | D-82178 Puchheim | |
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| 8 | | Germany | |
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| 9 | | rtems@embedded-brains.de | |
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| 10 | +-----------------------------------------------------------------+ |
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| 11 | | The license and distribution terms for this file may be | |
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| 12 | | found in the file LICENSE in this distribution or at | |
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| 13 | | | |
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| 14 | | http://www.rtems.com/license/LICENSE. | |
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| 15 | | | |
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| 16 | +-----------------------------------------------------------------+ |
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| 17 | | this file contains the BSP startup code | |
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| 18 | \*===============================================================*/ |
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| 19 | |
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[dfef80e8] | 20 | /* |
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[41d7c0fe] | 21 | <<<<<<< bspstart.c |
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[dfef80e8] | 22 | * $Id$ |
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[41d7c0fe] | 23 | ======= |
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| 24 | * $Id$ |
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| 25 | >>>>>>> 1.11 |
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[dfef80e8] | 26 | */ |
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| 27 | |
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[f610e83f] | 28 | #include <bsp.h> |
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| 29 | |
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| 30 | #include <rtems/libio.h> |
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| 31 | #include <rtems/libcsupport.h> |
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| 32 | #include <rtems/powerpc/powerpc.h> |
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| 33 | #include <rtems/score/thread.h> |
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| 34 | |
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| 35 | #include <rtems/bspIo.h> |
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| 36 | #include <libcpu/cpuIdent.h> |
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| 37 | #include <libcpu/spr.h> |
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| 38 | #include <bsp/irq.h> |
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| 39 | |
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| 40 | #include <string.h> |
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| 41 | |
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| 42 | SPR_RW(SPRG0) |
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| 43 | SPR_RW(SPRG1) |
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| 44 | |
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| 45 | extern unsigned long intrStackPtr; |
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| 46 | static char *BSP_heap_start, *BSP_heap_end; |
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| 47 | |
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| 48 | /* |
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| 49 | * constants for c_clock driver: |
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| 50 | * system bus frequency (for timebase etc) |
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| 51 | * and |
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| 52 | * Time base divisior: scaling value: |
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| 53 | * BSP_time_base_divisor = TB ticks per millisecond/BSP_bus_frequency |
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| 54 | */ |
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[42bf1b9] | 55 | unsigned int BSP_bus_frequency; |
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[f610e83f] | 56 | unsigned int BSP_time_base_divisor = 4000; /* 4 bus clicks per TB click */ |
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| 57 | |
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[07e9642c] | 58 | /* |
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| 59 | * Driver configuration parameters |
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| 60 | */ |
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| 61 | uint32_t bsp_clicks_per_usec; |
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| 62 | |
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[f610e83f] | 63 | /* |
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| 64 | * Use the shared implementations of the following routines. |
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[67a9b24a] | 65 | * Look in rtems/c/src/lib/libbsp/shared/bsplibc.c. |
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[f610e83f] | 66 | */ |
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| 67 | void bsp_libc_init( void *, uint32_t, int ); |
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| 68 | extern void initialize_exceptions(void); |
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| 69 | extern void cpu_init(void); |
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| 70 | |
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| 71 | void BSP_panic(char *s) |
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| 72 | { |
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| 73 | printk("%s PANIC %s\n",_RTEMS_version, s); |
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| 74 | /* |
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| 75 | * FIXME: hang/restart system |
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| 76 | */ |
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| 77 | __asm__ __volatile ("sc"); |
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| 78 | } |
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| 79 | |
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| 80 | void _BSP_Fatal_error(unsigned int v) |
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| 81 | { |
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| 82 | printk("%s PANIC ERROR %x\n",_RTEMS_version, v); |
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| 83 | /* |
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| 84 | * FIXME: hang/restart system |
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| 85 | */ |
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| 86 | __asm__ __volatile ("sc"); |
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| 87 | } |
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| 88 | |
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| 89 | /* |
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| 90 | * Function: bsp_pretasking_hook |
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| 91 | * Created: 95/03/10 |
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| 92 | * |
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| 93 | * Description: |
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| 94 | * BSP pretasking hook. Called just before drivers are initialized. |
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| 95 | * Used to setup libc and install any BSP extensions. |
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| 96 | * |
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| 97 | * NOTES: |
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| 98 | * Must not use libc (to do io) from here, since drivers are |
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| 99 | * not yet initialized. |
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| 100 | * |
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| 101 | */ |
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| 102 | |
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| 103 | void |
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| 104 | bsp_pretasking_hook(void) |
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| 105 | { |
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| 106 | |
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| 107 | /* |
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| 108 | * initialize libc including the heap |
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| 109 | */ |
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| 110 | bsp_libc_init( BSP_heap_start, |
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| 111 | BSP_heap_end - BSP_heap_start, |
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| 112 | 0); |
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| 113 | } |
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| 114 | |
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| 115 | void bsp_calc_mem_layout() |
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| 116 | { |
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| 117 | /* |
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| 118 | * these labels (!) are defined in the linker command file |
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| 119 | * or when the linker is invoked |
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| 120 | * NOTE: the information(size) is the address of the object, |
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| 121 | * not the object otself |
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| 122 | */ |
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| 123 | extern unsigned char TopRamReserved; |
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[99e65f9c] | 124 | extern unsigned char _WorkspaceBase[]; |
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[f610e83f] | 125 | |
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| 126 | /* |
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| 127 | * compute the memory layout: |
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| 128 | * - first unused address is Workspace start |
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| 129 | * - Heap starts at end of workspace |
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| 130 | * - Heap ends at end of memory - reserved memory area |
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| 131 | */ |
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[4130d8e2] | 132 | Configuration.work_space_start = _WorkspaceBase; |
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[f610e83f] | 133 | |
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[4130d8e2] | 134 | BSP_heap_start = ((char *)Configuration.work_space_start + |
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| 135 | rtems_configuration_get_work_space_size()); |
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[f610e83f] | 136 | |
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| 137 | #if defined(HAS_UBOOT) |
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| 138 | BSP_heap_end = (uboot_bdinfo_ptr->bi_memstart |
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| 139 | + uboot_bdinfo_ptr->bi_memsize |
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| 140 | - (uint32_t)&TopRamReserved); |
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| 141 | #else |
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| 142 | BSP_heap_end = (void *)(RAM_END - (uint32_t)&TopRamReserved); |
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| 143 | #endif |
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| 144 | |
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| 145 | } |
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| 146 | |
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| 147 | |
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| 148 | void bsp_start(void) |
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| 149 | { |
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| 150 | ppc_cpu_id_t myCpu; |
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| 151 | ppc_cpu_revision_t myCpuRevision; |
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| 152 | register unsigned char* intrStack; |
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| 153 | |
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| 154 | /* |
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| 155 | * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function |
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| 156 | * store the result in global variables so that it can be used latter... |
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| 157 | */ |
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| 158 | myCpu = get_ppc_cpu_type(); |
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| 159 | myCpuRevision = get_ppc_cpu_revision(); |
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| 160 | /* |
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| 161 | * determine heap and workspace placement |
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| 162 | */ |
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| 163 | bsp_calc_mem_layout(); |
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| 164 | |
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| 165 | cpu_init(); |
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| 166 | |
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| 167 | /* |
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| 168 | * Initialize some SPRG registers related to irq handling |
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| 169 | */ |
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| 170 | |
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| 171 | intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE); |
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| 172 | |
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| 173 | _write_SPRG1((unsigned int)intrStack); |
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| 174 | |
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[558bc25] | 175 | /* Signal them that this BSP has fixed PR288 - eventually, this should |
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| 176 | * go away |
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| 177 | */ |
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[f610e83f] | 178 | _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); |
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| 179 | |
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[42bf1b9] | 180 | /* |
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| 181 | * this is evaluated during runtime, so it should be ok to set it |
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| 182 | * before we initialize the drivers |
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| 183 | */ |
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| 184 | BSP_bus_frequency = BSP_CLKIN_FRQ * BSP_SYSPLL_MF / BSP_SYSPLL_CKID; |
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[f610e83f] | 185 | /* |
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[cafa2c5] | 186 | * initialize the device driver parameters |
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[f610e83f] | 187 | */ |
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[42bf1b9] | 188 | bsp_clicks_per_usec = (BSP_bus_frequency/1000000); |
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[07e9642c] | 189 | |
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| 190 | /* |
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| 191 | * Install our own set of exception vectors |
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| 192 | */ |
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[f610e83f] | 193 | |
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| 194 | initialize_exceptions(); |
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| 195 | |
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| 196 | /* |
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| 197 | * Enable instruction and data caches. Do not force writethrough mode. |
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| 198 | */ |
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| 199 | #if INSTRUCTION_CACHE_ENABLE |
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| 200 | rtems_cache_enable_instruction(); |
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| 201 | #endif |
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| 202 | #if DATA_CACHE_ENABLE |
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| 203 | rtems_cache_enable_data(); |
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| 204 | #endif |
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| 205 | |
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| 206 | /* |
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| 207 | * Allocate the memory for the RTEMS Work Space. This can come from |
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| 208 | * a variety of places: hard coded address, malloc'ed from outside |
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| 209 | * RTEMS world (e.g. simulator or primitive memory manager), or (as |
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| 210 | * typically done by stock BSPs) by subtracting the required amount |
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| 211 | * of work space from the last physical address on the CPU board. |
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| 212 | */ |
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| 213 | |
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| 214 | /* |
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| 215 | * Initalize RTEMS IRQ system |
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| 216 | */ |
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| 217 | BSP_rtems_irq_mng_init(0); |
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| 218 | |
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| 219 | #ifdef SHOW_MORE_INIT_SETTINGS |
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| 220 | printk("Exit from bspstart\n"); |
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| 221 | #endif |
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| 222 | |
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| 223 | } |
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| 224 | |
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| 225 | /* |
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| 226 | * |
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| 227 | * _Thread_Idle_body |
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| 228 | * |
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| 229 | * Replaces the one in c/src/exec/score/src/threadidlebody.c |
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| 230 | * The MSR[POW] bit is set to put the CPU into the low power mode |
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| 231 | * defined in HID0. HID0 is set during starup in start.S. |
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| 232 | * |
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| 233 | */ |
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| 234 | Thread _Thread_Idle_body(uint32_t ignored ) |
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| 235 | { |
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| 236 | |
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| 237 | for(;;) |
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| 238 | { |
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| 239 | |
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| 240 | asm volatile("mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0"); |
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| 241 | |
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| 242 | } |
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| 243 | |
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| 244 | return 0; |
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| 245 | |
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| 246 | } |
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| 247 | |
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