source: rtems/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c @ ca680bc5

4.104.114.84.95
Last change on this file since ca680bc5 was ca680bc5, checked in by Ralf Corsepius <ralf.corsepius@…>, on 12/31/05 at 05:09:26

New (CVS import Thomas Doerfler <Thomas.Doerfler@…>'s
submission).

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File size: 14.0 KB
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1/*===============================================================*\
2| Project: RTEMS generic MPC5200 BSP                              |
3+-----------------------------------------------------------------+
4| File: $File$
5+-----------------------------------------------------------------+
6| Partially based on the code references which are named below.   |
7| Adaptions, modifications, enhancements and any recent parts of  |
8| the code are:                                                   |
9|                    Copyright (c) 2005                           |
10|                    Embedded Brains GmbH                         |
11|                    Obere Lagerstr. 30                           |
12|                    D-82178 Puchheim                             |
13|                    Germany                                      |
14|                    rtems@embedded-brains.de                     |
15+-----------------------------------------------------------------+
16| The license and distribution terms for this file may be         |
17| found in the file LICENSE in this distribution or at            |
18|                                                                 |
19| http://www.rtems.com/license/LICENSE.                           |
20|                                                                 |
21+-----------------------------------------------------------------+
22| this file contains the BSP initialization code                  |
23+-----------------------------------------------------------------+
24|   date                      history                        ID   |
25| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
26| 01.12.05  creation                                         doe  |
27|*****************************************************************|
28|*CVS information:                                                |
29|*(the following information is created automatically,            |
30|*do not edit here)                                               |
31|*****************************************************************|
32|* $Log$
33|* Revision 1.8  2005/12/09 08:57:03  thomas
34|* added/modifed file headers
35|*
36|* Revision 1.7  2005/12/06 14:11:12  thomas
37|* added EB file headers
38|*
39 *
40|*****************************************************************|
41\*===============================================================*/
42/***********************************************************************/
43/*                                                                     */
44/*   Module:       bspstart.c                                          */
45/*   Date:         07/17/2003                                          */
46/*   Purpose:      RTEMS MPC5x00 C level startup code                  */
47/*                                                                     */
48/*---------------------------------------------------------------------*/
49/*                                                                     */
50/*   Description:  This routine starts the application. It includes    */
51/*                 application, board, and monitor specific            */
52/*                 initialization and configuration. The generic CPU   */
53/*                 dependent initialization has been performed before  */
54/*                 this routine is invoked.                            */
55/*                                                                     */
56/*---------------------------------------------------------------------*/
57/*                                                                     */
58/*   Code                                                              */
59/*   References:   MPC8260ads C level startup code                     */
60/*   Module:       bspstart.c                                          */
61/*   Project:      RTEMS 4.6.0pre1 / MCF8260ads BSP                    */
62/*   Version       1.2                                                 */
63/*   Date:         04/17/2002                                          */
64/*                                                                     */
65/*   Author(s) / Copyright(s):                                         */
66/*                                                                     */
67/*   The MPC860 specific stuff was written by Jay Monkman              */
68/*   (jmonkman@frasca.com)                                             */
69/*                                                                     */
70/*   Modified for the MPC8260ADS board by Andy Dachs                   */
71/*   <a.dachs@sstl.co.uk>                                              */
72/*   Surrey Satellite Technology Limited, 2001                         */
73/*   A 40MHz system clock is assumed.                                  */
74/*   The PON. RST.CONF. Dip switches (DS1) are                         */
75/*   1 - Off                                                           */
76/*   2 - On                                                            */
77/*   3 - Off                                                           */
78/*   4 - On                                                            */
79/*   5 - Off                                                           */
80/*   6 - Off                                                           */
81/*   7 - Off                                                           */
82/*   8 - Off                                                           */
83/*   Dip switches on DS2 and DS3 are all set to ON                     */
84/*   The LEDs on the board are used to signal panic and fatal_error    */
85/*   conditions.                                                       */
86/*   The mmu is unused at this time.                                   */
87/*                                                                     */
88/*   COPYRIGHT (c) 1989-1999.                                          */
89/*   On-Line Applications Research Corporation (OAR).                  */
90/*                                                                     */
91/*   The license and distribution terms for this file may be           */
92/*   found in found in the file LICENSE in this distribution or at     */
93/*   http://www.OARcorp.com/rtems/license.html.                        */
94/*                                                                     */
95/*---------------------------------------------------------------------*/
96/*                                                                     */
97/*   Partially based on the code references which are named above.     */
98/*   Adaptions, modifications, enhancements and any recent parts of    */
99/*   the code are under the right of                                   */
100/*                                                                     */
101/*         IPR Engineering, Dachauer Straße 38, D-80335 München        */
102/*                        Copyright(C) 2003                            */
103/*                                                                     */
104/*---------------------------------------------------------------------*/
105/*                                                                     */
106/*   IPR Engineering makes no representation or warranties with        */
107/*   respect to the performance of this computer program, and          */
108/*   specifically disclaims any responsibility for any damages,        */
109/*   special or consequential, connected with the use of this program. */
110/*                                                                     */
111/*---------------------------------------------------------------------*/
112/*                                                                     */
113/*   Version history:  1.0                                             */
114/*                                                                     */
115/***********************************************************************/
116
117/*#include "../include/bsp.h"*/
118#include "../include/bsp.h"
119
120#include <rtems/libio.h>
121#include <rtems/libcsupport.h>
122#include <rtems/powerpc/powerpc.h>
123#include <rtems/score/thread.h>
124
125#include <rtems/bspIo.h>
126#include <libcpu/cpuIdent.h>
127#include <libcpu/spr.h>
128#include "../irq/irq.h"
129
130#include <string.h>
131
132#ifdef STACK_CHECKER_ON
133#include <stackchk.h>
134#endif
135
136#if defined(HAS_UBOOT)
137bd_t *uboot_bdinfo_ptr = (bd_t *)1; /* will be overwritten from startup code */
138bd_t uboot_bdinfo_copy;             /* will be overwritten with copy of bdinfo */
139#endif
140
141SPR_RW(SPRG0)
142SPR_RW(SPRG1)
143
144/*
145 *  The original table from the application (in ROM) and our copy of it with
146 *  some changes. Configuration is defined in <confdefs.h>. Make sure that
147 *  our configuration tables are uninitialized so that they get allocated in
148 *  the .bss section (RAM).
149 */
150extern rtems_configuration_table Configuration;
151extern unsigned long intrStackPtr;
152rtems_configuration_table  BSP_Configuration;
153rtems_cpu_table Cpu_table;
154char *rtems_progname;
155
156
157/*
158 *  Use the shared implementations of the following routines.
159 *  Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
160 *  rtems/c/src/lib/libbsp/shared/bsplibc.c.
161 */
162void bsp_postdriver_hook(void);
163void bsp_libc_init( void *, uint32_t, int );
164extern void initialize_exceptions(void);
165extern void cpu_init(void);
166
167void BSP_panic(char *s)
168  {
169  printk("%s PANIC %s\n",_RTEMS_version, s);
170  __asm__ __volatile ("sc");
171  }
172
173void _BSP_Fatal_error(unsigned int v)
174  {
175  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
176  __asm__ __volatile ("sc");
177  }
178
179/*
180 *  Function:   bsp_pretasking_hook
181 *  Created:    95/03/10
182 *
183 *  Description:
184 *      BSP pretasking hook.  Called just before drivers are initialized.
185 *      Used to setup libc and install any BSP extensions.
186 *
187 *  NOTES:
188 *      Must not use libc (to do io) from here, since drivers are
189 *      not yet initialized.
190 *
191 */
192
193void
194bsp_pretasking_hook(void)
195{
196  /*
197   *  These are assigned addresses in the linkcmds file for the BSP. This
198   *  approach is better than having these defined as manifest constants and
199   *  compiled into the kernel, but it is still not ideal when dealing with
200   *  multiprocessor configuration in which each board as a different memory
201   *  map. A better place for defining these symbols might be the makefiles.
202   *  Consideration should also be given to developing an approach in which
203   *  the kernel and the application can be linked and burned into ROM
204   *  independently of each other.
205   */
206
207#if defined(HAS_UBOOT)
208    extern unsigned char _HeapStart;
209
210    bsp_libc_init( &_HeapStart,
211                   uboot_bdinfo_ptr->bi_memstart
212                   + uboot_bdinfo_ptr->bi_memsize
213                   - (uint32_t)&_HeapStart
214                   , 0 );
215#else
216    extern unsigned char _HeapStart;
217    extern unsigned char _HeapEnd;
218
219    bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
220#endif
221
222
223#ifdef STACK_CHECKER_ON
224  /*
225   *  Initialize the stack bounds checker
226   *  We can either turn it on here or from the app.
227   */
228
229  Stack_check_Initialize();
230#endif
231
232#ifdef RTEMS_DEBUG
233  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
234#endif
235}
236
237
238
239void bsp_predriver_hook(void)
240  {
241#if 0
242  init_RTC();
243
244  init_PCI();
245  initialize_universe();
246  initialize_PCI_bridge ();
247
248#if (HAS_PMC_PSC8)
249  initialize_PMC();
250#endif
251
252 /*
253  * Initialize Bsp General purpose vector table.
254  */
255 initialize_external_exception_vector();
256
257#if (0)
258  /*
259   * XXX - Modify this to write a 48000000 (loop to self) command
260   *       to each interrupt location.  This is better for debug.
261   */
262 bsp_spurious_initialize();
263#endif
264
265#endif
266}
267
268
269
270void bsp_start(void)
271{
272  extern void *_WorkspaceBase;
273  ppc_cpu_id_t myCpu;
274  ppc_cpu_revision_t myCpuRevision;
275  register unsigned char* intrStack;
276
277  /*
278   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
279   * store the result in global variables so that it can be used latter...
280   */
281  myCpu             = get_ppc_cpu_type();
282  myCpuRevision = get_ppc_cpu_revision();
283
284#if defined(HAS_UBOOT)
285  uboot_bdinfo_copy = *uboot_bdinfo_ptr;
286  uboot_bdinfo_ptr = &uboot_bdinfo_copy;
287#endif 
288  cpu_init();
289
290  /*
291   * Initialize some SPRG registers related to irq handling
292   */
293
294  intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
295
296  _write_SPRG1((unsigned int)intrStack);
297
298  /* Signal them that this BSP has fixed PR288 - eventually, this should go away */
299  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
300
301  /*
302   *  initialize the CPU table for this BSP
303   */
304
305  Cpu_table.pretasking_hook        = bsp_pretasking_hook;    /* init libc, etc. */
306  Cpu_table.predriver_hook         = bsp_predriver_hook;     /* init PCI / RTC ...   */
307  Cpu_table.postdriver_hook        = bsp_postdriver_hook;
308  Cpu_table.clicks_per_usec        = (IPB_CLOCK/1000000);
309  Cpu_table.do_zero_of_workspace   = TRUE;
310  Cpu_table.exceptions_in_RAM      = TRUE;
311
312  if( Cpu_table.interrupt_stack_size < 4*1024 )
313    Cpu_table.interrupt_stack_size = 4 * 1024;
314
315 /*
316  * Install our own set of exception vectors
317  */
318
319  initialize_exceptions();
320
321  /*
322   * Enable instruction and data caches. Do not force writethrough mode.
323   */
324#if INSTRUCTION_CACHE_ENABLE
325  rtems_cache_enable_instruction();
326#endif
327#if DATA_CACHE_ENABLE
328  rtems_cache_enable_data();
329#endif
330
331  /*
332   *  Allocate the memory for the RTEMS Work Space.  This can come from
333   *  a variety of places: hard coded address, malloc'ed from outside
334   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
335   *  typically done by stock BSPs) by subtracting the required amount
336   *  of work space from the last physical address on the CPU board.
337   */
338
339  /*
340   *  Need to "allocate" the memory for the RTEMS Workspace and
341   *  tell the RTEMS configuration where it is.  This memory is
342   *  not malloc'ed.  It is just "pulled from the air".
343   */
344  BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
345
346
347  /*
348  BSP_Configuration.microseconds_per_tick  = 1000;
349  */
350
351  /*
352   * Initalize RTEMS IRQ system
353   */
354  BSP_rtems_irq_mng_init(0);
355
356#ifdef SHOW_MORE_INIT_SETTINGS
357  printk("Exit from bspstart\n");
358#endif
359
360  }
361
362/*
363 *
364 *  _Thread_Idle_body
365 *
366 *  Replaces the one in c/src/exec/score/src/threadidlebody.c
367 *  The MSR[POW] bit is set to put the CPU into the low power mode
368 *  defined in HID0.  HID0 is set during starup in start.S.
369 *
370 */
371Thread _Thread_Idle_body(uint32_t ignored )
372  {
373
374  for(;;)
375    {
376
377    asm volatile("mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0");
378
379    }
380
381  return 0;
382
383  }
384
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