source: rtems/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c @ 7da3405

4.104.114.84.95
Last change on this file since 7da3405 was 7da3405, checked in by Joel Sherrill <joel.sherrill@…>, on 06/20/07 at 21:42:00

2007-06-20 Joel Sherrill <joel.sherrill@…>

Add Embedded Planets EP5200 which is the same as the Freescale
5200Lite (a.k.a. IceCube?) evaluation board.

  • Makefile.am: Add linkcmds.ep5200. Add -DMPC5200_BAPI_LIBC_HEADERS to remove some warnings in bestcomm.
  • preinstall.am: Add linkcmds.ep5200.
  • clock/clock.c: Correct math for prescaler/counter when bus speed is high enough to require multiple passes of loop.
  • console/console.c: Use same math for initial baud rate as when it is changed via ioctl. When HAS_UBOOT is defined, initialize console to the same baud as it was with U-Boot.
  • include/bsp.h: Add EP5200 and console boot baud support.
  • include/mpc5200.h: Spacing.
  • startup/bspstart.c: If HAS_UBOOT and SHOW_MORE_INIT_SETTINGS are both defined, dump the U-Boot BD info structure.
  • vectors/vectors.S: ep5200 cannot use vectors segment. When loading it, U-Boot freezes. Besides, U-Boot can automatically start the BSP so we do not have to run from board reset.
  • startup/linkcmds.ep5200: New file.
  • Property mode set to 100644
File size: 13.2 KB
Line 
1/*===============================================================*\
2| Project: RTEMS generic MPC5200 BSP                              |
3+-----------------------------------------------------------------+
4| Partially based on the code references which are named below.   |
5| Adaptions, modifications, enhancements and any recent parts of  |
6| the code are:                                                   |
7|                    Copyright (c) 2005                           |
8|                    Embedded Brains GmbH                         |
9|                    Obere Lagerstr. 30                           |
10|                    D-82178 Puchheim                             |
11|                    Germany                                      |
12|                    rtems@embedded-brains.de                     |
13+-----------------------------------------------------------------+
14| The license and distribution terms for this file may be         |
15| found in the file LICENSE in this distribution or at            |
16|                                                                 |
17| http://www.rtems.com/license/LICENSE.                           |
18|                                                                 |
19+-----------------------------------------------------------------+
20| this file contains the BSP initialization code                  |
21\*===============================================================*/
22/***********************************************************************/
23/*                                                                     */
24/*   Module:       bspstart.c                                          */
25/*   Date:         07/17/2003                                          */
26/*   Purpose:      RTEMS MPC5x00 C level startup code                  */
27/*                                                                     */
28/*---------------------------------------------------------------------*/
29/*                                                                     */
30/*   Description:  This routine starts the application. It includes    */
31/*                 application, board, and monitor specific            */
32/*                 initialization and configuration. The generic CPU   */
33/*                 dependent initialization has been performed before  */
34/*                 this routine is invoked.                            */
35/*                                                                     */
36/*---------------------------------------------------------------------*/
37/*                                                                     */
38/*   Code                                                              */
39/*   References:   MPC8260ads C level startup code                     */
40/*   Module:       bspstart.c                                          */
41/*   Project:      RTEMS 4.6.0pre1 / MCF8260ads BSP                    */
42/*   Version       1.2                                                 */
43/*   Date:         04/17/2002                                          */
44/*                                                                     */
45/*   Author(s) / Copyright(s):                                         */
46/*                                                                     */
47/*   The MPC860 specific stuff was written by Jay Monkman              */
48/*   (jmonkman@frasca.com)                                             */
49/*                                                                     */
50/*   Modified for the MPC8260ADS board by Andy Dachs                   */
51/*   <a.dachs@sstl.co.uk>                                              */
52/*   Surrey Satellite Technology Limited, 2001                         */
53/*   A 40MHz system clock is assumed.                                  */
54/*   The PON. RST.CONF. Dip switches (DS1) are                         */
55/*   1 - Off                                                           */
56/*   2 - On                                                            */
57/*   3 - Off                                                           */
58/*   4 - On                                                            */
59/*   5 - Off                                                           */
60/*   6 - Off                                                           */
61/*   7 - Off                                                           */
62/*   8 - Off                                                           */
63/*   Dip switches on DS2 and DS3 are all set to ON                     */
64/*   The LEDs on the board are used to signal panic and fatal_error    */
65/*   conditions.                                                       */
66/*   The mmu is unused at this time.                                   */
67/*                                                                     */
68/*   COPYRIGHT (c) 1989-1999.                                          */
69/*   On-Line Applications Research Corporation (OAR).                  */
70/*                                                                     */
71/*   The license and distribution terms for this file may be           */
72/*   found in found in the file LICENSE in this distribution or at     */
73/*   http://www.rtems.com/license/LICENSE.                        */
74/*                                                                     */
75/*---------------------------------------------------------------------*/
76/*                                                                     */
77/*   Partially based on the code references which are named above.     */
78/*   Adaptions, modifications, enhancements and any recent parts of    */
79/*   the code are under the right of                                   */
80/*                                                                     */
81/*         IPR Engineering, Dachauer Straße 38, D-80335 MÃŒnchen        */
82/*                        Copyright(C) 2003                            */
83/*                                                                     */
84/*---------------------------------------------------------------------*/
85/*                                                                     */
86/*   IPR Engineering makes no representation or warranties with        */
87/*   respect to the performance of this computer program, and          */
88/*   specifically disclaims any responsibility for any damages,        */
89/*   special or consequential, connected with the use of this program. */
90/*                                                                     */
91/*---------------------------------------------------------------------*/
92/*                                                                     */
93/*   Version history:  1.0                                             */
94/*                                                                     */
95/***********************************************************************/
96
97#include <bsp.h>
98
99#include <rtems/libio.h>
100#include <rtems/libcsupport.h>
101#include <rtems/powerpc/powerpc.h>
102#include <rtems/score/thread.h>
103
104#include <rtems/bspIo.h>
105#include <libcpu/cpuIdent.h>
106#include <libcpu/spr.h>
107#include "../irq/irq.h"
108
109#include <string.h>
110
111#ifdef STACK_CHECKER_ON
112#include <stackchk.h>
113#endif
114
115#if defined(HAS_UBOOT)
116bd_t *uboot_bdinfo_ptr = (bd_t *)1; /* will be overwritten from startup code */
117bd_t uboot_bdinfo_copy;             /* will be overwritten with copy of bdinfo */
118#endif
119
120SPR_RW(SPRG0)
121SPR_RW(SPRG1)
122
123/*
124 *  The original table from the application (in ROM) and our copy of it with
125 *  some changes. Configuration is defined in <confdefs.h>. Make sure that
126 *  our configuration tables are uninitialized so that they get allocated in
127 *  the .bss section (RAM).
128 */
129extern rtems_configuration_table Configuration;
130extern unsigned long intrStackPtr;
131rtems_configuration_table  BSP_Configuration;
132rtems_cpu_table Cpu_table;
133char *rtems_progname;
134
135
136/*
137 *  Use the shared implementations of the following routines.
138 *  Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
139 *  rtems/c/src/lib/libbsp/shared/bsplibc.c.
140 */
141void bsp_postdriver_hook(void);
142void bsp_libc_init( void *, uint32_t, int );
143extern void initialize_exceptions(void);
144extern void cpu_init(void);
145
146void BSP_panic(char *s)
147  {
148  printk("%s PANIC %s\n",_RTEMS_version, s);
149  __asm__ __volatile ("sc");
150  }
151
152void _BSP_Fatal_error(unsigned int v)
153  {
154  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
155  __asm__ __volatile ("sc");
156  }
157
158/*
159 *  Function:   bsp_pretasking_hook
160 *  Created:    95/03/10
161 *
162 *  Description:
163 *      BSP pretasking hook.  Called just before drivers are initialized.
164 *      Used to setup libc and install any BSP extensions.
165 *
166 *  NOTES:
167 *      Must not use libc (to do io) from here, since drivers are
168 *      not yet initialized.
169 *
170 */
171
172void
173bsp_pretasking_hook(void)
174{
175  /*
176   *  These are assigned addresses in the linkcmds file for the BSP. This
177   *  approach is better than having these defined as manifest constants and
178   *  compiled into the kernel, but it is still not ideal when dealing with
179   *  multiprocessor configuration in which each board as a different memory
180   *  map. A better place for defining these symbols might be the makefiles.
181   *  Consideration should also be given to developing an approach in which
182   *  the kernel and the application can be linked and burned into ROM
183   *  independently of each other.
184   */
185
186#if defined(HAS_UBOOT)
187    extern unsigned char _HeapStart;
188
189    bsp_libc_init( &_HeapStart,
190                   uboot_bdinfo_ptr->bi_memstart
191                   + uboot_bdinfo_ptr->bi_memsize
192                   - (uint32_t)&_HeapStart
193                   , 0 );
194#else
195    extern unsigned char _HeapStart;
196    extern unsigned char _HeapEnd;
197
198    bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
199#endif
200
201
202#ifdef STACK_CHECKER_ON
203  /*
204   *  Initialize the stack bounds checker
205   *  We can either turn it on here or from the app.
206   */
207
208  Stack_check_Initialize();
209#endif
210
211#ifdef RTEMS_DEBUG
212  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
213#endif
214}
215
216
217
218void bsp_predriver_hook(void)
219  {
220#if 0
221  init_RTC();
222
223  init_PCI();
224  initialize_universe();
225  initialize_PCI_bridge ();
226
227#if (HAS_PMC_PSC8)
228  initialize_PMC();
229#endif
230
231 /*
232  * Initialize Bsp General purpose vector table.
233  */
234 initialize_external_exception_vector();
235
236#if (0)
237  /*
238   * XXX - Modify this to write a 48000000 (loop to self) command
239   *       to each interrupt location.  This is better for debug.
240   */
241 bsp_spurious_initialize();
242#endif
243
244#endif
245}
246
247void bsp_start(void)
248{
249  extern void *_WorkspaceBase;
250  ppc_cpu_id_t myCpu;
251  ppc_cpu_revision_t myCpuRevision;
252  register unsigned char* intrStack;
253
254  /*
255   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
256   * store the result in global variables so that it can be used latter...
257   */
258  myCpu         = get_ppc_cpu_type();
259  myCpuRevision = get_ppc_cpu_revision();
260
261#if defined(HAS_UBOOT)
262  uboot_bdinfo_copy = *uboot_bdinfo_ptr;
263  uboot_bdinfo_ptr = &uboot_bdinfo_copy;
264#endif 
265
266#if defined(HAS_UBOOT) && defined(SHOW_MORE_INIT_SETTINGS)
267  {
268    void dumpUBootBDInfo( bd_t * );
269    dumpUBootBDInfo( uboot_bdinfo_ptr );
270  }
271#endif
272
273  cpu_init();
274
275  /*
276   * Initialize some SPRG registers related to irq handling
277   */
278
279  intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
280
281  _write_SPRG1((unsigned int)intrStack);
282
283  /* Signal them that this BSP has fixed PR288 - eventually, this should go away */
284  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
285
286  /*
287   *  initialize the CPU table for this BSP
288   */
289
290  Cpu_table.pretasking_hook        = bsp_pretasking_hook;    /* init libc, etc. */
291  Cpu_table.predriver_hook         = bsp_predriver_hook;     /* init PCI / RTC ...   */
292  Cpu_table.postdriver_hook        = bsp_postdriver_hook;
293  Cpu_table.clicks_per_usec        = (IPB_CLOCK/1000000);
294  Cpu_table.exceptions_in_RAM      = TRUE;
295
296  if( Cpu_table.interrupt_stack_size < 4*1024 )
297    Cpu_table.interrupt_stack_size = 4 * 1024;
298
299 /*
300  * Install our own set of exception vectors
301  */
302
303  initialize_exceptions();
304
305  /*
306   * Enable instruction and data caches. Do not force writethrough mode.
307   */
308#if INSTRUCTION_CACHE_ENABLE
309  rtems_cache_enable_instruction();
310#endif
311#if DATA_CACHE_ENABLE
312  rtems_cache_enable_data();
313#endif
314
315  /*
316   *  Allocate the memory for the RTEMS Work Space.  This can come from
317   *  a variety of places: hard coded address, malloc'ed from outside
318   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
319   *  typically done by stock BSPs) by subtracting the required amount
320   *  of work space from the last physical address on the CPU board.
321   */
322
323  /*
324   *  Need to "allocate" the memory for the RTEMS Workspace and
325   *  tell the RTEMS configuration where it is.  This memory is
326   *  not malloc'ed.  It is just "pulled from the air".
327   */
328  BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
329
330
331  /*
332  BSP_Configuration.microseconds_per_tick  = 1000;
333  */
334
335  /*
336   * Initalize RTEMS IRQ system
337   */
338  BSP_rtems_irq_mng_init(0);
339
340#ifdef SHOW_MORE_INIT_SETTINGS
341  printk("Exit from bspstart\n");
342#endif
343
344  }
345
346/*
347 *
348 *  _Thread_Idle_body
349 *
350 *  Replaces the one in c/src/exec/score/src/threadidlebody.c
351 *  The MSR[POW] bit is set to put the CPU into the low power mode
352 *  defined in HID0.  HID0 is set during starup in start.S.
353 *
354 */
355Thread _Thread_Idle_body(uint32_t ignored )
356  {
357
358  for(;;)
359    {
360
361    asm volatile("mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0");
362
363    }
364
365  return 0;
366
367  }
368
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