1 | /*===============================================================*\ |
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2 | | Project: RTEMS generic MPC5200 BSP | |
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3 | +-----------------------------------------------------------------+ |
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4 | | Partially based on the code references which are named below. | |
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5 | | Adaptions, modifications, enhancements and any recent parts of | |
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6 | | the code are: | |
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7 | | Copyright (c) 2005 | |
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8 | | Embedded Brains GmbH | |
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9 | | Obere Lagerstr. 30 | |
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10 | | D-82178 Puchheim | |
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11 | | Germany | |
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12 | | rtems@embedded-brains.de | |
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13 | +-----------------------------------------------------------------+ |
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14 | | The license and distribution terms for this file may be | |
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15 | | found in the file LICENSE in this distribution or at | |
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16 | | | |
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17 | | http://www.rtems.org/license/LICENSE. | |
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18 | | | |
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19 | +-----------------------------------------------------------------+ |
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20 | | this file contains board specific definitions | |
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21 | \*===============================================================*/ |
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22 | |
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23 | #ifndef LIBBSP_POWERPC_GEN5200_BSP_H |
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24 | #define LIBBSP_POWERPC_GEN5200_BSP_H |
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25 | |
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26 | #include <bspopts.h> |
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27 | |
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28 | #include <libcpu/powerpc-utility.h> |
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29 | |
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30 | /* |
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31 | * Some symbols defined in the linker command file. |
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32 | */ |
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33 | |
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34 | LINKER_SYMBOL(bsp_ram_start); |
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35 | LINKER_SYMBOL(bsp_ram_end); |
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36 | LINKER_SYMBOL(bsp_ram_size); |
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37 | |
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38 | LINKER_SYMBOL(bsp_rom_start); |
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39 | LINKER_SYMBOL(bsp_rom_end); |
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40 | LINKER_SYMBOL(bsp_rom_size); |
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41 | |
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42 | LINKER_SYMBOL(bsp_dpram_start); |
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43 | LINKER_SYMBOL(bsp_dpram_end); |
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44 | LINKER_SYMBOL(bsp_dpram_size); |
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45 | |
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46 | LINKER_SYMBOL(bsp_section_text_start); |
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47 | LINKER_SYMBOL(bsp_section_text_end); |
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48 | LINKER_SYMBOL(bsp_section_text_size); |
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49 | |
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50 | LINKER_SYMBOL(bsp_section_data_start); |
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51 | LINKER_SYMBOL(bsp_section_data_end); |
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52 | LINKER_SYMBOL(bsp_section_data_size); |
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53 | |
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54 | LINKER_SYMBOL(bsp_section_bss_start); |
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55 | LINKER_SYMBOL(bsp_section_bss_end); |
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56 | LINKER_SYMBOL(bsp_section_bss_size); |
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57 | |
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58 | LINKER_SYMBOL(bsp_interrupt_stack_start); |
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59 | LINKER_SYMBOL(bsp_interrupt_stack_end); |
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60 | LINKER_SYMBOL(bsp_interrupt_stack_size); |
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61 | |
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62 | LINKER_SYMBOL(bsp_work_area_start); |
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63 | |
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64 | LINKER_SYMBOL(MBAR); |
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65 | |
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66 | /* Provide legacy defines */ |
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67 | |
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68 | #ifdef MPC5200_BOARD_PM520_ZE30 |
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69 | #define PM520_ZE30 |
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70 | #endif |
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71 | |
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72 | #ifdef MPC5200_BOARD_PM520_CR825 |
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73 | #define PM520_CR825 |
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74 | #endif |
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75 | |
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76 | #ifdef MPC5200_BOARD_ICECUBE |
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77 | #define icecube |
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78 | #endif |
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79 | |
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80 | #ifdef MPC5200_BOARD_BRS5L |
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81 | #define BRS5L |
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82 | #endif |
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83 | |
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84 | /* |
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85 | * distinguish board characteristics |
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86 | */ |
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87 | /* |
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88 | * for PM520 mdule on a ZE30 carrier |
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89 | */ |
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90 | #if defined(MPC5200_BOARD_PM520_ZE30) |
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91 | #define PM520 |
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92 | #endif |
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93 | /* |
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94 | * for PM520 mdule on a CR825 carrier |
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95 | */ |
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96 | #if defined(MPC5200_BOARD_PM520_CR825) |
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97 | #define PM520 |
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98 | #endif |
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99 | |
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100 | #if !defined(HAS_UBOOT) |
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101 | /* we need the low level initialization in start.S*/ |
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102 | #define NEED_LOW_LEVEL_INIT |
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103 | #endif |
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104 | |
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105 | #if defined(MPC5200_BOARD_BRS5L) |
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106 | /* |
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107 | * IMD Custom Board BRS5L |
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108 | */ |
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109 | |
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110 | #define HAS_NVRAM_93CXX |
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111 | |
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112 | #elif defined(MPC5200_BOARD_BRS6L) |
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113 | #define MPC5200_BRS6L_FPGA_BEGIN 0x800000 |
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114 | #define MPC5200_BRS6L_FPGA_SIZE (64 * 1024) |
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115 | #define MPC5200_BRS6L_FPGA_END \ |
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116 | (MPC5200_BRS6L_FPGA_BEGIN + MPC5200_BRS6L_FPGA_SIZE) |
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117 | |
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118 | #define MPC5200_BRS6L_MRAM_BEGIN 0xff000000 |
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119 | #define MPC5200_BRS6L_MRAM_SIZE (4 * 1024 * 1024) |
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120 | #define MPC5200_BRS6L_MRAM_END \ |
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121 | (MPC5200_BRS6L_MRAM_BEGIN + MPC5200_BRS6L_MRAM_SIZE) |
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122 | #elif defined (PM520) |
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123 | |
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124 | /* Nothing special */ |
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125 | |
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126 | #elif defined (MPC5200_BOARD_ICECUBE) |
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127 | /* |
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128 | * Codename: IceCube |
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129 | * Compatible Boards: |
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130 | * Freescape MPC5200LITE |
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131 | * Embedded Planet EP5200 |
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132 | */ |
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133 | |
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134 | #elif defined (MPC5200_BOARD_DP2) |
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135 | |
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136 | /* Nothing special */ |
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137 | |
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138 | #else |
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139 | #error "board type not defined" |
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140 | #endif |
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141 | |
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142 | #ifndef ASM |
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143 | |
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144 | #include <rtems.h> |
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145 | #include <bsp/i2cdrv.h> |
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146 | #include <bsp/irq.h> |
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147 | #include <bsp/vectors.h> |
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148 | #include <bsp/u-boot.h> |
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149 | #include <bsp/default-initial-extension.h> |
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150 | |
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151 | #ifdef __cplusplus |
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152 | extern "C" { |
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153 | #endif |
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154 | |
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155 | /* |
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156 | * Network driver configuration |
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157 | */ |
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158 | struct rtems_bsdnet_ifconfig; |
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159 | extern int rtems_mpc5200_fec_driver_attach_detach (struct rtems_bsdnet_ifconfig *config, int attaching); |
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160 | #define RTEMS_BSP_NETWORK_DRIVER_NAME "eth1" |
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161 | #define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_mpc5200_fec_driver_attach_detach |
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162 | |
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163 | /* miscellaneous stuff assumed to exist */ |
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164 | |
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165 | /* |
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166 | * We need to decide how much memory will be non-cacheable. This |
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167 | * will mainly be memory that will be used in DMA (network and serial |
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168 | * buffers). |
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169 | */ |
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170 | /* |
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171 | #define NOCACHE_MEM_SIZE 512*1024 |
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172 | */ |
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173 | |
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174 | /* |
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175 | * Device Driver Table Entries |
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176 | */ |
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177 | |
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178 | #ifdef HAS_NVRAM_93CXX |
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179 | #define NVRAM_DRIVER_TABLE_ENTRY \ |
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180 | { nvram_driver_initialize, nvram_driver_open, nvram_driver_close, \ |
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181 | nvram_driver_read, nvram_driver_write, NULL } |
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182 | #endif |
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183 | |
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184 | /* |
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185 | * indicate, that BSP has IDE driver |
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186 | */ |
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187 | #define RTEMS_BSP_HAS_IDE_DRIVER |
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188 | |
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189 | /* functions */ |
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190 | |
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191 | /* #define SHOW_MORE_INIT_SETTINGS 1 */ |
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192 | |
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193 | /* ata modes */ |
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194 | /* #undef ATA_USE_INT */ |
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195 | #define ATA_USE_INT |
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196 | |
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197 | /* clock settings */ |
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198 | #if defined(HAS_UBOOT) |
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199 | #define IPB_CLOCK (bsp_uboot_board_info.bi_ipbfreq) |
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200 | #define XLB_CLOCK (bsp_uboot_board_info.bi_busfreq) |
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201 | #define G2_CLOCK (bsp_uboot_board_info.bi_intfreq) |
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202 | #elif defined(MPC5200_BOARD_BRS5L) || defined(MPC5200_BOARD_BRS6L) |
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203 | #define IPB_CLOCK 66000000 /* 66 MHz */ |
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204 | #define XLB_CLOCK 132000000 /* 132 MHz */ |
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205 | #define G2_CLOCK 396000000 /* 396 MHz */ |
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206 | #else |
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207 | #define IPB_CLOCK 33000000 /* 33 MHz */ |
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208 | #define XLB_CLOCK 66000000 /* 66 MHz */ |
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209 | #define G2_CLOCK 231000000 /* 231 MHz */ |
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210 | #endif |
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211 | |
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212 | #if defined(HAS_UBOOT) |
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213 | #define GEN5200_CONSOLE_BAUD (bsp_uboot_board_info.bi_baudrate) |
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214 | #else |
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215 | #define GEN5200_CONSOLE_BAUD 115200 |
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216 | #endif |
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217 | |
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218 | /* |
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219 | * Convert decrement value to tenths of microsecnds (used by |
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220 | * shared timer driver). |
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221 | * |
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222 | * + CPU has a XLB_CLOCK bus, |
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223 | * + There are 4 bus cycles per click |
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224 | * + We return value in 1/10 microsecond units. |
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225 | * Modified following equation to integer equation to remove |
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226 | * floating point math. |
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227 | * (int) ((float)(_value) / ((XLB_CLOCK/1000000 * 0.1) / 4.0)) |
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228 | */ |
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229 | |
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230 | #define BSP_Convert_decrementer( _value ) \ |
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231 | (int) (((_value) * 4000) / (XLB_CLOCK/10000)) |
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232 | |
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233 | /* slicetimer settings */ |
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234 | #define USE_SLICETIMER_0 TRUE |
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235 | #define USE_SLICETIMER_1 FALSE |
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236 | |
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237 | void *bsp_idle_thread( uintptr_t ignored ); |
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238 | #define BSP_IDLE_TASK_BODY bsp_idle_thread |
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239 | |
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240 | /* BSP specific IRQ Benchmarking support */ |
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241 | void BSP_IRQ_Benchmarking_Reset(void); |
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242 | void BSP_IRQ_Benchmarking_Report(void); |
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243 | |
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244 | #if defined(HAS_UBOOT) |
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245 | /* Routine to obtain U-Boot environment variables */ |
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246 | const char *bsp_uboot_getenv( |
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247 | const char *name |
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248 | ); |
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249 | #endif |
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250 | |
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251 | void cpu_init(void); |
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252 | |
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253 | int mpc5200_eth_mii_read( |
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254 | int phyAddr, |
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255 | void *arg, |
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256 | unsigned regAddr, |
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257 | uint32_t *retVal |
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258 | ); |
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259 | |
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260 | #ifdef __cplusplus |
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261 | } |
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262 | #endif |
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263 | |
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264 | #endif /* ASM */ |
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265 | |
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266 | #endif /* GEN5200 */ |
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