source: rtems/c/src/lib/libbsp/powerpc/gen5200/include/bsp.h @ d7a267b3

4.115
Last change on this file since d7a267b3 was d7a267b3, checked in by Sebastian Huber <sebastian.huber@…>, on 10/10/14 at 07:43:59

bsp/gen5200: Fix warnings

  • Property mode set to 100644
File size: 6.7 KB
Line 
1/*===============================================================*\
2| Project: RTEMS generic MPC5200 BSP                              |
3+-----------------------------------------------------------------+
4| Partially based on the code references which are named below.   |
5| Adaptions, modifications, enhancements and any recent parts of  |
6| the code are:                                                   |
7|                    Copyright (c) 2005                           |
8|                    Embedded Brains GmbH                         |
9|                    Obere Lagerstr. 30                           |
10|                    D-82178 Puchheim                             |
11|                    Germany                                      |
12|                    rtems@embedded-brains.de                     |
13+-----------------------------------------------------------------+
14| The license and distribution terms for this file may be         |
15| found in the file LICENSE in this distribution or at            |
16|                                                                 |
17| http://www.rtems.org/license/LICENSE.                           |
18|                                                                 |
19+-----------------------------------------------------------------+
20| this file contains board specific definitions                   |
21\*===============================================================*/
22
23#ifndef __GEN5200_BSP_h
24#define __GEN5200_BSP_h
25
26#include <bspopts.h>
27
28#include <libcpu/powerpc-utility.h>
29
30/*
31 * Some symbols defined in the linker command file.
32 */
33
34LINKER_SYMBOL(bsp_ram_start);
35LINKER_SYMBOL(bsp_ram_end);
36LINKER_SYMBOL(bsp_ram_size);
37
38LINKER_SYMBOL(bsp_rom_start);
39LINKER_SYMBOL(bsp_rom_end);
40LINKER_SYMBOL(bsp_rom_size);
41
42LINKER_SYMBOL(bsp_dpram_start);
43LINKER_SYMBOL(bsp_dpram_end);
44LINKER_SYMBOL(bsp_dpram_size);
45
46LINKER_SYMBOL(bsp_section_text_start);
47LINKER_SYMBOL(bsp_section_text_end);
48LINKER_SYMBOL(bsp_section_text_size);
49
50LINKER_SYMBOL(bsp_section_data_start);
51LINKER_SYMBOL(bsp_section_data_end);
52LINKER_SYMBOL(bsp_section_data_size);
53
54LINKER_SYMBOL(bsp_section_bss_start);
55LINKER_SYMBOL(bsp_section_bss_end);
56LINKER_SYMBOL(bsp_section_bss_size);
57
58LINKER_SYMBOL(bsp_interrupt_stack_start);
59LINKER_SYMBOL(bsp_interrupt_stack_end);
60LINKER_SYMBOL(bsp_interrupt_stack_size);
61
62LINKER_SYMBOL(bsp_work_area_start);
63
64LINKER_SYMBOL(MBAR);
65
66/* Provide legacy defines */
67
68#ifdef MPC5200_BOARD_PM520_ZE30
69#define PM520_ZE30
70#endif
71
72#ifdef MPC5200_BOARD_PM520_CR825
73#define PM520_CR825
74#endif
75
76#ifdef MPC5200_BOARD_ICECUBE
77#define icecube
78#endif
79
80#ifdef MPC5200_BOARD_BRS5L
81#define BRS5L
82#endif
83
84/*
85 * distinguish board characteristics
86 */
87/*
88 * for PM520 mdule on a ZE30 carrier
89 */
90#if defined(MPC5200_BOARD_PM520_ZE30)
91#define PM520
92#endif
93/*
94 * for PM520 mdule on a CR825 carrier
95 */
96#if defined(MPC5200_BOARD_PM520_CR825)
97#define PM520
98#endif
99
100#if !defined(HAS_UBOOT)
101  /* we need the low level initialization in start.S*/
102  #define NEED_LOW_LEVEL_INIT
103#endif
104
105#if defined(MPC5200_BOARD_BRS5L)
106/*
107 * IMD Custom Board BRS5L
108 */
109
110#define HAS_NVRAM_93CXX
111
112#elif defined(MPC5200_BOARD_BRS6L)
113  #define MPC5200_BRS6L_FPGA_BEGIN 0x800000
114  #define MPC5200_BRS6L_FPGA_SIZE (64 * 1024)
115  #define MPC5200_BRS6L_FPGA_END \
116    (MPC5200_BRS6L_FPGA_BEGIN + MPC5200_BRS6L_FPGA_SIZE)
117
118  #define MPC5200_BRS6L_MRAM_BEGIN 0xff000000
119  #define MPC5200_BRS6L_MRAM_SIZE (4 * 1024 * 1024)
120  #define MPC5200_BRS6L_MRAM_END \
121    (MPC5200_BRS6L_MRAM_BEGIN + MPC5200_BRS6L_MRAM_SIZE)
122#elif defined (PM520)
123
124/* Nothing special */
125
126#elif defined (MPC5200_BOARD_ICECUBE)
127/*
128 *  Codename: IceCube
129 *  Compatible Boards:
130 *     Freescape MPC5200LITE
131 *     Embedded Planet EP5200
132 */
133
134#elif defined (MPC5200_BOARD_DP2)
135
136/* Nothing special */
137
138#else
139#error "board type not defined"
140#endif
141
142#ifndef ASM
143
144#ifdef __cplusplus
145extern "C" {
146#endif
147
148
149#include <rtems.h>
150#include <rtems/console.h>
151#include <rtems/clockdrv.h>
152#include <rtems/rtc.h>
153#include <i2cdrv.h>
154#include <bsp/irq.h>
155#include <bsp/vectors.h>
156#include <bsp/u-boot.h>
157#include <bsp/default-initial-extension.h>
158
159/*
160 * Network driver configuration
161 */
162struct rtems_bsdnet_ifconfig;
163extern int rtems_mpc5200_fec_driver_attach_detach (struct rtems_bsdnet_ifconfig *config, int attaching);
164#define RTEMS_BSP_NETWORK_DRIVER_NAME   "eth1"
165#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_mpc5200_fec_driver_attach_detach
166
167/* miscellaneous stuff assumed to exist */
168
169/*
170 * We need to decide how much memory will be non-cacheable. This
171 * will mainly be memory that will be used in DMA (network and serial
172 * buffers).
173 */
174/*
175#define NOCACHE_MEM_SIZE 512*1024
176*/
177
178/*
179 *  Device Driver Table Entries
180 */
181
182#ifdef HAS_NVRAM_93CXX
183#define NVRAM_DRIVER_TABLE_ENTRY \
184  { nvram_driver_initialize, nvram_driver_open, nvram_driver_close, \
185    nvram_driver_read, nvram_driver_write, NULL }
186#endif
187
188/*
189 * indicate, that BSP has IDE driver
190 */
191#define RTEMS_BSP_HAS_IDE_DRIVER
192
193/* functions */
194
195/* #define SHOW_MORE_INIT_SETTINGS 1 */
196
197/* ata modes */
198/* #undef ATA_USE_INT */
199#define ATA_USE_INT
200
201/* clock settings */
202#if defined(HAS_UBOOT)
203#define IPB_CLOCK (bsp_uboot_board_info.bi_ipbfreq)
204#define XLB_CLOCK (bsp_uboot_board_info.bi_busfreq)
205#define G2_CLOCK  (bsp_uboot_board_info.bi_intfreq)
206#elif defined(MPC5200_BOARD_BRS5L) || defined(MPC5200_BOARD_BRS6L)
207#define IPB_CLOCK 66000000   /* 66 MHz */
208#define XLB_CLOCK 132000000  /* 132 MHz */
209#define G2_CLOCK  396000000  /* 396 MHz */
210#else
211#define IPB_CLOCK 33000000   /* 33 MHz */
212#define XLB_CLOCK 66000000   /* 66 MHz */
213#define G2_CLOCK  231000000  /* 231 MHz */
214#endif
215
216#if defined(HAS_UBOOT)
217#define GEN5200_CONSOLE_BAUD (bsp_uboot_board_info.bi_baudrate)
218#else
219#define GEN5200_CONSOLE_BAUD 115200
220#endif
221
222/*
223 *  Convert decrement value to tenths of microsecnds (used by
224 *  shared timer driver).
225 *
226 *    + CPU has a XLB_CLOCK bus,
227 *    + There are 4 bus cycles per click
228 *    + We return value in 1/10 microsecond units.
229 *   Modified following equation to integer equation to remove
230 *   floating point math.
231 *   (int) ((float)(_value) / ((XLB_CLOCK/1000000 * 0.1) / 4.0))
232 */
233
234#define BSP_Convert_decrementer( _value ) \
235  (int) (((_value) * 4000) / (XLB_CLOCK/10000))
236
237/* slicetimer settings */
238#define USE_SLICETIMER_0     TRUE
239#define USE_SLICETIMER_1     FALSE
240
241void *bsp_idle_thread( uintptr_t ignored );
242#define BSP_IDLE_TASK_BODY bsp_idle_thread
243
244/* BSP specific IRQ Benchmarking support */
245void BSP_IRQ_Benchmarking_Reset(void);
246void BSP_IRQ_Benchmarking_Report(void);
247
248#if defined(HAS_UBOOT)
249  /* Routine to obtain U-Boot environment variables */
250  const char *bsp_uboot_getenv(
251    const char *name
252  );
253#endif
254
255void cpu_init(void);
256
257int mpc5200_eth_mii_read(
258  int phyAddr,
259  void *arg,
260  unsigned regAddr,
261  uint32_t *retVal
262);
263
264#ifdef __cplusplus
265}
266#endif
267
268#endif /* ASM */
269
270#endif /* GEN5200 */
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