source: rtems/c/src/lib/libbsp/powerpc/gen5200/include/bsp.h @ c9b005a9

4.104.114.84.95
Last change on this file since c9b005a9 was c9b005a9, checked in by Thomas Doerfler <Thomas.Doerfler@…>, on Jul 9, 2006 at 10:05:27 AM

applied patches for PR1117/1118/1119/1120

  • Property mode set to 100644
File size: 6.2 KB
Line 
1/*===============================================================*\
2| Project: RTEMS generic MPC5200 BSP                              |
3+-----------------------------------------------------------------+
4| Partially based on the code references which are named below.   |
5| Adaptions, modifications, enhancements and any recent parts of  |
6| the code are:                                                   |
7|                    Copyright (c) 2005                           |
8|                    Embedded Brains GmbH                         |
9|                    Obere Lagerstr. 30                           |
10|                    D-82178 Puchheim                             |
11|                    Germany                                      |
12|                    rtems@embedded-brains.de                     |
13+-----------------------------------------------------------------+
14| The license and distribution terms for this file may be         |
15| found in the file LICENSE in this distribution or at            |
16|                                                                 |
17| http://www.rtems.com/license/LICENSE.                           |
18|                                                                 |
19+-----------------------------------------------------------------+
20| this file contains board specific definitions                   |
21\*===============================================================*/
22
23#ifndef __GEN5200_BSP_h
24#define __GEN5200_BSP_h
25
26/*
27 * distinguish board characteristics
28 */
29/*
30 * for PM520 mdule on a ZE30 carrier
31 */
32#if defined(PM520_ZE30)
33#define PM520
34#define GPIOPCR_INITMASK 0x337F3F77
35#define GPIOPCR_INITVAL  0x01552114
36/* we have PSC1/4/5/6 */
37/* #define GEN5200_UART_AVAIL_MASK 0x39 */
38#define GEN5200_UART_AVAIL_MASK 0x39
39#endif
40/*
41 * for PM520 mdule on a CR825 carrier
42 */
43#if defined(PM520_CR825)
44#define PM520
45#define GPIOPCR_INITMASK 0x330F0F77
46#define GPIOPCR_INITVAL  0x01050444
47/* we have PSC1/2/3*/
48#define GEN5200_UART_AVAIL_MASK 0x07
49#endif
50
51#if defined(BRS5L)
52/*
53 * IMD Custom Board BRS5L
54 */
55#define GPIOPCR_INITMASK 0xb30F0F77
56#define GPIOPCR_INITVAL  0x91050444
57/* we have PSC1/2/3 */
58#define GEN5200_UART_AVAIL_MASK 0x07
59/*
60 * address range definitions
61 */
62/* ROM definitions (2 MB) */
63#define ROM_START       0xFFE00000
64#define ROM_SIZE        0x00200000
65#define ROM_END         (ROM_START+ROM_SIZE-1)
66#define BOOT_START      ROM_START
67#define BOOT_END        ROM_END
68
69/* SDRAM definitions (256 MB) */
70#define RAM_START       0x00000000
71#define RAM_SIZE        0x10000000
72#define RAM_END         (RAM_START+RAM_SIZE-1)
73
74/* DPRAM definitions (64 KB) */
75#define DPRAM_START  0xFF000000
76#define DPRAM_END    0xFF0003FF
77
78/* internal memory map definitions (64 KB) */
79#define MBAR         0xF0000000
80
81/* we need the low level initialization in start.S*/
82#define NEED_LOW_LEVEL_INIT
83
84#define HAS_NVRAM_93CXX
85#elif defined (PM520)
86
87/*
88 * MicroSys PM520 internal memory map definitions
89 */
90#define MBAR         0xF0000000
91#define HAS_UBOOT
92
93#else
94#error "board type not defined"
95#endif
96
97#ifndef ASM
98
99#ifdef __cplusplus
100extern "C" {
101#endif
102
103#include "bspopts.h"
104
105#include <rtems.h>
106#include <rtems/console.h>
107#include <rtems/clockdrv.h>
108#include <i2cdrv.h>
109
110#if defined(HAS_UBOOT)
111#define CONFIG_MPC5xxx
112#include <u-boot.h>
113extern bd_t *uboot_bdinfo_ptr;
114extern bd_t uboot_bdinfo_copy;
115#endif
116
117/*
118 * Network driver configuration
119 */
120struct rtems_bsdnet_ifconfig;
121extern int rtems_mpc5200_fec_driver_attach_detach (struct rtems_bsdnet_ifconfig *config, int attaching);
122#define RTEMS_BSP_NETWORK_DRIVER_NAME   "eth1"
123#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_mpc5200_fec_driver_attach_detach
124
125/* miscellaneous stuff assumed to exist */
126
127extern rtems_configuration_table BSP_Configuration;
128/*
129 * We need to decide how much memory will be non-cacheable. This
130 * will mainly be memory that will be used in DMA (network and serial
131 * buffers).
132 */
133/*
134#define NOCACHE_MEM_SIZE 512*1024
135*/
136
137/*
138 *  Define the time limits for RTEMS Test Suite test durations.
139 *  Long test and short test duration limits are provided.  These
140 *  values are in seconds and need to be converted to ticks for the
141 *  application.
142 *
143 */
144
145#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
146#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
147
148/*
149 *  Stuff for Time Test 27
150 */
151#define MUST_WAIT_FOR_INTERRUPT 0
152
153/*
154 *  Device Driver Table Entries
155 */
156
157/*
158 * NOTE: Use the standard Console driver entry
159 */
160
161/*
162 * NOTE: Use the standard Clock driver entry
163 */
164
165#ifdef HAS_NVRAM_93CXX
166#define NVRAM_DRIVER_TABLE_ENTRY \
167  { nvram_driver_initialize, nvram_driver_open, nvram_driver_close, \
168    nvram_driver_read, nvram_driver_write, NULL }
169#endif
170
171#define RTC_DRIVER_TABLE_ENTRY \
172    { rtc_initialize, NULL, NULL, NULL, NULL, NULL }
173extern rtems_device_driver rtc_initialize(
174    rtems_device_major_number major,
175    rtems_device_minor_number minor,
176    void *arg
177);
178
179/*
180 * indicate, that BSP has IDE driver
181 */
182#define RTEMS_BSP_HAS_IDE_DRIVER
183
184/*
185 * How many libio files we want
186 */
187#define BSP_LIBIO_MAX_FDS       20
188
189/* functions */
190
191void bsp_cleanup(void);
192
193/* console modes (only termios) */
194#ifdef  PRINTK_MINOR
195#undef  PRINTK_MINOR
196#endif
197#define PRINTK_MINOR PSC1_MINOR
198
199#define SINGLE_CHAR_MODE
200#define UARTS_USE_TERMIOS_INT   1
201
202/* ata modes */
203/* #undef ATA_USE_INT */
204#define ATA_USE_INT
205
206/* clock settings */
207#if defined(HAS_UBOOT)
208#define IPB_CLOCK (uboot_bdinfo_ptr->bi_ipbfreq)
209#define XLB_CLOCK (uboot_bdinfo_ptr->bi_busfreq)
210#define G2_CLOCK  (uboot_bdinfo_ptr->bi_intfreq)
211#else
212#define IPB_CLOCK 33000000   /* 33 MHz */
213#define XLB_CLOCK 66000000   /* 66 MHz */
214#define G2_CLOCK  231000000  /* 231 MHz */
215#endif
216
217/*
218 *  Convert decrement value to tenths of microsecnds (used by
219 *  shared timer driver).
220 *
221 *    + CPU has a XLB_CLOCK bus,
222 *    + There are 4 bus cycles per click
223 *    + We return value in 1/10 microsecond units.
224 *   Modified following equation to integer equation to remove
225 *   floating point math.
226 *   (int) ((float)(_value) / ((XLB_CLOCK/1000000 * 0.1) / 4.0))
227 */
228
229#define BSP_Convert_decrementer( _value ) \
230  (int) (((_value) * 4000) / (XLB_CLOCK/10000))
231
232/* slicetimer settings */
233#define USE_SLICETIMER_0     TRUE
234#define USE_SLICETIMER_1     FALSE
235
236#ifdef __cplusplus
237}
238#endif
239
240#endif /* ASM */
241
242#endif /* GEN5200 */
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