source: rtems/c/src/lib/libbsp/powerpc/gen5200/clock/clock.c @ 31fe820

4.104.114.84.95
Last change on this file since 31fe820 was 31fe820, checked in by Joel Sherrill <joel.sherrill@…>, on 06/21/07 at 22:45:05

2007-06-21 Joel Sherrill <joel.sherrill@…>

  • clock/clock.c: Add nanoseconds since last tick support.
  • Property mode set to 100644
File size: 14.2 KB
Line 
1/*===============================================================*\
2| Project: RTEMS generic MPC5200 BSP                              |
3+-----------------------------------------------------------------+
4| Partially based on the code references which are named below.   |
5| Adaptions, modifications, enhancements and any recent parts of  |
6| the code are:                                                   |
7|                    Copyright (c) 2005                           |
8|                    Embedded Brains GmbH                         |
9|                    Obere Lagerstr. 30                           |
10|                    D-82178 Puchheim                             |
11|                    Germany                                      |
12|                    rtems@embedded-brains.de                     |
13+-----------------------------------------------------------------+
14| The license and distribution terms for this file may be         |
15| found in the file LICENSE in this distribution or at            |
16|                                                                 |
17| http://www.rtems.com/license/LICENSE.                           |
18|                                                                 |
19+-----------------------------------------------------------------+
20| this file contains the clock driver functions                   |
21\*===============================================================*/
22/***********************************************************************/
23/*                                                                     */
24/*   Module:       clock.c                                             */
25/*   Date:         07/17/2003                                          */
26/*   Purpose:      RTEMS MPC5x00 clock driver                          */
27/*                                                                     */
28/*---------------------------------------------------------------------*/
29/*                                                                     */
30/*   Description:  Use one of the GPTs for time base generation        */
31/*                 instead of the decrementer. The routine initializes */
32/*                 the General Purpose Timer GPT6 on the MPC5x00.      */
33/*                 The tick frequency is specified by the bsp.         */
34/*                                                                     */
35/*---------------------------------------------------------------------*/
36/*                                                                     */
37/*   Code                                                              */
38/*   References:   Clock driver for PPC403                             */
39/*   Module:       clock.c                                             */
40/*   Project:      RTEMS 4.6.0pre1 / PPC403 BSP                        */
41/*   Version       1.16                                                */
42/*   Date:         2002/11/01                                          */
43/*   Author(s) / Copyright(s):                                         */
44/*                                                                     */
45/*   Author: Jay Monkman (jmonkman@frasca.com)                         */
46/*   Copyright (C) 1998 by Frasca International, Inc.                  */
47/*                                                                     */
48/*   Derived from c/src/lib/libcpu/ppc/ppc403/clock/clock.c:           */
49/*                                                                     */
50/*   Author: Andrew Bray <andy@i-cubed.co.uk>                          */
51/*                                                                     */
52/*   COPYRIGHT (c) 1995 by i-cubed ltd.                                */
53/*                                                                     */
54/*   To anyone who acknowledges that this file is provided "AS IS"     */
55/*   without any express or implied warranty:                          */
56/*      permission to use, copy, modify, and distribute this file      */
57/*      for any purpose is hereby granted without fee, provided that   */
58/*      the above copyright notice and this notice appears in all      */
59/*      copies, and that the name of i-cubed limited not be used in    */
60/*      advertising or publicity pertaining to distribution of the     */
61/*      software without specific, written prior permission.           */
62/*      i-cubed limited makes no representations about the suitability */
63/*      of this software for any purpose.                              */
64/*                                                                     */
65/*   Derived from c/src/lib/libcpu/hppa1.1/clock/clock.c:              */
66/*                                                                     */
67/*   Modifications for deriving timer clock from cpu system clock by   */
68/*              Thomas Doerfler <td@imd.m.isar.de>                     */
69/*   for these modifications:                                          */
70/*   COPYRIGHT (c) 1997 by IMD, Puchheim, Germany.                     */
71/*                                                                     */
72/*   COPYRIGHT (c) 1989-1999.                                          */
73/*   On-Line Applications Research Corporation (OAR).                  */
74/*                                                                     */
75/*   The license and distribution terms for this file may be           */
76/*   found in the file LICENSE in this distribution or at              */
77/*   http://www.rtems.com/license/LICENSE.                        */
78/*                                                                     */
79/*   Modifications for PPC405GP by Dennis Ehlin                        */
80/*---------------------------------------------------------------------*/
81/*                                                                     */
82/*   Partially based on the code references which are named above.     */
83/*   Adaptions, modifications, enhancements and any recent parts of    */
84/*   the code are under the right of                                   */
85/*                                                                     */
86/*         IPR Engineering, Dachauer Straße 38, D-80335 MÃŒnchen        */
87/*                        Copyright(C) 2003                            */
88/*                                                                     */
89/*---------------------------------------------------------------------*/
90/*                                                                     */
91/*   IPR Engineering makes no representation or warranties with        */
92/*   respect to the performance of this computer program, and          */
93/*   specifically disclaims any responsibility for any damages,        */
94/*   special or consequential, connected with the use of this program. */
95/*                                                                     */
96/*---------------------------------------------------------------------*/
97/*                                                                     */
98/*   Version history:  1.0                                             */
99/*                                                                     */
100/***********************************************************************/
101
102#include <bsp.h>
103#include <rtems/bspIo.h>
104#include "../irq/irq.h"
105
106#include <rtems.h>
107#include <rtems/clockdrv.h>
108#include <rtems/libio.h>
109
110#include <stdlib.h>                     /* for atexit() */
111#include "../include/mpc5200.h"
112
113volatile uint32_t Clock_driver_ticks;
114
115void Clock_exit(void);
116
117uint32_t counter_value;
118
119volatile int ClockInitialized = 0;
120
121
122/*
123 * These are set by clock driver during its init
124 */
125rtems_device_major_number rtems_clock_major = ~0;
126rtems_device_minor_number rtems_clock_minor;
127
128
129uint64_t Clock_last_TBR;
130
131/*
132 *  ISR Handlers
133 */
134void mpc5200_gpt_clock_isr(rtems_irq_hdl_param handle)
135  {
136  uint32_t status;
137  struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)handle;
138
139  status = gpt->status;
140
141
142  if(ClockInitialized  && (status & GPT_STATUS_TEXP))
143    {
144
145    gpt->status |= GPT_STATUS_TEXP;
146    Clock_last_TBR = PPC_Get_timebase_register();
147
148
149    Clock_driver_ticks++;
150    rtems_clock_tick();
151
152    }
153
154  }
155
156
157/*
158 *  Initialize MPC5x00 GPT
159 */
160void mpc5200_init_gpt(uint32_t gpt_no)
161  {
162  struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
163
164  gpt->status = GPT_STATUS_RESET;
165  gpt->emsel  = GPT_EMSEL_CE | GPT_EMSEL_ST_CONT | GPT_EMSEL_INTEN | GPT_EMSEL_GPIO_OUT_HIGH | GPT_EMSEL_TIMER_MS_GPIO;
166
167  }
168
169
170/*
171 *  Set MPC5x00 GPT counter
172 */
173void mpc5200_set_gpt_count(uint32_t counter_value, uint32_t gpt_no)
174  {
175  uint32_t prescaler_value = 1;
176  uint32_t counter = counter_value;
177  struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
178
179  /* Calculate counter/prescaler value, e.g. IPB_Clock=33MHz -> Int. every 0,3 nsecs. - 130 secs.*/
180  while((counter >= (1 << 16)) && (prescaler_value < (1 << 16)))
181    {
182      prescaler_value++;
183      counter = counter_value / prescaler_value;
184    }
185
186  counter = (uint16_t)counter;
187
188  gpt->count_in = (prescaler_value << 16) + counter;
189
190  }
191
192uint32_t bsp_clock_nanoseconds_since_last_tick(void)
193{
194  uint64_t new_tbr;
195  uint64_t bus_cycles;
196  uint32_t nsecs;
197
198  new_tbr = PPC_Get_timebase_register();
199  bus_cycles = (new_tbr - Clock_last_TBR) * 4;
200  nsecs =  (uint32_t) (bus_cycles / (XLB_CLOCK / 1000000)) * 1000;
201
202  return nsecs;
203}
204
205/*
206 *  Enable MPC5x00 GPT interrupt
207 */
208void mpc5200_enable_gpt_int(uint32_t gpt_no)
209  {
210  struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
211
212  gpt->emsel |= GPT_EMSEL_CE | GPT_EMSEL_INTEN;
213  Clock_last_TBR = PPC_Get_timebase_register();
214
215  }
216
217
218/*
219 *  Disable MPC5x00 GPT interrupt
220 */
221void mpc5200_disable_gpt_int(uint32_t gpt_no)
222  {
223  struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
224
225  gpt->emsel &= ~(GPT_EMSEL_CE | GPT_EMSEL_INTEN);
226
227  }
228
229
230/*
231 *  Check MPC5x00 GPT status
232 */
233uint32_t mpc5200_check_gpt_status(uint32_t gpt_no)
234  {
235  struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
236
237  return ((gpt->emsel) & (GPT_EMSEL_CE | GPT_EMSEL_INTEN));
238
239  }
240
241
242void clockOn(const rtems_irq_connect_data* irq)
243  {
244  uint32_t gpt_no;
245
246  gpt_no = BSP_SIU_IRQ_TMR0 - (irq->name);
247
248  counter_value = rtems_configuration_get_microseconds_per_tick() *
249                      rtems_cpu_configuration_get_clicks_per_usec();
250
251  mpc5200_set_gpt_count(counter_value, (uint32_t)gpt_no);
252  mpc5200_enable_gpt_int((uint32_t)gpt_no);
253
254  Clock_driver_ticks = 0;
255  ClockInitialized = 1;
256
257  }
258
259
260void clockOff(const rtems_irq_connect_data* irq)
261  {
262  uint32_t gpt_no;
263
264  gpt_no = BSP_SIU_IRQ_TMR0 - (irq->name);
265
266  mpc5200_disable_gpt_int((uint32_t)gpt_no);
267
268  ClockInitialized = 0;
269
270  }
271
272
273int clockIsOn(const rtems_irq_connect_data* irq)
274  {
275  uint32_t gpt_no;
276
277  gpt_no = BSP_SIU_IRQ_TMR0 - (irq->name);
278
279  if(mpc5200_check_gpt_status(gpt_no) && ClockInitialized)
280    return ClockInitialized;
281  else
282    return 0;
283  }
284
285
286int BSP_get_clock_irq_level()
287  {
288
289  /*
290   * Caution : if you change this, you must change the
291   * definition of BSP_PERIODIC_TIMER accordingly
292    */
293  return BSP_PERIODIC_TIMER;
294  }
295
296
297int BSP_disconnect_clock_handler (void)
298  {
299  rtems_irq_connect_data clockIrqData;
300  clockIrqData.name   = BSP_PERIODIC_TIMER;
301
302
303  if (!BSP_get_current_rtems_irq_handler(&clockIrqData))
304    {
305
306    printk("Unable to stop system clock\n");
307    rtems_fatal_error_occurred(1);
308
309    }
310
311  return BSP_remove_rtems_irq_handler (&clockIrqData);
312
313  }
314
315
316int BSP_connect_clock_handler (uint32_t gpt_no)
317  {
318
319  rtems_irq_hdl hdl = 0;
320  rtems_irq_connect_data clockIrqData;
321
322
323  /*
324   * Reinit structure
325   */
326
327  clockIrqData.name   = BSP_PERIODIC_TIMER;
328
329  if(!BSP_get_current_rtems_irq_handler(&clockIrqData))
330    {
331
332    printk("Unable to get system clock handler\n");
333    rtems_fatal_error_occurred(1);
334
335    }
336
337  if(!BSP_remove_rtems_irq_handler (&clockIrqData))
338    {
339
340    printk("Unable to remove current system clock handler\n");
341    rtems_fatal_error_occurred(1);
342
343    }
344
345  if ((gpt_no >= GPT0) ||
346      (gpt_no <= GPT7)) {
347    hdl = (rtems_irq_hdl_param )&mpc5200.gpt[gpt_no];
348  }
349  else {
350    printk("Unable to set system clock handler\n");
351    rtems_fatal_error_occurred(1);
352  }
353
354  clockIrqData.hdl    = mpc5200_gpt_clock_isr;
355  clockIrqData.handle = (rtems_irq_hdl_param) hdl;
356  clockIrqData.on     = clockOn;
357  clockIrqData.off    = clockOff;
358  clockIrqData.isOn   = clockIsOn;
359
360  return BSP_install_rtems_irq_handler (&clockIrqData);
361
362  }
363
364
365/*
366 * Called via atexit()
367 * Remove the clock interrupt handler by setting handler to NULL
368 */
369void Clock_exit(void)
370  {
371
372  (void) BSP_disconnect_clock_handler ();
373
374  }
375
376
377void Install_clock(rtems_device_minor_number gpt_no)
378  {
379
380  Clock_driver_ticks = 0;
381
382  counter_value = rtems_configuration_get_microseconds_per_tick() *
383                      rtems_cpu_configuration_get_clicks_per_usec();
384
385  mpc5200_init_gpt((uint32_t)gpt_no);
386  mpc5200_set_gpt_count(counter_value, (uint32_t)gpt_no);
387
388
389  BSP_connect_clock_handler(gpt_no);
390
391  ClockInitialized = 1;
392
393    rtems_clock_set_nanoseconds_extension(
394      bsp_clock_nanoseconds_since_last_tick
395    );
396  atexit(Clock_exit);
397
398  }
399
400void ReInstall_clock(uint32_t gpt_no)
401  {
402
403  BSP_connect_clock_handler(gpt_no);
404
405  }
406
407
408rtems_device_driver Clock_initialize
409  (
410  rtems_device_major_number major,
411  rtems_device_minor_number minor,
412  void *pargp
413  )
414  {
415  /* force minor according to definitions in irq.h */
416  minor = BSP_PERIODIC_TIMER - BSP_SIU_IRQ_TMR0;
417
418  Install_clock((uint32_t)minor);
419
420  /*
421   * make major/minor avail to others such as shared memory driver
422   */
423  rtems_clock_major = major;
424  rtems_clock_minor = minor;
425
426  return RTEMS_SUCCESSFUL;
427
428  }
429
430rtems_device_driver Clock_control
431  (
432  rtems_device_major_number major,
433  rtems_device_minor_number minor,
434  void *pargp
435  )  {
436
437  rtems_libio_ioctl_args_t *args = pargp;
438
439  /* forec minor according to definitions in irq.h */
440  minor = BSP_PERIODIC_TIMER - BSP_SIU_IRQ_TMR0;
441
442  if(args != 0) {
443    /*
444     * This is hokey, but until we get a defined interface
445     * to do this, it will just be this simple...
446     */
447    if(args->command == rtems_build_name('I', 'S', 'R', ' ')) {
448      if ((minor >= GPT0) ||
449          (minor <= GPT7)) {
450        mpc5200_gpt_clock_isr((rtems_irq_hdl_param )&mpc5200.gpt[minor]);
451      }
452      else {
453        printk("Unable to call system clock handler\n");
454        rtems_fatal_error_occurred(1);
455      }
456    }
457    else if(args->command == rtems_build_name('N', 'E', 'W', ' ')) {
458      ReInstall_clock((uint32_t)minor);
459    }
460  }
461  return RTEMS_SUCCESSFUL;
462
463}
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