[ca680bc5] | 1 | /*===============================================================*\ |
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| 2 | | Project: RTEMS generic MPC5200 BSP | |
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| 3 | +-----------------------------------------------------------------+ |
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| 4 | | Partially based on the code references which are named below. | |
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| 5 | | Adaptions, modifications, enhancements and any recent parts of | |
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| 6 | | the code are: | |
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| 7 | | Copyright (c) 2005 | |
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| 8 | | Embedded Brains GmbH | |
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| 9 | | Obere Lagerstr. 30 | |
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| 10 | | D-82178 Puchheim | |
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| 11 | | Germany | |
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| 12 | | rtems@embedded-brains.de | |
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| 13 | +-----------------------------------------------------------------+ |
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| 14 | | The license and distribution terms for this file may be | |
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| 15 | | found in the file LICENSE in this distribution or at | |
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| 16 | | | |
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| 17 | | http://www.rtems.com/license/LICENSE. | |
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| 18 | | | |
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| 19 | +-----------------------------------------------------------------+ |
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| 20 | | this file contains the clock driver functions | |
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| 21 | \*===============================================================*/ |
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| 22 | /***********************************************************************/ |
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| 23 | /* */ |
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| 24 | /* Module: clock.c */ |
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| 25 | /* Date: 07/17/2003 */ |
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| 26 | /* Purpose: RTEMS MPC5x00 clock driver */ |
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| 27 | /* */ |
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| 28 | /*---------------------------------------------------------------------*/ |
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| 29 | /* */ |
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| 30 | /* Description: Use one of the GPTs for time base generation */ |
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| 31 | /* instead of the decrementer. The routine initializes */ |
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| 32 | /* the General Purpose Timer GPT6 on the MPC5x00. */ |
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| 33 | /* The tick frequency is specified by the bsp. */ |
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| 34 | /* */ |
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| 35 | /*---------------------------------------------------------------------*/ |
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| 36 | /* */ |
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| 37 | /* Code */ |
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| 38 | /* References: Clock driver for PPC403 */ |
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| 39 | /* Module: clock.c */ |
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| 40 | /* Project: RTEMS 4.6.0pre1 / PPC403 BSP */ |
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| 41 | /* Version 1.16 */ |
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| 42 | /* Date: 2002/11/01 */ |
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| 43 | /* Author(s) / Copyright(s): */ |
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| 44 | /* */ |
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| 45 | /* Author: Jay Monkman (jmonkman@frasca.com) */ |
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| 46 | /* Copyright (C) 1998 by Frasca International, Inc. */ |
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| 47 | /* */ |
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| 48 | /* Derived from c/src/lib/libcpu/ppc/ppc403/clock/clock.c: */ |
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| 49 | /* */ |
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| 50 | /* Author: Andrew Bray <andy@i-cubed.co.uk> */ |
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| 51 | /* */ |
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| 52 | /* COPYRIGHT (c) 1995 by i-cubed ltd. */ |
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| 53 | /* */ |
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| 54 | /* To anyone who acknowledges that this file is provided "AS IS" */ |
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| 55 | /* without any express or implied warranty: */ |
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| 56 | /* permission to use, copy, modify, and distribute this file */ |
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| 57 | /* for any purpose is hereby granted without fee, provided that */ |
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| 58 | /* the above copyright notice and this notice appears in all */ |
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| 59 | /* copies, and that the name of i-cubed limited not be used in */ |
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| 60 | /* advertising or publicity pertaining to distribution of the */ |
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| 61 | /* software without specific, written prior permission. */ |
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| 62 | /* i-cubed limited makes no representations about the suitability */ |
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| 63 | /* of this software for any purpose. */ |
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| 64 | /* */ |
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| 65 | /* Derived from c/src/lib/libcpu/hppa1.1/clock/clock.c: */ |
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| 66 | /* */ |
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| 67 | /* Modifications for deriving timer clock from cpu system clock by */ |
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| 68 | /* Thomas Doerfler <td@imd.m.isar.de> */ |
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| 69 | /* for these modifications: */ |
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| 70 | /* COPYRIGHT (c) 1997 by IMD, Puchheim, Germany. */ |
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| 71 | /* */ |
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| 72 | /* COPYRIGHT (c) 1989-1999. */ |
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| 73 | /* On-Line Applications Research Corporation (OAR). */ |
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| 74 | /* */ |
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| 75 | /* The license and distribution terms for this file may be */ |
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| 76 | /* found in the file LICENSE in this distribution or at */ |
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[c90d07c] | 77 | /* http://www.rtems.com/license/LICENSE. */ |
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[ca680bc5] | 78 | /* */ |
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| 79 | /* Modifications for PPC405GP by Dennis Ehlin */ |
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| 80 | /*---------------------------------------------------------------------*/ |
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| 81 | /* */ |
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| 82 | /* Partially based on the code references which are named above. */ |
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| 83 | /* Adaptions, modifications, enhancements and any recent parts of */ |
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| 84 | /* the code are under the right of */ |
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| 85 | /* */ |
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[1af911b8] | 86 | /* IPR Engineering, Dachauer StraÃe 38, D-80335 MÃŒnchen */ |
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[ca680bc5] | 87 | /* Copyright(C) 2003 */ |
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| 88 | /* */ |
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| 89 | /*---------------------------------------------------------------------*/ |
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| 90 | /* */ |
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| 91 | /* IPR Engineering makes no representation or warranties with */ |
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| 92 | /* respect to the performance of this computer program, and */ |
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| 93 | /* specifically disclaims any responsibility for any damages, */ |
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| 94 | /* special or consequential, connected with the use of this program. */ |
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| 95 | /* */ |
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| 96 | /*---------------------------------------------------------------------*/ |
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| 97 | /* */ |
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| 98 | /* Version history: 1.0 */ |
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| 99 | /* */ |
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| 100 | /***********************************************************************/ |
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| 101 | |
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[da261595] | 102 | #include <bsp.h> |
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[ca680bc5] | 103 | #include <rtems/bspIo.h> |
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| 104 | #include "../irq/irq.h" |
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| 105 | |
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| 106 | #include <rtems.h> |
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| 107 | #include <rtems/clockdrv.h> |
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| 108 | #include <rtems/libio.h> |
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| 109 | |
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| 110 | #include <stdlib.h> /* for atexit() */ |
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| 111 | #include "../include/mpc5200.h" |
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| 112 | |
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| 113 | volatile uint32_t Clock_driver_ticks; |
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| 114 | |
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| 115 | void Clock_exit(void); |
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| 116 | |
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| 117 | uint32_t counter_value; |
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| 118 | |
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| 119 | volatile int ClockInitialized = 0; |
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| 120 | |
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| 121 | |
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| 122 | /* |
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| 123 | * These are set by clock driver during its init |
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| 124 | */ |
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| 125 | rtems_device_major_number rtems_clock_major = ~0; |
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| 126 | rtems_device_minor_number rtems_clock_minor; |
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| 127 | |
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| 128 | |
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| 129 | /* |
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| 130 | * ISR Handlers |
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| 131 | */ |
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| 132 | void mpc5200_gpt_clock_isr(rtems_irq_hdl_param handle) |
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| 133 | { |
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| 134 | uint32_t status; |
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| 135 | struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)handle; |
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| 136 | |
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| 137 | status = gpt->status; |
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| 138 | |
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| 139 | |
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| 140 | if(ClockInitialized && (status & GPT_STATUS_TEXP)) |
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| 141 | { |
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| 142 | |
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| 143 | gpt->status |= GPT_STATUS_TEXP; |
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| 144 | |
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| 145 | |
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| 146 | Clock_driver_ticks++; |
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| 147 | rtems_clock_tick(); |
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| 148 | |
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| 149 | } |
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| 150 | |
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| 151 | } |
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| 152 | |
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| 153 | |
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| 154 | /* |
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| 155 | * Initialize MPC5x00 GPT |
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| 156 | */ |
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| 157 | void mpc5200_init_gpt(uint32_t gpt_no) |
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| 158 | { |
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| 159 | struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]); |
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| 160 | |
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| 161 | gpt->status = GPT_STATUS_RESET; |
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| 162 | gpt->emsel = GPT_EMSEL_CE | GPT_EMSEL_ST_CONT | GPT_EMSEL_INTEN | GPT_EMSEL_GPIO_OUT_HIGH | GPT_EMSEL_TIMER_MS_GPIO; |
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| 163 | |
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| 164 | } |
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| 165 | |
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| 166 | |
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| 167 | /* |
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| 168 | * Set MPC5x00 GPT counter |
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| 169 | */ |
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| 170 | void mpc5200_set_gpt_count(uint32_t counter_value, uint32_t gpt_no) |
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| 171 | { |
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| 172 | uint32_t prescaler_value = 1; |
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[7da3405] | 173 | uint32_t counter = counter_value; |
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[ca680bc5] | 174 | struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]); |
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| 175 | |
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| 176 | /* Calculate counter/prescaler value, e.g. IPB_Clock=33MHz -> Int. every 0,3 nsecs. - 130 secs.*/ |
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[7da3405] | 177 | while((counter >= (1 << 16)) && (prescaler_value < (1 << 16))) |
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[ca680bc5] | 178 | { |
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[7da3405] | 179 | prescaler_value++; |
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| 180 | counter = counter_value / prescaler_value; |
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[ca680bc5] | 181 | } |
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| 182 | |
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[7da3405] | 183 | counter = (uint16_t)counter; |
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[ca680bc5] | 184 | |
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[7da3405] | 185 | gpt->count_in = (prescaler_value << 16) + counter; |
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[ca680bc5] | 186 | |
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| 187 | } |
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| 188 | |
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| 189 | |
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| 190 | /* |
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| 191 | * Enable MPC5x00 GPT interrupt |
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| 192 | */ |
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| 193 | void mpc5200_enable_gpt_int(uint32_t gpt_no) |
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| 194 | { |
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| 195 | struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]); |
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| 196 | |
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| 197 | gpt->emsel |= GPT_EMSEL_CE | GPT_EMSEL_INTEN; |
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| 198 | |
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| 199 | } |
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| 200 | |
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| 201 | |
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| 202 | /* |
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| 203 | * Disable MPC5x00 GPT interrupt |
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| 204 | */ |
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| 205 | void mpc5200_disable_gpt_int(uint32_t gpt_no) |
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| 206 | { |
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| 207 | struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]); |
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| 208 | |
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| 209 | gpt->emsel &= ~(GPT_EMSEL_CE | GPT_EMSEL_INTEN); |
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| 210 | |
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| 211 | } |
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| 212 | |
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| 213 | |
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| 214 | /* |
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| 215 | * Check MPC5x00 GPT status |
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| 216 | */ |
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| 217 | uint32_t mpc5200_check_gpt_status(uint32_t gpt_no) |
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| 218 | { |
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| 219 | struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]); |
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| 220 | |
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| 221 | return ((gpt->emsel) & (GPT_EMSEL_CE | GPT_EMSEL_INTEN)); |
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| 222 | |
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| 223 | } |
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| 224 | |
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| 225 | |
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| 226 | void clockOn(const rtems_irq_connect_data* irq) |
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| 227 | { |
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| 228 | uint32_t gpt_no; |
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| 229 | |
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| 230 | |
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| 231 | gpt_no = BSP_SIU_IRQ_TMR0 - (irq->name); |
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| 232 | |
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| 233 | counter_value = rtems_configuration_get_microseconds_per_tick() * |
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| 234 | rtems_cpu_configuration_get_clicks_per_usec(); |
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| 235 | |
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| 236 | mpc5200_set_gpt_count(counter_value, (uint32_t)gpt_no); |
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| 237 | mpc5200_enable_gpt_int((uint32_t)gpt_no); |
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| 238 | |
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| 239 | Clock_driver_ticks = 0; |
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| 240 | ClockInitialized = 1; |
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| 241 | |
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| 242 | } |
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| 243 | |
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| 244 | |
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| 245 | void clockOff(const rtems_irq_connect_data* irq) |
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| 246 | { |
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| 247 | uint32_t gpt_no; |
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| 248 | |
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| 249 | gpt_no = BSP_SIU_IRQ_TMR0 - (irq->name); |
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| 250 | |
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| 251 | mpc5200_disable_gpt_int((uint32_t)gpt_no); |
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| 252 | |
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| 253 | ClockInitialized = 0; |
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| 254 | |
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| 255 | } |
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| 256 | |
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| 257 | |
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| 258 | int clockIsOn(const rtems_irq_connect_data* irq) |
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| 259 | { |
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| 260 | uint32_t gpt_no; |
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| 261 | |
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| 262 | gpt_no = BSP_SIU_IRQ_TMR0 - (irq->name); |
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| 263 | |
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| 264 | if(mpc5200_check_gpt_status(gpt_no) && ClockInitialized) |
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| 265 | return ClockInitialized; |
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| 266 | else |
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| 267 | return 0; |
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| 268 | } |
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| 269 | |
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| 270 | |
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| 271 | int BSP_get_clock_irq_level() |
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| 272 | { |
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| 273 | |
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| 274 | /* |
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| 275 | * Caution : if you change this, you must change the |
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| 276 | * definition of BSP_PERIODIC_TIMER accordingly |
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| 277 | */ |
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| 278 | return BSP_PERIODIC_TIMER; |
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| 279 | } |
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| 280 | |
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| 281 | |
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| 282 | int BSP_disconnect_clock_handler (void) |
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| 283 | { |
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| 284 | rtems_irq_connect_data clockIrqData; |
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| 285 | clockIrqData.name = BSP_PERIODIC_TIMER; |
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| 286 | |
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| 287 | |
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| 288 | if (!BSP_get_current_rtems_irq_handler(&clockIrqData)) |
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| 289 | { |
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| 290 | |
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| 291 | printk("Unable to stop system clock\n"); |
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| 292 | rtems_fatal_error_occurred(1); |
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| 293 | |
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| 294 | } |
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| 295 | |
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| 296 | return BSP_remove_rtems_irq_handler (&clockIrqData); |
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| 297 | |
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| 298 | } |
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| 299 | |
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| 300 | |
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| 301 | int BSP_connect_clock_handler (uint32_t gpt_no) |
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| 302 | { |
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| 303 | |
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| 304 | rtems_irq_hdl hdl = 0; |
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| 305 | rtems_irq_connect_data clockIrqData; |
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| 306 | |
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| 307 | |
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| 308 | /* |
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| 309 | * Reinit structure |
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| 310 | */ |
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| 311 | |
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| 312 | clockIrqData.name = BSP_PERIODIC_TIMER; |
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| 313 | |
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| 314 | if(!BSP_get_current_rtems_irq_handler(&clockIrqData)) |
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| 315 | { |
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| 316 | |
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| 317 | printk("Unable to get system clock handler\n"); |
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| 318 | rtems_fatal_error_occurred(1); |
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| 319 | |
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| 320 | } |
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| 321 | |
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| 322 | if(!BSP_remove_rtems_irq_handler (&clockIrqData)) |
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| 323 | { |
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| 324 | |
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| 325 | printk("Unable to remove current system clock handler\n"); |
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| 326 | rtems_fatal_error_occurred(1); |
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| 327 | |
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| 328 | } |
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| 329 | |
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| 330 | if ((gpt_no >= GPT0) || |
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| 331 | (gpt_no <= GPT7)) { |
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| 332 | hdl = (rtems_irq_hdl_param )&mpc5200.gpt[gpt_no]; |
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| 333 | } |
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| 334 | else { |
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| 335 | printk("Unable to set system clock handler\n"); |
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| 336 | rtems_fatal_error_occurred(1); |
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| 337 | } |
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| 338 | |
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| 339 | clockIrqData.hdl = mpc5200_gpt_clock_isr; |
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| 340 | clockIrqData.handle = (rtems_irq_hdl_param) hdl; |
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| 341 | clockIrqData.on = clockOn; |
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| 342 | clockIrqData.off = clockOff; |
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| 343 | clockIrqData.isOn = clockIsOn; |
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| 344 | |
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| 345 | return BSP_install_rtems_irq_handler (&clockIrqData); |
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| 346 | |
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| 347 | } |
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| 348 | |
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| 349 | |
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| 350 | /* |
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| 351 | * Called via atexit() |
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| 352 | * Remove the clock interrupt handler by setting handler to NULL |
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| 353 | */ |
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| 354 | void Clock_exit(void) |
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| 355 | { |
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| 356 | |
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| 357 | (void) BSP_disconnect_clock_handler (); |
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| 358 | |
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| 359 | } |
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| 360 | |
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| 361 | |
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| 362 | void Install_clock(rtems_device_minor_number gpt_no) |
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| 363 | { |
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| 364 | |
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| 365 | Clock_driver_ticks = 0; |
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| 366 | |
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| 367 | counter_value = rtems_configuration_get_microseconds_per_tick() * |
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| 368 | rtems_cpu_configuration_get_clicks_per_usec(); |
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| 369 | |
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| 370 | mpc5200_init_gpt((uint32_t)gpt_no); |
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| 371 | mpc5200_set_gpt_count(counter_value, (uint32_t)gpt_no); |
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| 372 | |
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| 373 | |
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| 374 | BSP_connect_clock_handler(gpt_no); |
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| 375 | |
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| 376 | ClockInitialized = 1; |
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| 377 | |
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| 378 | atexit(Clock_exit); |
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| 379 | |
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| 380 | } |
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| 381 | |
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| 382 | void ReInstall_clock(uint32_t gpt_no) |
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| 383 | { |
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| 384 | |
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| 385 | BSP_connect_clock_handler(gpt_no); |
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| 386 | |
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| 387 | } |
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| 388 | |
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| 389 | |
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| 390 | rtems_device_driver Clock_initialize |
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| 391 | ( |
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| 392 | rtems_device_major_number major, |
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| 393 | rtems_device_minor_number minor, |
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| 394 | void *pargp |
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| 395 | ) |
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| 396 | { |
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| 397 | /* force minor according to definitions in irq.h */ |
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| 398 | minor = BSP_PERIODIC_TIMER - BSP_SIU_IRQ_TMR0; |
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| 399 | |
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| 400 | Install_clock((uint32_t)minor); |
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| 401 | |
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| 402 | /* |
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| 403 | * make major/minor avail to others such as shared memory driver |
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| 404 | */ |
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| 405 | rtems_clock_major = major; |
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| 406 | rtems_clock_minor = minor; |
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| 407 | |
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| 408 | return RTEMS_SUCCESSFUL; |
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| 409 | |
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| 410 | } |
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| 411 | |
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| 412 | rtems_device_driver Clock_control |
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| 413 | ( |
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| 414 | rtems_device_major_number major, |
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| 415 | rtems_device_minor_number minor, |
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| 416 | void *pargp |
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| 417 | ) { |
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| 418 | |
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| 419 | rtems_libio_ioctl_args_t *args = pargp; |
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| 420 | |
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| 421 | /* forec minor according to definitions in irq.h */ |
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| 422 | minor = BSP_PERIODIC_TIMER - BSP_SIU_IRQ_TMR0; |
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| 423 | |
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| 424 | if(args != 0) { |
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| 425 | /* |
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| 426 | * This is hokey, but until we get a defined interface |
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| 427 | * to do this, it will just be this simple... |
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| 428 | */ |
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| 429 | if(args->command == rtems_build_name('I', 'S', 'R', ' ')) { |
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| 430 | if ((minor >= GPT0) || |
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| 431 | (minor <= GPT7)) { |
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| 432 | mpc5200_gpt_clock_isr((rtems_irq_hdl_param )&mpc5200.gpt[minor]); |
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| 433 | } |
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| 434 | else { |
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| 435 | printk("Unable to call system clock handler\n"); |
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| 436 | rtems_fatal_error_occurred(1); |
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| 437 | } |
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| 438 | } |
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| 439 | else if(args->command == rtems_build_name('N', 'E', 'W', ' ')) { |
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| 440 | ReInstall_clock((uint32_t)minor); |
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| 441 | } |
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| 442 | } |
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| 443 | return RTEMS_SUCCESSFUL; |
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| 444 | |
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| 445 | } |
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