source: rtems/c/src/lib/libbsp/powerpc/gen5200/bestcomm/include/mgt5200/mgt5200.h @ efdfd48

4.104.115
Last change on this file since efdfd48 was efdfd48, checked in by Ralf Corsepius <ralf.corsepius@…>, on 11/29/09 at 15:27:07

Whitespace removal.

  • Property mode set to 100644
File size: 2.3 KB
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1#ifndef __MGT5200_MGT5200_H
2#define __MGT5200_MGT5200_H
3
4/******************************************************************************
5*
6* Copyright (c) 2004 Freescale Semiconductor, Inc.
7*
8* Permission is hereby granted, free of charge, to any person obtaining a
9* copy of this software and associated documentation files (the "Software"),
10* to deal in the Software without restriction, including without limitation
11* the rights to use, copy, modify, merge, publish, distribute, sublicense,
12* and/or sell copies of the Software, and to permit persons to whom the
13* Software is furnished to do so, subject to the following conditions:
14*
15* The above copyright notice and this permission notice shall be included
16* in all copies or substantial portions of the Software.
17*
18* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
22* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
23* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
24* OTHER DEALINGS IN THE SOFTWARE.
25*
26******************************************************************************/
27
28#define MBAR_CS         0x0000
29#define MBAR_SDRAM      0x0100
30#define MBAR_CDM        0x0200
31#define MBAR_LPC        0x0300
32#define MBAR_SCTMR      0x0400
33#define MBAR_INT_CTRL   0x0500
34#define MBAR_GPTIMER    0x0600
35#define MBAR_SLTIMER    0x0700
36#define MBAR_RTCLOCK    0x0800
37#define MBAR_MSCAN      0x0900
38#define MBAR_GPIO_STD   0x0B00
39#define MBAR_GPIO_WKUP  0x0C00
40#define MBAR_XCPCI      0x0D00
41#define MBAR_SPI        0x0F00
42#define MBAR_USB        0x1000
43#define MBAR_SDMA       0x1200
44#define MBAR_BDLC       0x1300
45#define MBAR_IR         0x1400
46#define MBAR_XLB_ARB    0x1F00
47#define MBAR_PSC1       0x2000
48#define MBAR_PSC2       0x2200
49#define MBAR_PSC3       0x2400
50#define MBAR_PSC4       0x2600
51#define MBAR_PSC5       0x2800
52#define MBAR_PSC6       0x2C00
53#define MBAR_IRDA       0x2C00
54#define MBAR_ETHERNET   0x3000
55#define MBAR_SCPCI      0x3800
56#define MBAR_ATA        0x3A00
57#define MBAR_SCLPC      0x3C00
58#define MBAR_I2C        0x3D00
59#define MBAR_SRAM       0x8000
60
61#endif /* __MGT5200_MGT5200_H */
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