source: rtems/c/src/lib/libbsp/powerpc/eth_comm/startup/alloc860.c @ ee733965

4.104.114.84.95
Last change on this file since ee733965 was ee733965, checked in by Joel Sherrill <joel.sherrill@…>, on 02/17/99 at 20:24:53

Jay Monkman <jmonkman@…> submitted the eth_comm BSP for a PPC860
based board.

  • Property mode set to 100644
File size: 3.0 KB
Line 
1/*
2 * MPC860 buffer descriptor allocation routines
3 *
4 * Modified from original code by Jay Monkman (jmonkman@frasca.com)
5 *
6 * Original was written by:
7 * W. Eric Norum
8 * Saskatchewan Accelerator Laboratory
9 * University of Saskatchewan
10 * Saskatoon, Saskatchewan, CANADA
11 * eric@skatter.usask.ca
12 *
13 *  $Id$
14 */
15
16#include <rtems.h>
17#include <bsp.h>
18#include <rtems/rtems/intr.h>
19#include <rtems/error.h>
20#include <mpc860.h>
21#include <info.h>
22
23/*
24 * Send a command to the CPM RISC processer
25 */
26void M860ExecuteRISC(rtems_unsigned16 command)
27{
28  rtems_unsigned16 lvl;
29 
30  rtems_interrupt_disable(lvl);
31  while (m860.cpcr & M860_CR_FLG) {
32    continue;
33  }
34
35  m860.cpcr = command | M860_CR_FLG;
36  rtems_interrupt_enable (lvl);
37}
38
39
40/*
41 * Allocation order:
42 *      - Dual-Port RAM section 0
43 *      - Dual-Port RAM section 1
44 *      - Dual-Port RAM section 2
45 *      - Dual-Port RAM section 3
46 *      - Dual-Port RAM section 4
47 */
48static struct {
49  char          *base;
50  unsigned int  size;
51  unsigned int  used;
52} bdregions[] = {
53  { (char *)&m860.dpram0[0],    sizeof m860.dpram0,     0 },
54  { (char *)&m860.dpram1[0],    sizeof m860.dpram1,     0 },
55  { (char *)&m860.dpram2[0],    sizeof m860.dpram2,     0 },
56  { (char *)&m860.dpram3[0],    sizeof m860.dpram3,     0 },
57  { (char *)&m860.dpram4[0],    sizeof m860.dpram4,     0 },
58};
59
60void *
61M860AllocateBufferDescriptors (int count)
62{
63  unsigned int i;
64  ISR_Level level;
65  void *bdp = NULL;
66  unsigned int want = count * sizeof(m860BufferDescriptor_t);
67 
68  /*
69   * Running with interrupts disabled is usually considered bad
70   * form, but this routine is probably being run as part of an
71   * initialization sequence so the effect shouldn't be too severe.
72   */
73  _ISR_Disable (level);
74  for (i = 0 ; i < sizeof(bdregions) / sizeof(bdregions[0]) ; i++) {
75    /*
76     * Verify that the region exists.
77     * This test is necessary since some chips have
78     * less dual-port RAM.
79     */
80    if (bdregions[i].used == 0) {
81      volatile unsigned char *cp = bdregions[i].base;
82      *cp = 0xAA;
83      if (*cp != 0xAA) {
84        bdregions[i].used = bdregions[i].size;
85        continue;
86      }
87      *cp = 0x55;
88      if (*cp != 0x55) {
89        bdregions[i].used = bdregions[i].size;
90        continue;
91      }
92      *cp = 0x0;
93    }
94    if (bdregions[i].size - bdregions[i].used >= want) {
95      bdp = bdregions[i].base + bdregions[i].used;
96      bdregions[i].used += want;
97      break;
98    }
99  }
100  _ISR_Enable(level);
101  if (bdp == NULL)
102    rtems_panic("Can't allocate %d buffer descriptor(s).\n", count);
103  return bdp;
104}
105
106void *
107M860AllocateRiscTimers (int count)
108{
109  /*
110   * Convert the count to the number of buffer descriptors
111   * of equal or larger size.  This ensures that all buffer
112   * descriptors are allocated with appropriate alignment.
113   */
114  return M860AllocateBufferDescriptors (((count * 4) +
115                                         sizeof(m860BufferDescriptor_t) - 1) /
116                                        sizeof(m860BufferDescriptor_t));
117}
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