source: rtems/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.h @ ae1f243

4.104.114.84.95
Last change on this file since ae1f243 was ae1f243, checked in by Joel Sherrill <joel.sherrill@…>, on 10/22/03 at 16:24:05

2003-10-22 Joel Sherrill <joel@…>

PR 510/bsps

  • irq/irq.h: Add extern C wrapper.
  • Property mode set to 100644
File size: 11.6 KB
Line 
1/* irq.h
2 *
3 *  This include file describe the data structure and the functions implemented
4 *  by rtems to write interrupt handlers.
5 *
6 *  CopyRight (C) 1999 valette@crf.canon.fr
7 *
8 *  This code is heavilly inspired by the public specification of STREAM V2
9 *  that can be found at :
10 *
11 *      <http://www.chorus.com/Documentation/index.html> by following
12 *  the STREAM API Specification Document link.
13 *
14 *  The license and distribution terms for this file may be
15 *  found in found in the file LICENSE in this distribution or at
16 *  http://www.rtems.com/license/LICENSE.
17 *
18 *  $Id$
19 */
20
21#ifndef LIBBSP_POWERPC_ETH_COMM_IRQ_IRQ_H
22#define LIBBSP_POWERPC_ETH_COMM_IRQ_IRQ_H
23
24
25#define BSP_ASM_IRQ_VECTOR_BASE 0x0
26
27#ifndef ASM
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
33extern volatile unsigned int ppc_cached_irq_mask;
34
35/*
36 * Symblolic IRQ names and related definitions.
37 */
38
39typedef enum {
40  /* Base vector for our SIU IRQ handlers. */
41  BSP_SIU_VECTOR_BASE   =       BSP_ASM_IRQ_VECTOR_BASE,
42  /*
43   * SIU IRQ handler related definitions
44   */
45  BSP_SIU_IRQ_NUMBER            =       16, /* 16 reserved but in the future... */
46  BSP_SIU_IRQ_LOWEST_OFFSET     =       0,
47  BSP_SIU_IRQ_MAX_OFFSET        =       BSP_SIU_IRQ_LOWEST_OFFSET + BSP_SIU_IRQ_NUMBER - 1,
48  /*
49   * CPM IRQ handlers related definitions
50   * CAUTION : BSP_CPM_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
51   */
52  BSP_CPM_IRQ_NUMBER            =       32,
53  BSP_CPM_IRQ_LOWEST_OFFSET     =       BSP_SIU_IRQ_NUMBER + BSP_SIU_VECTOR_BASE,
54  BSP_CPM_IRQ_MAX_OFFSET        =       BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER - 1,
55  /*
56   * PowerPc exceptions handled as interrupt where a rtems managed interrupt
57   * handler might be connected
58   */
59  BSP_PROCESSOR_IRQ_NUMBER      =       1,
60  BSP_PROCESSOR_IRQ_LOWEST_OFFSET =     BSP_CPM_IRQ_MAX_OFFSET + 1,
61  BSP_PROCESSOR_IRQ_MAX_OFFSET  =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1,
62  /*
63   * Summary
64   */
65  BSP_IRQ_NUMBER                =       BSP_PROCESSOR_IRQ_MAX_OFFSET + 1,
66  BSP_LOWEST_OFFSET             =       BSP_SIU_IRQ_LOWEST_OFFSET,
67  BSP_MAX_OFFSET                =       BSP_PROCESSOR_IRQ_MAX_OFFSET,
68    /*
69     * Some SIU IRQ symbolic name definition. Please note that
70     * INT IRQ are defined but a single one will be used to
71     * redirect all CPM interrupt.
72     */       
73  BSP_SIU_EXT_IRQ_0             =       0,
74  BSP_SIU_INT_IRQ_0             =       1,
75
76  BSP_SIU_EXT_IRQ_1             =       2,
77  BSP_SIU_INT_IRQ_1             =       3,
78
79  BSP_SIU_EXT_IRQ_2             =       4,
80  BSP_SIU_INT_IRQ_2             =       5,
81 
82  BSP_SIU_EXT_IRQ_3             =       6,
83  BSP_SIU_INT_IRQ_3             =       7,
84 
85  BSP_SIU_EXT_IRQ_4             =       8,
86  BSP_SIU_INT_IRQ_4             =       9,
87
88  BSP_SIU_EXT_IRQ_5             =       10,
89  BSP_SIU_INT_IRQ_5             =       11,
90 
91  BSP_SIU_EXT_IRQ_6             =       12,
92  BSP_SIU_INT_IRQ_6             =       13,
93 
94  BSP_SIU_EXT_IRQ_7             =       14,
95  BSP_SIU_INT_IRQ_7             =       15,
96  /*
97   * Symbolic name for CPM interrupt on SIU Internal level 2
98   */
99  BSP_CPM_INTERRUPT             =       BSP_SIU_INT_IRQ_2,
100  BSP_PERIODIC_TIMER            =       BSP_SIU_INT_IRQ_6,
101  BSP_FAST_ETHERNET_CTRL        =       BSP_SIU_INT_IRQ_3,
102  /*
103     * Some CPM IRQ symbolic name definition
104     */
105  BSP_CPM_IRQ_ERROR             =       BSP_CPM_IRQ_LOWEST_OFFSET,
106  BSP_CPM_IRQ_PARALLEL_IO_PC4   =       BSP_CPM_IRQ_LOWEST_OFFSET + 1,
107  BSP_CPM_IRQ_PARALLEL_IO_PC5   =       BSP_CPM_IRQ_LOWEST_OFFSET + 2,
108  BSP_CPM_IRQ_SMC2_OR_PIP       =       BSP_CPM_IRQ_LOWEST_OFFSET + 3,
109  BSP_CPM_IRQ_SMC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 4,
110  BSP_CPM_IRQ_SPI               =       BSP_CPM_IRQ_LOWEST_OFFSET + 5,
111  BSP_CPM_IRQ_PARALLEL_IO_PC6   =       BSP_CPM_IRQ_LOWEST_OFFSET + 6,
112  BSP_CPM_IRQ_TIMER_4           =       BSP_CPM_IRQ_LOWEST_OFFSET + 7,
113 
114  BSP_CPM_IRQ_PARALLEL_IO_PC7   =       BSP_CPM_IRQ_LOWEST_OFFSET + 9,
115  BSP_CPM_IRQ_PARALLEL_IO_PC8   =       BSP_CPM_IRQ_LOWEST_OFFSET + 10,
116  BSP_CPM_IRQ_PARALLEL_IO_PC9   =       BSP_CPM_IRQ_LOWEST_OFFSET + 11,
117  BSP_CPM_IRQ_TIMER_3           =       BSP_CPM_IRQ_LOWEST_OFFSET + 12,
118 
119  BSP_CPM_IRQ_PARALLEL_IO_PC10  =       BSP_CPM_IRQ_LOWEST_OFFSET + 14,
120  BSP_CPM_IRQ_PARALLEL_IO_PC11  =       BSP_CPM_IRQ_LOWEST_OFFSET + 15,
121  BSP_CPM_I2C                   =       BSP_CPM_IRQ_LOWEST_OFFSET + 16,
122  BSP_CPM_RISC_TIMER_TABLE      =       BSP_CPM_IRQ_LOWEST_OFFSET + 17,
123  BSP_CPM_IRQ_TIMER_2           =       BSP_CPM_IRQ_LOWEST_OFFSET + 18,
124 
125  BSP_CPM_IDMA2                 =       BSP_CPM_IRQ_LOWEST_OFFSET + 20,
126  BSP_CPM_IDMA1                 =       BSP_CPM_IRQ_LOWEST_OFFSET + 21,
127  BSP_CPM_SDMA_CHANNEL_BUS_ERR  =       BSP_CPM_IRQ_LOWEST_OFFSET + 22,
128  BSP_CPM_IRQ_PARALLEL_IO_PC12  =       BSP_CPM_IRQ_LOWEST_OFFSET + 23,
129  BSP_CPM_IRQ_PARALLEL_IO_PC13  =       BSP_CPM_IRQ_LOWEST_OFFSET + 24,
130  BSP_CPM_IRQ_TIMER_1           =       BSP_CPM_IRQ_LOWEST_OFFSET + 25,
131  BSP_CPM_IRQ_PARALLEL_IO_PC14  =       BSP_CPM_IRQ_LOWEST_OFFSET + 26,
132  BSP_CPM_IRQ_SCC4              =       BSP_CPM_IRQ_LOWEST_OFFSET + 27,
133  BSP_CPM_IRQ_SCC3              =       BSP_CPM_IRQ_LOWEST_OFFSET + 28,
134  BSP_CPM_IRQ_SCC2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 29,
135  BSP_CPM_IRQ_SCC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 30,
136  BSP_CPM_IRQ_PARALLEL_IO_PC15  =       BSP_CPM_IRQ_LOWEST_OFFSET + 31,
137    /*
138     * Some Processor exception handled as rtems IRQ symbolic name definition
139     */
140  BSP_DECREMENTER               =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET
141 
142}rtems_irq_symbolic_name;
143
144#define CPM_INTERRUPT               
145
146
147/*
148 * Type definition for RTEMS managed interrupts
149 */
150typedef unsigned char  rtems_irq_prio;
151struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
152
153typedef void (*rtems_irq_hdl)           (void);
154typedef void (*rtems_irq_enable)        (const struct __rtems_irq_connect_data__*);
155typedef void (*rtems_irq_disable)       (const struct __rtems_irq_connect_data__*);
156typedef int  (*rtems_irq_is_enabled)    (const struct __rtems_irq_connect_data__*);
157
158typedef struct __rtems_irq_connect_data__ {
159  /*
160   * IRQ line
161   */
162  rtems_irq_symbolic_name       name;
163  /*
164   * handler. See comment on handler properties below in function prototype.
165   */
166  rtems_irq_hdl                 hdl;
167  /*
168   * function for enabling interrupts at device level (ONLY!).
169   * The BSP code will automatically enable it at SIU level and CPM level.
170   * RATIONALE : anyway such code has to exist in current driver code.
171   * It is usually called immediately AFTER connecting the interrupt handler.
172   * RTEMS may well need such a function when restoring normal interrupt
173   * processing after a debug session.
174   *
175   */
176    rtems_irq_enable            on;     
177  /*
178   * function for disabling interrupts at device level (ONLY!).
179   * The code will disable it at SIU and CPM level. RATIONALE : anyway
180   * such code has to exist for clean shutdown. It is usually called
181   * BEFORE disconnecting the interrupt. RTEMS may well need such
182   * a function when disabling normal interrupt processing for
183   * a debug session. May well be a NOP function.
184   */
185  rtems_irq_disable             off;
186  /*
187   * function enabling to know what interrupt may currently occur
188   * if someone manipulates the i8259s interrupt mask without care...
189   */
190    rtems_irq_is_enabled        isOn;
191}rtems_irq_connect_data;
192
193typedef struct {
194  /*
195   * size of all the table fields (*Tbl) described below.
196   */
197  unsigned int                  irqNb;
198  /*
199   * Default handler used when disconnecting interrupts.
200   */
201  rtems_irq_connect_data        defaultEntry;
202  /*
203   * Table containing initials/current value.
204   */
205  rtems_irq_connect_data*       irqHdlTbl;
206  /*
207   * actual value of BSP_SIU_IRQ_VECTOR_BASE...
208   */
209  rtems_irq_symbolic_name       irqBase;
210  /*
211   * software priorities associated with interrupts.
212   * if irqPrio  [i]  >  intrPrio  [j]  it  means  that 
213   * interrupt handler hdl connected for interrupt name i
214   * will  not be interrupted by the handler connected for interrupt j
215   * The interrupt source  will be physically masked at i8259 level.
216   */
217    rtems_irq_prio*             irqPrioTbl;
218}rtems_irq_global_settings;
219
220
221
222
223/*-------------------------------------------------------------------------+
224| Function Prototypes.
225+--------------------------------------------------------------------------*/
226/*
227 * ------------------------ PPC SIU Mngt Routines -------
228 */
229
230/*
231 * function to disable a particular irq at 8259 level. After calling
232 * this function, even if the device asserts the interrupt line it will
233 * not be propagated further to the processor
234 */
235int BSP_irq_disable_at_siu        (const rtems_irq_symbolic_name irqLine);
236/*
237 * function to enable a particular irq at 8259 level. After calling
238 * this function, if the device asserts the interrupt line it will
239 * be propagated further to the processor
240 */
241int BSP_irq_enable_at_siu               (const rtems_irq_symbolic_name irqLine);
242/*
243 * function to acknoledge a particular irq at 8259 level. After calling
244 * this function, if a device asserts an enabled interrupt line it will
245 * be propagated further to the processor. Mainly usefull for people
246 * writting raw handlers as this is automagically done for rtems managed
247 * handlers.
248 */
249int BSP_irq_ack_at_siu                  (const rtems_irq_symbolic_name irqLine);
250/*
251 * function to check if a particular irq is enabled at 8259 level. After calling
252 */
253int BSP_irq_enabled_at_siu      (const rtems_irq_symbolic_name irqLine);
254/*
255 * ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
256 */
257/*
258 * function to connect a particular irq handler. This hanlder will NOT be called
259 * directly as the result of the corresponding interrupt. Instead, a RTEMS
260 * irq prologue will be called that will :
261 *
262 *      1) save the C scratch registers,
263 *      2) switch to a interrupt stack if the interrupt is not nested,
264 *      4) modify them to disable the current interrupt at  SIU level (and may
265 *      be others depending on software priorities)
266 *      5) aknowledge the SIU',
267 *      6) demask the processor,
268 *      7) call the application handler
269 *
270 * As a result the hdl function provided
271 *
272 *      a) can perfectly be written is C,
273 *      b) may also well directly call the part of the RTEMS API that can be used
274 *      from interrupt level,
275 *      c) It only responsible for handling the jobs that need to be done at
276 *      the device level including (aknowledging/re-enabling the interrupt at device,
277 *      level, getting the data,...)
278 *
279 *      When returning from the function, the following will be performed by
280 *      the RTEMS irq epilogue :
281 *
282 *      1) masks the interrupts again,
283 *      2) restore the original SIU interrupt masks
284 *      3) switch back on the orinal stack if needed,
285 *      4) perform rescheduling when necessary,
286 *      5) restore the C scratch registers...
287 *      6) restore initial execution flow
288 *
289 */
290int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
291/*
292 * function to get the current RTEMS irq handler for ptr->name. It enables to
293 * define hanlder chain...
294 */
295int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
296/*
297 * function to get disconnect the RTEMS irq handler for ptr->name.
298 * This function checks that the value given is the current one for safety reason.
299 * The user can use the previous function to get it.
300 */
301int BSP_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
302
303/*
304 * ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
305 */
306/*
307 * (Re) Initialize the RTEMS interrupt management.
308 *
309 * The result of calling this function will be the same as if each individual
310 * handler (config->irqHdlTbl[i].hdl)  different from "config->defaultEntry.hdl"
311 * has been individualy connected via
312 *      BSP_install_rtems_irq_handler(&config->irqHdlTbl[i])
313 * And each handler currently equal to config->defaultEntry.hdl
314 * has been previously disconnected via
315 *       BSP_remove_rtems_irq_handler (&config->irqHdlTbl[i])
316 *
317 * This is to say that all information given will be used and not just
318 * only the space.
319 *
320 * CAUTION : the various table address contained in config will be used
321 *           directly by the interrupt mangement code in order to save
322 *           data size so they must stay valid after the call => they should
323 *           not be modified or declared on a stack.
324 */
325
326int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config);
327/*
328 * (Re) get info on current RTEMS interrupt management.
329 */
330int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
331 
332extern void BSP_rtems_irq_mng_init(unsigned cpuId);
333
334#ifdef __cplusplus
335}
336#endif
337
338#endif
339
340#endif
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