source: rtems/c/src/lib/libbsp/powerpc/eth_comm/include/info.h @ ee733965

4.104.114.84.95
Last change on this file since ee733965 was ee733965, checked in by Joel Sherrill <joel.sherrill@…>, on Feb 17, 1999 at 8:24:53 PM

Jay Monkman <jmonkman@…> submitted the eth_comm BSP for a PPC860
based board.

  • Property mode set to 100644
File size: 3.1 KB
Line 
1/* info.h - Defines board info block structure and macros for
2 *          handling elements of struct for ethernet comm board
3 *
4 * Written by Jay Monkman 7/21/98
5 * Copyright Frasca International, Inc 1998
6 */
7
8#ifndef __info_h__
9#define __info_h__
10
11typedef struct BoardInfoBlock_ {
12  rtems_unsigned16       size;         /* size of info block in bytes */
13  rtems_unsigned8        eth_id[6];    /* ethernet id of ethernet interface */
14  rtems_unsigned32       cpu_spd;      /* cpu speed in Hz */
15  rtems_unsigned32       flash_size;   /* size of flash memory in bytes */
16  rtems_unsigned32       ram_size;     /* size of ram in bytes */
17  rtems_unsigned32       version;      /* version of firmare (x.y format) */
18  rtems_unsigned32       if429;        /* mask for arinc429 interface */
19  rtems_unsigned32       ifcsdb;       /* mask for csdb interface */
20  rtems_unsigned16       if232;        /* mask for rs232 interface */
21  rtems_unsigned8        ifcan;        /* mask for canbus interface */
22  rtems_unsigned8        if568;        /* mask for arinc568 interface */
23  rtems_unsigned8        fpn[16];      /* Frasca part number in ASCII */
24  rtems_unsigned16       rev;          /* Board revision */
25  rtems_unsigned32       ip_num;       /* Board IP number */
26 
27} boardinfo_t;
28
29#define IFACE_ARINC429_TX0 0x00000001;
30#define IFACE_ARINC429_RX0 0x00000002;
31#define IFACE_ARINC429_TX1 0x00000004;
32#define IFACE_ARINC429_RX1 0x00000008;
33#define IFACE_ARINC429_TX2 0x00000010;
34#define IFACE_ARINC429_RX2 0x00000020;
35#define IFACE_ARINC429_TX3 0x00000040;
36#define IFACE_ARINC429_RX3 0x00000080;
37#define IFACE_ARINC429_TX4 0x00000100;
38#define IFACE_ARINC429_RX4 0x00000200;
39#define IFACE_ARINC429_TX5 0x00000400;
40#define IFACE_ARINC429_RX5 0x00000800;
41#define IFACE_ARINC429_TX6 0x00001000;
42#define IFACE_ARINC429_RX6 0x00002000;
43#define IFACE_ARINC429_TX7 0x00004000;
44#define IFACE_ARINC429_RX7 0x00008000;
45
46#define IFACE_ARINC568_TX0 0x0001;
47#define IFACE_ARINC568_RX0 0x0002;
48#define IFACE_ARINC568_TX1 0x0004;
49#define IFACE_ARINC568_RX1 0x0008;
50
51#define IFACE_CSDB_TX0 0x00000001;
52#define IFACE_CSDB_RX0 0x00000002;
53#define IFACE_CSDB_TX1 0x00000004;
54#define IFACE_CSDB_RX1 0x00000008;
55#define IFACE_CSDB_TX2 0x00000010;
56#define IFACE_CSDB_RX2 0x00000020;
57#define IFACE_CSDB_TX3 0x00000040;
58#define IFACE_CSDB_RX3 0x00000080;
59#define IFACE_CSDB_TX4 0x00000100;
60#define IFACE_CSDB_RX4 0x00000200;
61#define IFACE_CSDB_TX5 0x00000400;
62#define IFACE_CSDB_RX5 0x00000800;
63#define IFACE_CSDB_TX6 0x00001000;
64#define IFACE_CSDB_RX6 0x00002000;
65#define IFACE_CSDB_TX7 0x00004000;
66#define IFACE_CSDB_RX7 0x00008000;
67#define IFACE_CSDB_TX8 0x00010000;
68#define IFACE_CSDB_RX8 0x00020000;
69
70#define IFACE_CAN_TX0 0x0001;
71#define IFACE_CAN_RX0 0x0002;
72#define IFACE_CAN_TX1 0x0004;
73#define IFACE_CAN_RX1 0x0008;
74#define IFACE_CAN_TX2 0x0010;
75#define IFACE_CAN_RX2 0x0020;
76
77#define IFACE_RS232_TX0 0x0001;
78#define IFACE_RS232_RX0 0x0002;
79#define IFACE_RS232_TX1 0x0004;
80#define IFACE_RS232_RX1 0x0008;
81#define IFACE_RS232_TX2 0x0010;
82#define IFACE_RS232_RX2 0x0020;
83#define IFACE_RS232_TX3 0x0040;
84#define IFACE_RS232_RX3 0x0080;
85#define IFACE_RS232_TX4 0x0100;
86#define IFACE_RS232_RX4 0x0200;
87
88
89
90#endif /* __info_h__*/
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