source: rtems/c/src/lib/libbsp/powerpc/eth_comm/include/info.h @ 9e5c391

4.104.114.84.95
Last change on this file since 9e5c391 was 9e5c391, checked in by Joel Sherrill <joel.sherrill@…>, on Feb 18, 1999 at 3:09:59 PM

Added or corrected CVS Id strings.

  • Property mode set to 100644
File size: 3.1 KB
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1/* info.h - Defines board info block structure and macros for
2 *          handling elements of struct for ethernet comm board
3 *
4 * Written by Jay Monkman 7/21/98
5 * Copyright Frasca International, Inc 1998
6 *
7 *  $Id$
8 */
9
10#ifndef __info_h__
11#define __info_h__
12
13typedef struct BoardInfoBlock_ {
14  rtems_unsigned16       size;         /* size of info block in bytes */
15  rtems_unsigned8        eth_id[6];    /* ethernet id of ethernet interface */
16  rtems_unsigned32       cpu_spd;      /* cpu speed in Hz */
17  rtems_unsigned32       flash_size;   /* size of flash memory in bytes */
18  rtems_unsigned32       ram_size;     /* size of ram in bytes */
19  rtems_unsigned32       version;      /* version of firmare (x.y format) */
20  rtems_unsigned32       if429;        /* mask for arinc429 interface */
21  rtems_unsigned32       ifcsdb;       /* mask for csdb interface */
22  rtems_unsigned16       if232;        /* mask for rs232 interface */
23  rtems_unsigned8        ifcan;        /* mask for canbus interface */
24  rtems_unsigned8        if568;        /* mask for arinc568 interface */
25  rtems_unsigned8        fpn[16];      /* Frasca part number in ASCII */
26  rtems_unsigned16       rev;          /* Board revision */
27  rtems_unsigned32       ip_num;       /* Board IP number */
28 
29} boardinfo_t;
30
31#define IFACE_ARINC429_TX0 0x00000001;
32#define IFACE_ARINC429_RX0 0x00000002;
33#define IFACE_ARINC429_TX1 0x00000004;
34#define IFACE_ARINC429_RX1 0x00000008;
35#define IFACE_ARINC429_TX2 0x00000010;
36#define IFACE_ARINC429_RX2 0x00000020;
37#define IFACE_ARINC429_TX3 0x00000040;
38#define IFACE_ARINC429_RX3 0x00000080;
39#define IFACE_ARINC429_TX4 0x00000100;
40#define IFACE_ARINC429_RX4 0x00000200;
41#define IFACE_ARINC429_TX5 0x00000400;
42#define IFACE_ARINC429_RX5 0x00000800;
43#define IFACE_ARINC429_TX6 0x00001000;
44#define IFACE_ARINC429_RX6 0x00002000;
45#define IFACE_ARINC429_TX7 0x00004000;
46#define IFACE_ARINC429_RX7 0x00008000;
47
48#define IFACE_ARINC568_TX0 0x0001;
49#define IFACE_ARINC568_RX0 0x0002;
50#define IFACE_ARINC568_TX1 0x0004;
51#define IFACE_ARINC568_RX1 0x0008;
52
53#define IFACE_CSDB_TX0 0x00000001;
54#define IFACE_CSDB_RX0 0x00000002;
55#define IFACE_CSDB_TX1 0x00000004;
56#define IFACE_CSDB_RX1 0x00000008;
57#define IFACE_CSDB_TX2 0x00000010;
58#define IFACE_CSDB_RX2 0x00000020;
59#define IFACE_CSDB_TX3 0x00000040;
60#define IFACE_CSDB_RX3 0x00000080;
61#define IFACE_CSDB_TX4 0x00000100;
62#define IFACE_CSDB_RX4 0x00000200;
63#define IFACE_CSDB_TX5 0x00000400;
64#define IFACE_CSDB_RX5 0x00000800;
65#define IFACE_CSDB_TX6 0x00001000;
66#define IFACE_CSDB_RX6 0x00002000;
67#define IFACE_CSDB_TX7 0x00004000;
68#define IFACE_CSDB_RX7 0x00008000;
69#define IFACE_CSDB_TX8 0x00010000;
70#define IFACE_CSDB_RX8 0x00020000;
71
72#define IFACE_CAN_TX0 0x0001;
73#define IFACE_CAN_RX0 0x0002;
74#define IFACE_CAN_TX1 0x0004;
75#define IFACE_CAN_RX1 0x0008;
76#define IFACE_CAN_TX2 0x0010;
77#define IFACE_CAN_RX2 0x0020;
78
79#define IFACE_RS232_TX0 0x0001;
80#define IFACE_RS232_RX0 0x0002;
81#define IFACE_RS232_TX1 0x0004;
82#define IFACE_RS232_RX1 0x0008;
83#define IFACE_RS232_TX2 0x0010;
84#define IFACE_RS232_RX2 0x0020;
85#define IFACE_RS232_TX3 0x0040;
86#define IFACE_RS232_RX3 0x0080;
87#define IFACE_RS232_TX4 0x0100;
88#define IFACE_RS232_RX4 0x0200;
89
90
91
92#endif /* __info_h__*/
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