source: rtems/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c @ afce764d

4.104.114.9
Last change on this file since afce764d was afce764d, checked in by Joel Sherrill <joel.sherrill@…>, on Dec 4, 2007 at 10:21:41 PM

2007-12-04 Joel Sherrill <joel.sherrill@…>

  • Makefile.am, include/bsp.h, startup/bspstart.c: Move interrupt_stack_size field from CPU Table to Configuration Table. Eliminate CPU Table from all ports. Delete references to CPU Table in all forms.
  • Property mode set to 100644
File size: 13.0 KB
Line 
1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-2007.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  $Id$
15 */
16
17#include <string.h>
18
19#include <rtems/libio.h>
20#include <rtems/libcsupport.h>
21#include <bsp/consoleIo.h>
22#include <libcpu/spr.h>
23#include <bsp/residual.h>
24#include <bsp/pci.h>
25#include <bsp/openpic.h>
26#include <bsp/irq.h>
27#include <bsp/VME.h>
28#include <bsp.h>
29#include <libcpu/bat.h>
30#include <libcpu/pte121.h>
31#include <libcpu/cpuIdent.h>
32#include <bsp/vectors.h>
33#include <rtems/powerpc/powerpc.h>
34
35extern unsigned long __rtems_end[];
36extern void L1_caches_enables();
37extern unsigned get_L2CR();
38extern void set_L2CR(unsigned);
39extern void bsp_cleanup(void);
40extern Triv121PgTbl BSP_pgtbl_setup();
41extern void BSP_pgtbl_activate();
42extern void BSP_vme_config();
43extern void ShowBATS();
44unsigned int rsPMCQ1Init();
45
46uint32_t bsp_clicks_per_usec;
47
48SPR_RW(SPRG0)
49SPR_RW(SPRG1)
50
51uint8_t LightIdx = 0;
52
53void BSP_Increment_Light(){
54  uint8_t data;
55  data = *GENERAL_REGISTER1;
56  data &= 0xf0;
57  data |= LightIdx++;
58  *GENERAL_REGISTER1 = data;
59}
60
61void BSP_Fatal_Fault_Light() {
62  uint8_t data;
63  data = *GENERAL_REGISTER1;
64  data &= 0xf0;
65  data |= 0x7;
66  while(1)
67    *GENERAL_REGISTER1 = data;
68}
69
70void write_to_Q2ram(int offset, unsigned int data )
71{
72printk("0x%x ==> %d\n", offset, data );
73#if 0
74  unsigned int *ptr = 0x82000000;
75  ptr += offset;
76  *ptr = data;
77#endif
78}
79
80/*
81 * Vital Board data Start using DATA RESIDUAL
82 */
83
84uint32_t VME_Slot1 = FALSE;
85
86/*
87 * Total memory.
88 * Note: RAM_END is defined in linkcmds.  We want to verify that the application
89 *       is only using 10M of memory, and we do this by only accounting for this
90 *       much memory.
91 */
92extern int   RAM_END; 
93unsigned int BSP_mem_size = (unsigned int)&RAM_END;
94
95/*
96 * PCI Bus Frequency
97 */
98unsigned int BSP_bus_frequency; 
99
100/*
101 * processor clock frequency
102 */
103unsigned int BSP_processor_frequency;
104
105/*
106 * Time base divisior (how many tick for 1 second).
107 */
108unsigned int BSP_time_base_divisor = 1000;  /* XXX - Just a guess */
109
110/*
111 * system init stack
112 */
113#define INIT_STACK_SIZE 0x1000
114
115void BSP_panic(char *s)
116{
117  printk("%s PANIC %s\n",_RTEMS_version, s);
118  __asm__ __volatile ("sc"); 
119}
120
121void _BSP_Fatal_error(unsigned int v)
122{
123  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
124  __asm__ __volatile ("sc"); 
125}
126 
127/*
128 *  The original table from the application and our copy of it with
129 *  some changes.
130 */
131
132extern rtems_configuration_table Configuration;
133rtems_configuration_table  BSP_Configuration;
134char *rtems_progname;
135
136int BSP_FLASH_Disable_writes(
137  uint32_t    area
138)
139{
140  unsigned char    data;
141 
142  data = *GENERAL_REGISTER1;
143  data |= DISABLE_USER_FLASH;
144  *GENERAL_REGISTER1 = data;
145                                                                           
146  return RTEMS_SUCCESSFUL;
147}
148
149int BSP_FLASH_Enable_writes(
150 uint32_t               area                           /* IN  */
151)
152{
153  unsigned char    data;
154                                                                                                                       
155  data = *GENERAL_REGISTER1;
156  data &= (~DISABLE_USER_FLASH);
157  *GENERAL_REGISTER1 = data;
158                                                                                                                       
159  return RTEMS_SUCCESSFUL;
160}
161
162void BSP_FLASH_set_page(
163  uint8_t  page
164)
165{
166  unsigned char  data;
167                                                                                                                       
168  /* Set the flash page register. */
169  data = *GENERAL_REGISTER2;
170  data &= ~(BSP_FLASH_PAGE_MASK);
171  data |= 0x80 | (page << BSP_FLASH_PAGE_SHIFT);
172  *GENERAL_REGISTER2 = data;
173}
174
175/*
176 *  Use the shared implementations of the following routines
177 */
178 
179void bsp_postdriver_hook(void);
180void bsp_libc_init( void *, uint32_t, int );
181
182/*
183 *  Function:   bsp_pretasking_hook
184 *  Created:    95/03/10
185 *
186 *  Description:
187 *      BSP pretasking hook.  Called just before drivers are initialized.
188 *      Used to setup libc and install any BSP extensions.
189 *
190 *  NOTES:
191 *      Must not use libc (to do io) from here, since drivers are
192 *      not yet initialized.
193 *
194 */
195 
196void bsp_pretasking_hook(void)
197{
198  uint32_t        heap_start;   
199  uint32_t        heap_size;
200  uint32_t        heap_sbrk_spared;
201
202  extern uint32_t _bsp_sbrk_init(uint32_t, uint32_t*);
203 
204  heap_start = ((uint32_t) __rtems_end) +
205    INIT_STACK_SIZE + rtems_configuration_get_interrupt_stack_size();
206  if (heap_start & (CPU_ALIGNMENT-1))
207    heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
208
209  heap_size = (BSP_mem_size - heap_start) - BSP_Configuration.work_space_size;
210
211  heap_sbrk_spared=_bsp_sbrk_init(heap_start, &heap_size);
212
213#ifdef SHOW_MORE_INIT_SETTINGS
214  printk(" HEAP start %x  size %x (%x bytes spared for sbrk)\n", 
215    heap_start, heap_size, heap_sbrk_spared);
216#endif   
217
218  bsp_libc_init((void *) 0, heap_size, heap_sbrk_spared);
219  rsPMCQ1Init();
220
221#ifdef RTEMS_DEBUG
222  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
223#endif
224}
225
226void zero_bss()
227{
228  /* prevent these from being accessed in the short data areas */
229  extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[];
230  extern unsigned long __SBSS2_START__[], __SBSS2_END__[];
231  memset(__SBSS_START__, 0, ((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__));
232  memset(__SBSS2_START__, 0, ((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__));
233  memset(__bss_start, 0, ((unsigned) __rtems_end) - ((unsigned)__bss_start));
234}
235
236void save_boot_params(RESIDUAL* r3, void *r4, void* r5, char *additional_boot_options)
237{
238#if 0 
239  residualCopy = *r3;
240  strncpy(loaderParam, additional_boot_options, MAX_LOADER_ADD_PARM);
241  loaderParam[MAX_LOADER_ADD_PARM - 1] ='\0';
242#endif
243}
244
245unsigned int EUMBBAR;
246
247unsigned int get_eumbbar() {
248  register int a, e;
249
250  asm volatile( "lis %0,0xfec0; ori  %0,%0,0x0000": "=r" (a) );
251  asm volatile("sync");
252                                                               
253  asm volatile("lis %0,0x8000; ori %0,%0,0x0078": "=r"(e) ); 
254  asm volatile("stwbrx  %0,0x0,%1": "=r"(e): "r"(a)); 
255  asm volatile("sync");
256
257  asm volatile("lis %0,0xfee0; ori %0,%0,0x0000": "=r" (a) ); 
258  asm volatile("sync");
259                                                         
260  asm volatile("lwbrx %0,0x0,%1": "=r" (e): "r" (a));
261  asm volatile("isync");
262  return e;
263}
264
265void Read_ep1a_config_registers( ppc_cpu_id_t myCpu ) {
266  unsigned char value;
267
268  /*
269   * Print out the board and revision.
270   */
271
272  printk("Board:  ");
273  printk( get_ppc_cpu_type_name(myCpu) );
274
275  value = *BOARD_REVISION_REGISTER2 & HARDWARE_ID_MASK;
276  if ( value == HARDWARE_ID_PPC5_EP1A )
277    printk("  EP1A     ");
278  else if ( value == HARDWARE_ID_EP1B ) 
279    printk("  EP1B     ");
280  else
281    printk("  Unknown  ");
282 
283  value = *BOARD_REVISION_REGISTER2&0x1; 
284  printk("Board ID %08x", value);
285  if(value == 0x0){
286    VME_Slot1 = TRUE;
287    printk("VME Slot 1\n");
288  }
289  else{
290    VME_Slot1 = FALSE;
291    printk("\n");
292  }
293
294  printk("Revision: ");
295  value = *BOARD_REVISION_REGISTER1;
296  printk("%d%c\n\n", value>>4, 'A'+(value&BUILD_REVISION_MASK) );
297
298  /*
299   * Get the CPU, XXX frequency
300   */
301  value = *EQUIPMENT_PRESENT_REGISTER2 & PLL_CFG_MASK;
302  switch( value ) {
303    case MHZ_33_66_200:     /* PCI, MEM, & CPU Frequency */
304      BSP_processor_frequency = 200000000;
305      BSP_bus_frequency       =  33000000;
306      break;
307    case MHZ_33_100_200:   /* PCI, MEM, & CPU Frequency */
308      BSP_processor_frequency = 200000000;
309      BSP_bus_frequency       =  33000000;
310      break;
311    case MHZ_33_66_266:    /* PCI, MEM, & CPU Frequency */
312      BSP_processor_frequency = 266000000;
313      BSP_bus_frequency       =  33000000;
314      break;
315    case MHZ_33_66_333:   /* PCI, MEM, & CPU Frequency */
316      BSP_processor_frequency = 333000000;
317      BSP_bus_frequency       =  33000000;
318      break;
319    case MHZ_33_100_333:   /* PCI, MEM, & CPU Frequency */
320      BSP_processor_frequency = 333000000;
321      BSP_bus_frequency       =  33000000;
322      break;
323    case MHZ_33_100_350:   /* PCI, MEM, & CPU Frequency */
324      BSP_processor_frequency = 350000000;
325      BSP_bus_frequency       =  33000000;
326      break;
327    default:
328      printk("ERROR: Unknown Processor frequency 0x%02x please fill in bspstart.c\n",value);
329      BSP_processor_frequency = 350000000;
330      BSP_bus_frequency       =  33000000;
331      break;
332  }
333}
334
335/*
336 *  bsp_start
337 *
338 *  This routine does the bulk of the system initialization.
339 */
340
341void bsp_start( void )
342{
343  unsigned char *stack;
344  register uint32_t  intrStack;
345  register uint32_t *intrStackPtr;
346  unsigned char *work_space_start;
347  ppc_cpu_id_t myCpu;
348  ppc_cpu_revision_t myCpuRevision;
349  Triv121PgTbl  pt=0;   /*  R = e; */
350
351  /*
352   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
353   * store the result in global variables so that it can be used latter...
354   */
355  BSP_Increment_Light();
356  myCpu         = get_ppc_cpu_type();
357  myCpuRevision = get_ppc_cpu_revision();
358
359  EUMBBAR = get_eumbbar(); 
360  printk("EUMBBAR 0x%08x\n", EUMBBAR );
361
362  /*
363   * Note this sets BSP_processor_frequency based upon register settings.
364   * It must be done prior to setting up hooks.
365   */
366  Read_ep1a_config_registers( myCpu );
367
368  bsp_clicks_per_usec = BSP_processor_frequency/(BSP_time_base_divisor * 1000);
369
370ShowBATS();
371#if 0   /* XXX - Add back in cache enable when we get this up and running!! */
372  /*
373   * enables L1 Cache. Note that the L1_caches_enables() codes checks for
374   * relevant CPU type so that the reason why there is no use of myCpu...
375   */
376  L1_caches_enables();
377#endif
378
379  /*
380   * the initial stack  has aready been set to this value in start.S
381   * so there is no need to set it in r1 again... It is just for info
382   * so that It can be printed without accessing R1.
383   */
384  stack = ((unsigned char*) __rtems_end) + INIT_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE;
385
386 /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
387  *((uint32_t *)stack) = 0;
388
389  /*
390   * Initialize the interrupt related settings
391   * SPRG1 = software managed IRQ stack
392   *
393   * This could be done latter (e.g in IRQ_INIT) but it helps to understand
394   * some settings below...
395   */
396  intrStack = ((uint32_t) __rtems_end) +
397    INIT_STACK_SIZE + rtems_configuration_get_interrupt_stack_size() - 
398    PPC_MINIMUM_STACK_FRAME_SIZE;
399
400  /* make sure it's properly aligned */
401  intrStack &= ~(CPU_STACK_ALIGNMENT-1);
402
403  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
404  intrStackPtr = (uint32_t*) intrStack;
405  *intrStackPtr = 0;
406
407  _write_SPRG1((unsigned int)intrStack);
408
409  /* signal them that we have fixed PR288 - eventually, this should go away */
410  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
411
412  /*
413   * Initialize default raw exception hanlders. See vectors/vectors_init.c
414   */
415  initialize_exceptions();
416
417  /*
418   * Init MMU block address translation to enable hardware
419   * access
420   */
421  setdbat(1, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE);
422  setdbat(3, 0x90000000, 0x90000000, 0x10000000, IO_PAGE);
423
424
425#ifdef SHOW_MORE_INIT_SETTINGS
426  printk("Going to start PCI buses scanning and initialization\n");
427#endif 
428  pci_initialize();
429
430#ifdef SHOW_MORE_INIT_SETTINGS
431  printk("Number of PCI buses found is : %d\n", pci_bus_count());
432#endif
433#ifdef TEST_RAW_EXCEPTION_CODE 
434  printk("Testing exception handling Part 1\n");
435
436  /*
437   * Cause a software exception
438   */
439  __asm__ __volatile ("sc");
440
441  /*
442   * Check we can still catch exceptions and returned coorectly.
443   */
444  printk("Testing exception handling Part 2\n");
445  __asm__ __volatile ("sc");
446#endif 
447
448#ifdef SHOW_MORE_INIT_SETTINGS
449  printk("BSP_Configuration.work_space_size = %x\n", BSP_Configuration.work_space_size);
450#endif 
451  work_space_start = 
452    (unsigned char *)BSP_mem_size - BSP_Configuration.work_space_size;
453
454  if ( work_space_start <= ((unsigned char *)__rtems_end) + 
455        INIT_STACK_SIZE + rtems_configuration_get_interrupt_stack_size()) {
456    printk( "bspstart: Not enough RAM!!!\n" );
457    bsp_cleanup();
458  }
459
460  BSP_Configuration.work_space_start = work_space_start;
461
462  /*
463   * Initalize RTEMS IRQ system
464   */
465  BSP_rtems_irq_mng_init(0);
466 
467  /* Activate the page table mappings only after
468   * initializing interrupts because the irq_mng_init()
469   * routine needs to modify the text
470   */           
471  if (pt) {
472#ifdef  SHOW_MORE_INIT_SETTINGS
473    printk("Page table setup finished; will activate it NOW...\n");
474#endif
475    BSP_pgtbl_activate(pt);
476  }
477
478  /*
479   * Initialize VME bridge - needs working PCI
480   * and IRQ subsystems...
481   */
482#ifdef SHOW_MORE_INIT_SETTINGS
483  printk("Going to initialize VME bridge\n");
484#endif
485  /* VME initialization is in a separate file so apps which don't use
486   * VME or want a different configuration may link against a customized
487   * routine.
488   */
489  BSP_vme_config();
490
491#ifdef SHOW_MORE_INIT_SETTINGS
492  ShowBATS();
493  printk("Exit from bspstart\n");
494#endif 
495}
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