source: rtems/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c @ 4130d8e2

4.104.114.9
Last change on this file since 4130d8e2 was 4130d8e2, checked in by Joel Sherrill <joel.sherrill@…>, on Dec 11, 2007 at 3:50:25 PM

2007-12-11 Joel Sherrill <joel.sherrill@…>

  • include/bsp.h, startup/bspstart.c: Eliminate copies of the Configuration Table. Use the RTEMS provided accessor macros to obtain configuration fields.
  • Property mode set to 100644
File size: 12.8 KB
Line 
1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-2007.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  $Id$
15 */
16
17#include <string.h>
18
19#include <rtems/libio.h>
20#include <rtems/libcsupport.h>
21#include <bsp/consoleIo.h>
22#include <libcpu/spr.h>
23#include <bsp/residual.h>
24#include <bsp/pci.h>
25#include <bsp/openpic.h>
26#include <bsp/irq.h>
27#include <bsp/VME.h>
28#include <bsp.h>
29#include <libcpu/bat.h>
30#include <libcpu/pte121.h>
31#include <libcpu/cpuIdent.h>
32#include <bsp/vectors.h>
33#include <rtems/powerpc/powerpc.h>
34
35extern unsigned long __rtems_end[];
36extern void L1_caches_enables();
37extern unsigned get_L2CR();
38extern void set_L2CR(unsigned);
39extern void bsp_cleanup(void);
40extern Triv121PgTbl BSP_pgtbl_setup();
41extern void BSP_pgtbl_activate();
42extern void BSP_vme_config();
43extern void ShowBATS();
44unsigned int rsPMCQ1Init();
45
46uint32_t bsp_clicks_per_usec;
47
48SPR_RW(SPRG0)
49SPR_RW(SPRG1)
50
51uint8_t LightIdx = 0;
52
53void BSP_Increment_Light(){
54  uint8_t data;
55  data = *GENERAL_REGISTER1;
56  data &= 0xf0;
57  data |= LightIdx++;
58  *GENERAL_REGISTER1 = data;
59}
60
61void BSP_Fatal_Fault_Light() {
62  uint8_t data;
63  data = *GENERAL_REGISTER1;
64  data &= 0xf0;
65  data |= 0x7;
66  while(1)
67    *GENERAL_REGISTER1 = data;
68}
69
70void write_to_Q2ram(int offset, unsigned int data )
71{
72printk("0x%x ==> %d\n", offset, data );
73#if 0
74  unsigned int *ptr = 0x82000000;
75  ptr += offset;
76  *ptr = data;
77#endif
78}
79
80/*
81 * Vital Board data Start using DATA RESIDUAL
82 */
83
84uint32_t VME_Slot1 = FALSE;
85
86/*
87 * Total memory.
88 * Note: RAM_END is defined in linkcmds.  We want to verify that the application
89 *       is only using 10M of memory, and we do this by only accounting for this
90 *       much memory.
91 */
92extern int   RAM_END; 
93unsigned int BSP_mem_size = (unsigned int)&RAM_END;
94
95/*
96 * PCI Bus Frequency
97 */
98unsigned int BSP_bus_frequency; 
99
100/*
101 * processor clock frequency
102 */
103unsigned int BSP_processor_frequency;
104
105/*
106 * Time base divisior (how many tick for 1 second).
107 */
108unsigned int BSP_time_base_divisor = 1000;  /* XXX - Just a guess */
109
110/*
111 * system init stack
112 */
113#define INIT_STACK_SIZE 0x1000
114
115void BSP_panic(char *s)
116{
117  printk("%s PANIC %s\n",_RTEMS_version, s);
118  __asm__ __volatile ("sc"); 
119}
120
121void _BSP_Fatal_error(unsigned int v)
122{
123  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
124  __asm__ __volatile ("sc"); 
125}
126 
127int BSP_FLASH_Disable_writes(
128  uint32_t    area
129)
130{
131  unsigned char    data;
132 
133  data = *GENERAL_REGISTER1;
134  data |= DISABLE_USER_FLASH;
135  *GENERAL_REGISTER1 = data;
136                                                                           
137  return RTEMS_SUCCESSFUL;
138}
139
140int BSP_FLASH_Enable_writes(
141 uint32_t               area                           /* IN  */
142)
143{
144  unsigned char    data;
145                                                                                                                       
146  data = *GENERAL_REGISTER1;
147  data &= (~DISABLE_USER_FLASH);
148  *GENERAL_REGISTER1 = data;
149                                                                                                                       
150  return RTEMS_SUCCESSFUL;
151}
152
153void BSP_FLASH_set_page(
154  uint8_t  page
155)
156{
157  unsigned char  data;
158                                                                                                                       
159  /* Set the flash page register. */
160  data = *GENERAL_REGISTER2;
161  data &= ~(BSP_FLASH_PAGE_MASK);
162  data |= 0x80 | (page << BSP_FLASH_PAGE_SHIFT);
163  *GENERAL_REGISTER2 = data;
164}
165
166/*
167 *  Use the shared implementations of the following routines
168 */
169 
170void bsp_postdriver_hook(void);
171void bsp_libc_init( void *, uint32_t, int );
172
173/*
174 *  Function:   bsp_pretasking_hook
175 *  Created:    95/03/10
176 *
177 *  Description:
178 *      BSP pretasking hook.  Called just before drivers are initialized.
179 *      Used to setup libc and install any BSP extensions.
180 *
181 *  NOTES:
182 *      Must not use libc (to do io) from here, since drivers are
183 *      not yet initialized.
184 *
185 */
186 
187void bsp_pretasking_hook(void)
188{
189  uint32_t        heap_start;   
190  uint32_t        heap_size;
191  uint32_t        heap_sbrk_spared;
192
193  extern uint32_t _bsp_sbrk_init(uint32_t, uint32_t*);
194 
195  heap_start = ((uint32_t) __rtems_end) +
196    INIT_STACK_SIZE + rtems_configuration_get_interrupt_stack_size();
197  if (heap_start & (CPU_ALIGNMENT-1))
198    heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
199
200  heap_size = (BSP_mem_size - heap_start) - rtems_configuration_get_work_space_size();
201
202  heap_sbrk_spared=_bsp_sbrk_init(heap_start, &heap_size);
203
204#ifdef SHOW_MORE_INIT_SETTINGS
205  printk(" HEAP start %x  size %x (%x bytes spared for sbrk)\n", 
206    heap_start, heap_size, heap_sbrk_spared);
207#endif   
208
209  bsp_libc_init((void *) 0, heap_size, heap_sbrk_spared);
210  rsPMCQ1Init();
211
212#ifdef RTEMS_DEBUG
213  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
214#endif
215}
216
217void zero_bss()
218{
219  /* prevent these from being accessed in the short data areas */
220  extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[];
221  extern unsigned long __SBSS2_START__[], __SBSS2_END__[];
222  memset(__SBSS_START__, 0, ((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__));
223  memset(__SBSS2_START__, 0, ((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__));
224  memset(__bss_start, 0, ((unsigned) __rtems_end) - ((unsigned)__bss_start));
225}
226
227void save_boot_params(RESIDUAL* r3, void *r4, void* r5, char *additional_boot_options)
228{
229#if 0 
230  residualCopy = *r3;
231  strncpy(loaderParam, additional_boot_options, MAX_LOADER_ADD_PARM);
232  loaderParam[MAX_LOADER_ADD_PARM - 1] ='\0';
233#endif
234}
235
236unsigned int EUMBBAR;
237
238unsigned int get_eumbbar() {
239  register int a, e;
240
241  asm volatile( "lis %0,0xfec0; ori  %0,%0,0x0000": "=r" (a) );
242  asm volatile("sync");
243                                                               
244  asm volatile("lis %0,0x8000; ori %0,%0,0x0078": "=r"(e) ); 
245  asm volatile("stwbrx  %0,0x0,%1": "=r"(e): "r"(a)); 
246  asm volatile("sync");
247
248  asm volatile("lis %0,0xfee0; ori %0,%0,0x0000": "=r" (a) ); 
249  asm volatile("sync");
250                                                         
251  asm volatile("lwbrx %0,0x0,%1": "=r" (e): "r" (a));
252  asm volatile("isync");
253  return e;
254}
255
256void Read_ep1a_config_registers( ppc_cpu_id_t myCpu ) {
257  unsigned char value;
258
259  /*
260   * Print out the board and revision.
261   */
262
263  printk("Board:  ");
264  printk( get_ppc_cpu_type_name(myCpu) );
265
266  value = *BOARD_REVISION_REGISTER2 & HARDWARE_ID_MASK;
267  if ( value == HARDWARE_ID_PPC5_EP1A )
268    printk("  EP1A     ");
269  else if ( value == HARDWARE_ID_EP1B ) 
270    printk("  EP1B     ");
271  else
272    printk("  Unknown  ");
273 
274  value = *BOARD_REVISION_REGISTER2&0x1; 
275  printk("Board ID %08x", value);
276  if(value == 0x0){
277    VME_Slot1 = TRUE;
278    printk("VME Slot 1\n");
279  }
280  else{
281    VME_Slot1 = FALSE;
282    printk("\n");
283  }
284
285  printk("Revision: ");
286  value = *BOARD_REVISION_REGISTER1;
287  printk("%d%c\n\n", value>>4, 'A'+(value&BUILD_REVISION_MASK) );
288
289  /*
290   * Get the CPU, XXX frequency
291   */
292  value = *EQUIPMENT_PRESENT_REGISTER2 & PLL_CFG_MASK;
293  switch( value ) {
294    case MHZ_33_66_200:     /* PCI, MEM, & CPU Frequency */
295      BSP_processor_frequency = 200000000;
296      BSP_bus_frequency       =  33000000;
297      break;
298    case MHZ_33_100_200:   /* PCI, MEM, & CPU Frequency */
299      BSP_processor_frequency = 200000000;
300      BSP_bus_frequency       =  33000000;
301      break;
302    case MHZ_33_66_266:    /* PCI, MEM, & CPU Frequency */
303      BSP_processor_frequency = 266000000;
304      BSP_bus_frequency       =  33000000;
305      break;
306    case MHZ_33_66_333:   /* PCI, MEM, & CPU Frequency */
307      BSP_processor_frequency = 333000000;
308      BSP_bus_frequency       =  33000000;
309      break;
310    case MHZ_33_100_333:   /* PCI, MEM, & CPU Frequency */
311      BSP_processor_frequency = 333000000;
312      BSP_bus_frequency       =  33000000;
313      break;
314    case MHZ_33_100_350:   /* PCI, MEM, & CPU Frequency */
315      BSP_processor_frequency = 350000000;
316      BSP_bus_frequency       =  33000000;
317      break;
318    default:
319      printk("ERROR: Unknown Processor frequency 0x%02x please fill in bspstart.c\n",value);
320      BSP_processor_frequency = 350000000;
321      BSP_bus_frequency       =  33000000;
322      break;
323  }
324}
325
326/*
327 *  bsp_start
328 *
329 *  This routine does the bulk of the system initialization.
330 */
331
332void bsp_start( void )
333{
334  unsigned char *stack;
335  register uint32_t  intrStack;
336  register uint32_t *intrStackPtr;
337  unsigned char *work_space_start;
338  ppc_cpu_id_t myCpu;
339  ppc_cpu_revision_t myCpuRevision;
340  Triv121PgTbl  pt=0;   /*  R = e; */
341
342  /*
343   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
344   * store the result in global variables so that it can be used latter...
345   */
346  BSP_Increment_Light();
347  myCpu         = get_ppc_cpu_type();
348  myCpuRevision = get_ppc_cpu_revision();
349
350  EUMBBAR = get_eumbbar(); 
351  printk("EUMBBAR 0x%08x\n", EUMBBAR );
352
353  /*
354   * Note this sets BSP_processor_frequency based upon register settings.
355   * It must be done prior to setting up hooks.
356   */
357  Read_ep1a_config_registers( myCpu );
358
359  bsp_clicks_per_usec = BSP_processor_frequency/(BSP_time_base_divisor * 1000);
360
361ShowBATS();
362#if 0   /* XXX - Add back in cache enable when we get this up and running!! */
363  /*
364   * enables L1 Cache. Note that the L1_caches_enables() codes checks for
365   * relevant CPU type so that the reason why there is no use of myCpu...
366   */
367  L1_caches_enables();
368#endif
369
370  /*
371   * the initial stack  has aready been set to this value in start.S
372   * so there is no need to set it in r1 again... It is just for info
373   * so that It can be printed without accessing R1.
374   */
375  stack = ((unsigned char*) __rtems_end) + INIT_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE;
376
377 /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
378  *((uint32_t *)stack) = 0;
379
380  /*
381   * Initialize the interrupt related settings
382   * SPRG1 = software managed IRQ stack
383   *
384   * This could be done latter (e.g in IRQ_INIT) but it helps to understand
385   * some settings below...
386   */
387  intrStack = ((uint32_t) __rtems_end) +
388    INIT_STACK_SIZE + rtems_configuration_get_interrupt_stack_size() - 
389    PPC_MINIMUM_STACK_FRAME_SIZE;
390
391  /* make sure it's properly aligned */
392  intrStack &= ~(CPU_STACK_ALIGNMENT-1);
393
394  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
395  intrStackPtr = (uint32_t*) intrStack;
396  *intrStackPtr = 0;
397
398  _write_SPRG1((unsigned int)intrStack);
399
400  /* signal them that we have fixed PR288 - eventually, this should go away */
401  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
402
403  /*
404   * Initialize default raw exception hanlders. See vectors/vectors_init.c
405   */
406  initialize_exceptions();
407
408  /*
409   * Init MMU block address translation to enable hardware
410   * access
411   */
412  setdbat(1, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE);
413  setdbat(3, 0x90000000, 0x90000000, 0x10000000, IO_PAGE);
414
415
416#ifdef SHOW_MORE_INIT_SETTINGS
417  printk("Going to start PCI buses scanning and initialization\n");
418#endif 
419  pci_initialize();
420
421#ifdef SHOW_MORE_INIT_SETTINGS
422  printk("Number of PCI buses found is : %d\n", pci_bus_count());
423#endif
424#ifdef TEST_RAW_EXCEPTION_CODE 
425  printk("Testing exception handling Part 1\n");
426
427  /*
428   * Cause a software exception
429   */
430  __asm__ __volatile ("sc");
431
432  /*
433   * Check we can still catch exceptions and returned coorectly.
434   */
435  printk("Testing exception handling Part 2\n");
436  __asm__ __volatile ("sc");
437#endif 
438
439#ifdef SHOW_MORE_INIT_SETTINGS
440  printk("rtems_configuration_get_work_space_size() = %x\n", 
441     rtems_configuration_get_work_space_size());
442#endif 
443  work_space_start = 
444    (unsigned char *)BSP_mem_size - rtems_configuration_get_work_space_size();
445
446  if ( work_space_start <= ((unsigned char *)__rtems_end) + 
447        INIT_STACK_SIZE + rtems_configuration_get_interrupt_stack_size()) {
448    printk( "bspstart: Not enough RAM!!!\n" );
449    bsp_cleanup();
450  }
451
452  Configuration.work_space_start = work_space_start;
453
454  /*
455   * Initalize RTEMS IRQ system
456   */
457  BSP_rtems_irq_mng_init(0);
458 
459  /* Activate the page table mappings only after
460   * initializing interrupts because the irq_mng_init()
461   * routine needs to modify the text
462   */           
463  if (pt) {
464#ifdef  SHOW_MORE_INIT_SETTINGS
465    printk("Page table setup finished; will activate it NOW...\n");
466#endif
467    BSP_pgtbl_activate(pt);
468  }
469
470  /*
471   * Initialize VME bridge - needs working PCI
472   * and IRQ subsystems...
473   */
474#ifdef SHOW_MORE_INIT_SETTINGS
475  printk("Going to initialize VME bridge\n");
476#endif
477  /* VME initialization is in a separate file so apps which don't use
478   * VME or want a different configuration may link against a customized
479   * routine.
480   */
481  BSP_vme_config();
482
483#ifdef SHOW_MORE_INIT_SETTINGS
484  ShowBATS();
485  printk("Exit from bspstart\n");
486#endif 
487}
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