source: rtems/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c @ 3f0cfc56

4.104.114.84.95
Last change on this file since 3f0cfc56 was 3f0cfc56, checked in by Joel Sherrill <joel.sherrill@…>, on 03/11/07 at 15:24:18

2007-03-11 Joel Sherrill <joel@…>

  • startup/bspstart.c: Remove assignments of Cpu_table.do_zero_of_workspace to TRUE since TRUE is the default value in boot_card.c
  • Property mode set to 100644
File size: 14.1 KB
Line 
1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-1999.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  $Id$
15 */
16
17#include <string.h>
18
19#include <rtems/libio.h>
20#include <rtems/libcsupport.h>
21#include <bsp/consoleIo.h>
22#include <libcpu/spr.h>
23#include <bsp/residual.h>
24#include <bsp/pci.h>
25#include <bsp/openpic.h>
26#include <bsp/irq.h>
27#include <bsp/VME.h>
28#include <bsp.h>
29#include <libcpu/bat.h>
30#include <libcpu/pte121.h>
31#include <libcpu/cpuIdent.h>
32#include <bsp/vectors.h>
33#include <rtems/powerpc/powerpc.h>
34
35extern unsigned long __rtems_end[];
36extern void L1_caches_enables();
37extern unsigned get_L2CR();
38extern void set_L2CR(unsigned);
39extern void bsp_cleanup(void);
40extern Triv121PgTbl BSP_pgtbl_setup();
41extern void BSP_pgtbl_activate();
42extern void BSP_vme_config();
43unsigned int rsPMCQ1Init();
44
45SPR_RW(SPRG0)
46SPR_RW(SPRG1)
47
48void ShowBATS(){
49  uint32_t lower;
50  uint32_t upper;
51
52  __MFSPR(536, upper);
53  __MFSPR(537, lower);
54  printk("BAT0 %08x %08x\n", upper, lower );
55 
56  __MFSPR(538, upper);
57  __MFSPR(539, lower);
58  printk("BAT1 %08x %08x\n", upper, lower );
59                                                                                                                 
60  __MFSPR(540, upper);
61  __MFSPR(541, lower);
62  printk("BAT2 %08x %08x\n", upper, lower );
63                                                                                                                 
64  __MFSPR(542, upper);
65  __MFSPR(543, lower);
66  printk("BAT3 %08x %08x\n", upper, lower );
67                                                                                                                 
68}
69
70uint8_t LightIdx = 0;
71void BSP_Increment_Light(){
72  uint8_t data;
73  data = *GENERAL_REGISTER1;
74  data &= 0xf0;
75  data |= LightIdx++;
76  *GENERAL_REGISTER1 = data;
77}
78
79void BSP_Fatal_Fault_Light() {
80  uint8_t data;
81  data = *GENERAL_REGISTER1;
82  data &= 0xf0;
83  data |= 0x7;
84  while(1)
85    *GENERAL_REGISTER1 = data;
86}
87
88void write_to_Q2ram(int offset, unsigned int data )
89{
90printk("0x%x ==> %d\n", offset, data );
91#if 0
92  unsigned int *ptr = 0x82000000;
93  ptr += offset;
94  *ptr = data;
95#endif
96}
97
98/*
99 * Vital Board data Start using DATA RESIDUAL
100 */
101
102uint32_t VME_Slot1 = FALSE;
103
104/*
105 * Total memory.
106 * Note: RAM_END is defined in linkcmds.  We want to verify that the application
107 *       is only using 10M of memory, and we do this by only accounting for this
108 *       much memory.
109 */
110extern int   RAM_END; 
111unsigned int BSP_mem_size = (unsigned int)&RAM_END;
112
113/*
114 * PCI Bus Frequency
115 */
116unsigned int BSP_bus_frequency;
117
118/*
119 * processor clock frequency
120 */
121unsigned int BSP_processor_frequency;
122
123/*
124 * Time base divisior (how many tick for 1 second).
125 */
126unsigned int BSP_time_base_divisor = 1000;  /* XXX - Just a guess */
127
128/*
129 * system init stack and soft ir stack size
130 */
131#define INIT_STACK_SIZE 0x1000
132#define INTR_STACK_SIZE CONFIGURE_INTERRUPT_STACK_MEMORY
133
134void BSP_panic(char *s)
135{
136  printk("%s PANIC %s\n",_RTEMS_version, s);
137  __asm__ __volatile ("sc");
138}
139
140void _BSP_Fatal_error(unsigned int v)
141{
142  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
143  __asm__ __volatile ("sc");
144}
145 
146/*
147 *  The original table from the application and our copy of it with
148 *  some changes.
149 */
150
151extern rtems_configuration_table Configuration;
152
153rtems_configuration_table  BSP_Configuration;
154
155rtems_cpu_table Cpu_table;
156
157char *rtems_progname;
158
159int BSP_FLASH_Disable_writes(
160  uint32_t    area
161)
162{
163  unsigned char    data;
164 
165  data = *GENERAL_REGISTER1;
166  data |= DISABLE_USER_FLASH;
167  *GENERAL_REGISTER1 = data;
168                                                                           
169  return RTEMS_SUCCESSFUL;
170}
171
172int BSP_FLASH_Enable_writes(
173 uint32_t               area                           /* IN  */
174)
175{
176  unsigned char    data;
177                                                                                                                       
178  data = *GENERAL_REGISTER1;
179  data &= (~DISABLE_USER_FLASH);
180  *GENERAL_REGISTER1 = data;
181                                                                                                                       
182  return RTEMS_SUCCESSFUL;
183}
184
185void BSP_FLASH_set_page(
186  uint8_t  page
187)
188{
189  unsigned char  data;
190                                                                                                                       
191  /* Set the flash page register. */
192  data = *GENERAL_REGISTER2;
193  data &= ~(BSP_FLASH_PAGE_MASK);
194  data |= 0x80 | (page << BSP_FLASH_PAGE_SHIFT);
195  *GENERAL_REGISTER2 = data;
196}
197
198/*
199 *  Use the shared implementations of the following routines
200 */
201 
202void bsp_postdriver_hook(void);
203void bsp_libc_init( void *, uint32_t, int );
204
205/*
206 *  Function:   bsp_pretasking_hook
207 *  Created:    95/03/10
208 *
209 *  Description:
210 *      BSP pretasking hook.  Called just before drivers are initialized.
211 *      Used to setup libc and install any BSP extensions.
212 *
213 *  NOTES:
214 *      Must not use libc (to do io) from here, since drivers are
215 *      not yet initialized.
216 *
217 */
218 
219void bsp_pretasking_hook(void)
220{
221  uint32_t        heap_start;   
222  uint32_t        heap_size;
223  uint32_t        heap_sbrk_spared;
224
225  extern uint32_t _bsp_sbrk_init(uint32_t, uint32_t*);
226 
227  heap_start = ((uint32_t) __rtems_end) +INIT_STACK_SIZE + INTR_STACK_SIZE;
228  if (heap_start & (CPU_ALIGNMENT-1))
229    heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
230
231  heap_size = (BSP_mem_size - heap_start) - BSP_Configuration.work_space_size;
232
233  heap_sbrk_spared=_bsp_sbrk_init(heap_start, &heap_size);
234
235#ifdef SHOW_MORE_INIT_SETTINGS
236  printk(" HEAP start %x  size %x (%x bytes spared for sbrk)\n",
237    heap_start, heap_size, heap_sbrk_spared);
238#endif   
239
240  bsp_libc_init((void *) 0, heap_size, heap_sbrk_spared);
241  rsPMCQ1Init();
242
243#ifdef RTEMS_DEBUG
244  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
245#endif
246}
247
248void zero_bss()
249{
250  /* prevent these from being accessed in the short data areas */
251  extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[];
252  extern unsigned long __SBSS2_START__[], __SBSS2_END__[];
253  memset(__SBSS_START__, 0, ((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__));
254  memset(__SBSS2_START__, 0, ((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__));
255  memset(__bss_start, 0, ((unsigned) __rtems_end) - ((unsigned)__bss_start));
256}
257
258void save_boot_params(RESIDUAL* r3, void *r4, void* r5, char *additional_boot_options)
259{
260#if 0 
261  residualCopy = *r3;
262  strncpy(loaderParam, additional_boot_options, MAX_LOADER_ADD_PARM);
263  loaderParam[MAX_LOADER_ADD_PARM - 1] ='\0';
264#endif
265}
266
267unsigned int EUMBBAR;
268
269unsigned int get_eumbbar() {
270  register int a, e;
271
272  asm volatile( "lis %0,0xfec0; ori  %0,%0,0x0000": "=r" (a) );
273  asm volatile("sync");
274                                                               
275  asm volatile("lis %0,0x8000; ori %0,%0,0x0078": "=r"(e) );
276  asm volatile("stwbrx  %0,0x0,%1": "=r"(e): "r"(a)); 
277  asm volatile("sync");
278
279  asm volatile("lis %0,0xfee0; ori %0,%0,0x0000": "=r" (a) );
280  asm volatile("sync");
281                                                         
282  asm volatile("lwbrx %0,0x0,%1": "=r" (e): "r" (a));
283  asm volatile("isync");
284  return e;
285}
286
287void Read_ep1a_config_registers( ppc_cpu_id_t myCpu ) {
288  unsigned char value;
289
290  /*
291   * Print out the board and revision.
292   */
293
294  printk("Board:  ");
295  printk( get_ppc_cpu_type_name(myCpu) );
296
297  value = *BOARD_REVISION_REGISTER2 & HARDWARE_ID_MASK;
298  if ( value == HARDWARE_ID_PPC5_EP1A )
299    printk("  EP1A     ");
300  else if ( value == HARDWARE_ID_EP1B )
301    printk("  EP1B     ");
302  else
303    printk("  Unknown  ");
304 
305  value = *BOARD_REVISION_REGISTER2&0x1;
306  printk("Board ID %08x", value);
307  if(value == 0x0){
308    VME_Slot1 = TRUE;
309    printk("VME Slot 1\n");
310  }
311  else{
312    VME_Slot1 = FALSE;
313    printk("\n");
314  }
315
316  printk("Revision: ");
317  value = *BOARD_REVISION_REGISTER1;
318  printk("%d%c\n\n", value>>4, 'A'+(value&BUILD_REVISION_MASK) );
319
320  /*
321   * Get the CPU, XXX frequency
322   */
323  value = *EQUIPMENT_PRESENT_REGISTER2 & PLL_CFG_MASK;
324  switch( value ) {
325    case MHZ_33_66_200:     /* PCI, MEM, & CPU Frequency */
326      BSP_processor_frequency = 200000000;
327      BSP_bus_frequency       =  33000000;
328      break;
329    case MHZ_33_100_200:   /* PCI, MEM, & CPU Frequency */
330      BSP_processor_frequency = 200000000;
331      BSP_bus_frequency       =  33000000;
332      break;
333    case MHZ_33_66_266:    /* PCI, MEM, & CPU Frequency */
334      BSP_processor_frequency = 266000000;
335      BSP_bus_frequency       =  33000000;
336      break;
337    case MHZ_33_66_333:   /* PCI, MEM, & CPU Frequency */
338      BSP_processor_frequency = 333000000;
339      BSP_bus_frequency       =  33000000;
340      break;
341    case MHZ_33_100_333:   /* PCI, MEM, & CPU Frequency */
342      BSP_processor_frequency = 333000000;
343      BSP_bus_frequency       =  33000000;
344      break;
345    case MHZ_33_100_350:   /* PCI, MEM, & CPU Frequency */
346      BSP_processor_frequency = 350000000;
347      BSP_bus_frequency       =  33000000;
348      break;
349    default:
350      printk("ERROR: Unknown Processor frequency 0x%02x please fill in bspstart.c\n",value);
351      BSP_processor_frequency = 350000000;
352      BSP_bus_frequency       =  33000000;
353      break;
354  }
355}
356
357/*
358 *  bsp_start
359 *
360 *  This routine does the bulk of the system initialization.
361 */
362
363void bsp_start( void )
364{
365  unsigned char *stack;
366  register uint32_t  intrStack;
367  register uint32_t *intrStackPtr;
368  unsigned char *work_space_start;
369  ppc_cpu_id_t myCpu;
370  ppc_cpu_revision_t myCpuRevision;
371  Triv121PgTbl  pt=0;   /*  R = e; */
372
373  /*
374   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
375   * store the result in global variables so that it can be used latter...
376   */
377  BSP_Increment_Light();
378  myCpu         = get_ppc_cpu_type();
379  myCpuRevision = get_ppc_cpu_revision();
380
381  EUMBBAR = get_eumbbar();
382  printk("EUMBBAR 0x%08x\n", EUMBBAR );
383
384  /*
385   * Note this sets BSP_processor_frequency based upon register settings.
386   * It must be done prior to setting up hooks.
387   */
388  Read_ep1a_config_registers( myCpu );
389
390  /*
391   * Set up our hooks
392   * Make sure libc_init is done before drivers initialized so that
393   * they can use atexit()
394   */
395                                                                                                                   
396  Cpu_table.pretasking_hook      = bsp_pretasking_hook;    /* init libc, etc. */
397  Cpu_table.postdriver_hook      = bsp_postdriver_hook;
398  Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
399  Cpu_table.clicks_per_usec      = BSP_processor_frequency/(BSP_time_base_divisor * 1000);
400  Cpu_table.exceptions_in_RAM    = TRUE;
401
402ShowBATS();
403#if 0   /* XXX - Add back in cache enable when we get this up and running!! */
404  /*
405   * enables L1 Cache. Note that the L1_caches_enables() codes checks for
406   * relevant CPU type so that the reason why there is no use of myCpu...
407   */
408  L1_caches_enables();
409#endif
410
411  /*
412   * the initial stack  has aready been set to this value in start.S
413   * so there is no need to set it in r1 again... It is just for info
414   * so that It can be printed without accessing R1.
415   */
416  stack = ((unsigned char*) __rtems_end) + INIT_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE;
417
418 /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
419  *((uint32_t *)stack) = 0;
420
421  /*
422   * Initialize the interrupt related settings
423   * SPRG1 = software managed IRQ stack
424   *
425   * This could be done latter (e.g in IRQ_INIT) but it helps to understand
426   * some settings below...
427   */
428  intrStack = ((uint32_t) __rtems_end) +
429          INIT_STACK_SIZE + INTR_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE;
430
431  /* make sure it's properly aligned */
432  intrStack &= ~(CPU_STACK_ALIGNMENT-1);
433
434  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
435  intrStackPtr = (uint32_t*) intrStack;
436  *intrStackPtr = 0;
437
438  _write_SPRG1((unsigned int)intrStack);
439
440  /* signal them that we have fixed PR288 - eventually, this should go away */
441  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
442
443  /*
444   * Initialize default raw exception hanlders. See vectors/vectors_init.c
445   */
446  initialize_exceptions();
447
448  /*
449   * Init MMU block address translation to enable hardware
450   * access
451   */
452  setdbat(1, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE);
453  setdbat(3, 0x90000000, 0x90000000, 0x10000000, IO_PAGE);
454
455
456#ifdef SHOW_MORE_INIT_SETTINGS
457  printk("Going to start PCI buses scanning and initialization\n");
458#endif 
459  pci_initialize();
460
461#ifdef SHOW_MORE_INIT_SETTINGS
462  printk("Number of PCI buses found is : %d\n", pci_bus_count());
463#endif
464#ifdef TEST_RAW_EXCEPTION_CODE 
465  printk("Testing exception handling Part 1\n");
466
467  /*
468   * Cause a software exception
469   */
470  __asm__ __volatile ("sc");
471
472  /*
473   * Check we can still catch exceptions and returned coorectly.
474   */
475  printk("Testing exception handling Part 2\n");
476  __asm__ __volatile ("sc");
477#endif 
478
479#ifdef SHOW_MORE_INIT_SETTINGS
480  printk("BSP_Configuration.work_space_size = %x\n", BSP_Configuration.work_space_size);
481#endif 
482  work_space_start =
483    (unsigned char *)BSP_mem_size - BSP_Configuration.work_space_size;
484
485  if ( work_space_start <= ((unsigned char *)__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE) {
486    printk( "bspstart: Not enough RAM!!!\n" );
487    bsp_cleanup();
488  }
489
490  BSP_Configuration.work_space_start = work_space_start;
491
492  /*
493   * Initalize RTEMS IRQ system
494   */
495  BSP_rtems_irq_mng_init(0);
496 
497  /* Activate the page table mappings only after
498   * initializing interrupts because the irq_mng_init()
499   * routine needs to modify the text
500   */           
501  if (pt) {
502#ifdef  SHOW_MORE_INIT_SETTINGS
503    printk("Page table setup finished; will activate it NOW...\n");
504#endif
505    BSP_pgtbl_activate(pt);
506  }
507
508  /*
509   * Initialize VME bridge - needs working PCI
510   * and IRQ subsystems...
511   */
512#ifdef SHOW_MORE_INIT_SETTINGS
513  printk("Going to initialize VME bridge\n");
514#endif
515  /* VME initialization is in a separate file so apps which don't use
516   * VME or want a different configuration may link against a customized
517   * routine.
518   */
519  BSP_vme_config();
520
521#ifdef SHOW_MORE_INIT_SETTINGS
522  ShowBATS();
523  printk("Exit from bspstart\n");
524#endif 
525}
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