source: rtems/c/src/lib/libbsp/powerpc/ep1a/start/start.S @ 7a4c4f4

4.115
Last change on this file since 7a4c4f4 was 1c554014, checked in by Ralf Corsépius <ralf.corsepius@…>, on 07/19/12 at 14:14:53

Remove CVS-Ids.
  • Property mode set to 100644
File size: 3.6 KB
Line 
1/*
2 * This is based on the mvme-crt0.S file from libgloss/rs6000.
3 * crt0.S -- startup file for PowerPC systems.
4 *
5 * (c) 1998, Radstone Technology plc.
6 *
7 *
8 * This is an unpublished work the copyright  in  which   vests
9 * in  Radstone Technology plc.  All rights reserved.
10 *
11 * The information contained herein is the property of Radstone
12 * Technology  plc.  and  is  supplied  without  liability  for
13 * errors or omissions and no part may be reproduced,  used  or
14 * disclosed except as authorized by contract or  other written
15 * permission.     The    copyright    and    the     foregoing
16 * restriction   on  reproduction, use and disclosure extend to
17 * all  the   media   in   which   this  information   may   be
18 * embodied.
19 *
20 * Copyright (c) 1995 Cygnus Support
21 *
22 * The authors hereby grant permission to use, copy, modify, distribute,
23 * and license this software and its documentation for any purpose, provided
24 * that existing copyright notices are retained in all copies and that this
25 * notice is included verbatim in any distributions. No written agreement,
26 * license, or royalty fee is required for any of the authorized uses.
27 * Modifications to this software may be copyrighted by their authors
28 * and need not follow the licensing terms described here, provided that
29 * the new terms are clearly indicated on the first page of each file where
30 * they apply.
31 */
32/*
33#include <ppc-asm.h>
34#include <bsp.h>
35*/
36
37#include <rtems/asm.h>
38#include <rtems/score/cpu.h>
39#include <libcpu/io.h>
40#include <ppc-asm.h>
41
42#define H0_60X_ICE      0x8000     /*  HID0 I-Cache Enable */
43#define H0_60X_DCE      0x4000     /*  HID0 D-Cache Enable */
44
45        .file   "start.s"
46
47        .extern FUNC_NAME(atexit)
48        .globl  FUNC_NAME(__atexit)
49        .section ".sdata","aw"
50        .align  2
51FUNC_NAME(__atexit):                    /* tell C's eabi-ctor's we have an atexit function */
52        .long   FUNC_NAME(atexit)@fixup /* and that it is to register __do_global_dtors */
53
54        .section ".fixup","aw"
55        .align  2
56        .long   FUNC_NAME(__atexit)
57
58        .text
59        .globl  __rtems_entry_point
60        .type   __rtems_entry_point,@function
61__rtems_entry_point:
62
63        /* Set MSR */
64        /*
65         * Enable data and instruction address translation and floating point
66         */
67        li      r3,MSR_IR | MSR_DR | MSR_FP
68        mtmsr   r3
69
70        /* XXX - ADD BACK IN CACHING INSTRUCTIONS */
71
72        /* clear bss */
73        lis     r6,__bss_start@h
74        ori     r6,r6,__bss_start@l
75        lis     r7,__bss_end@h
76        ori     r7,r7,__bss_end@l
77
78        cmplw   1,r6,r7
79        bc      4,4,.Lbss_done
80
81        subf    r8,r6,r7                /* number of bytes to zero */
82        srwi    r9,r8,2                 /* number of words to zero */
83        mtctr   r9
84        li      r0,0                    /* zero to clear memory */
85        addi    r6,r6,-4                /* adjust so we can use stwu */
86.Lbss_loop:
87        stwu    r0,4(r6)                /* zero bss */
88        bdnz    .Lbss_loop
89
90.Lbss_done:
91
92        /* clear sbss */
93        lis     r6,__sbss_start@h
94        ori     r6,r6,__sbss_start@l
95        lis     r7,__sbss_end@h
96        ori     r7,r7,__sbss_end@l
97
98        cmplw   1,r6,r7
99        bc      4,4,.Lsbss_done
100
101        subf    r8,r6,r7                /* number of bytes to zero */
102        srwi    r9,r8,2                 /* number of words to zero */
103        mtctr   r9
104        li      r0,0                    /* zero to clear memory */
105        addi    r6,r6,-4                /* adjust so we can use stwu */
106.Lsbss_loop:
107        stwu    r0,4(r6)                /* zero sbss */
108        bdnz    .Lsbss_loop
109
110.Lsbss_done:
111
112        lis     sp,__stack@h
113        ori     sp,sp,__stack@l
114
115        /* set up initial stack frame */
116        addi    sp,sp,-4                /* make sure we don't overwrite debug mem */
117        lis     r0,0
118        stw     r0,0(sp)                /* clear back chain */
119        stwu    sp,-56(sp)              /* push another stack frame */
120
121        li      r3, 0                   /* command line */
122
123        /* Let her rip */
124        bl      FUNC_NAME(boot_card)
125
126        /*
127         * This should never get reached
128         */
129        /*
130         * Return MSR to its reset state
131         */
132        li      r3,0
133        mtmsr   r3
134        isync
135
136        /*
137         * Call reset entry point
138         */
139        lis     r3,0xfff0
140        ori     r3,r3,0x100
141        mtlr    r3
142        blr
143.Lstart:
144        .size   __rtems_entry_point,.Lstart-__rtems_entry_point
145
146        .comm   environ,4,4
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