source: rtems/c/src/lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c @ de49de6

4.104.115
Last change on this file since de49de6 was de49de6, checked in by Joel Sherrill <joel.sherrill@…>, on 10/02/08 at 17:27:07

2008-10-02 Joel Sherrill <joel.sherrill@…>

  • console/config.c, console/console.c, console/console.h, console/ns16550cfg.c, console/ns16550cfg.h, include/bsp.h, include/tm27.h, irq/irq_init.c, irq/openpic_xxx_irq.c, pci/no_host_bridge.c: File head clean up.
  • console/debugio.c: Removed.
  • Property mode set to 100644
File size: 7.2 KB
Line 
1/*
2 *  This file contains the i8259/openpic-specific implementation of
3 *  the function described in irq.h
4 *
5 *  Copyright (C) 1998, 1999 valette@crf.canon.fr
6 *
7 *  The license and distribution terms for this file may be
8 *  found in found in the file LICENSE in this distribution or at
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 *  $Id$
12 */
13
14#include <stdlib.h>
15
16#include <bsp.h>
17#include <bsp/irq.h>
18#include <bsp/irq_supp.h>
19#include <bsp/VMEConfig.h>
20#include <bsp/openpic.h>
21#include <libcpu/raw_exception.h>
22#include <libcpu/io.h>
23#include <bsp/vectors.h>
24#include <stdlib.h>
25
26#include <rtems/bspIo.h> /* for printk */
27#define RAVEN_INTR_ACK_REG 0xfeff0030
28
29#ifdef BSP_PCI_ISA_BRIDGE_IRQ
30/*
31 * pointer to the mask representing the additionnal irq vectors
32 * that must be disabled when a particular entry is activated.
33 * They will be dynamically computed from the priority table given
34 * in BSP_rtems_irq_mngt_set();
35 * CAUTION : this table is accessed directly by interrupt routine
36 *           prologue.
37 */
38rtems_i8259_masks       irq_mask_or_tbl[BSP_IRQ_NUMBER];
39#endif
40
41/*
42 * default handler connected on each irq after bsp initialization
43 */
44static rtems_irq_connect_data   default_rtems_entry;
45
46static rtems_irq_connect_data*          rtems_hdl_tbl;
47
48#ifdef BSP_PCI_ISA_BRIDGE_IRQ
49/*
50 * Check if IRQ is an ISA IRQ
51 */
52static inline int is_isa_irq(const rtems_irq_number irqLine)
53{
54  return (((int) irqLine <= BSP_ISA_IRQ_MAX_OFFSET) &
55          ((int) irqLine >= BSP_ISA_IRQ_LOWEST_OFFSET)
56         );
57}
58#endif
59
60/*
61 * Check if IRQ is an OPENPIC IRQ
62 */
63static inline int is_pci_irq(const rtems_irq_number irqLine)
64{
65  return (((int) irqLine <= BSP_PCI_IRQ_MAX_OFFSET) &
66          ((int) irqLine >= BSP_PCI_IRQ_LOWEST_OFFSET)
67         );
68}
69
70/*
71 * ------------------------ RTEMS Irq helper functions ----------------
72 */
73
74#ifdef BSP_PCI_ISA_BRIDGE_IRQ
75/*
76 * Caution : this function assumes the variable "*config"
77 * is already set and that the tables it contains are still valid
78 * and accessible.
79 */
80static void compute_i8259_masks_from_prio (rtems_irq_global_settings* config)
81{
82  int i;
83  int j;
84  /*
85   * Always mask at least current interrupt to prevent re-entrance
86   */
87  for (i=BSP_ISA_IRQ_LOWEST_OFFSET; i < BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER; i++) {
88    * ((unsigned short*) &irq_mask_or_tbl[i]) = (1 << i);
89    for (j = BSP_ISA_IRQ_LOWEST_OFFSET; j < BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER; j++) {
90      /*
91       * Mask interrupts at i8259 level that have a lower priority
92       */
93      if (config->irqPrioTbl [i] > config->irqPrioTbl [j]) {
94        * ((unsigned short*) &irq_mask_or_tbl[i]) |= (1 << j);
95      }
96    }
97  }
98}
99#endif
100
101void
102BSP_enable_irq_at_pic(const rtems_irq_number name)
103{
104#ifdef BSP_PCI_ISA_BRIDGE_IRQ
105    if (is_isa_irq(name)) {
106      /*
107       * Enable interrupt at PIC level
108       */
109printk("ERROR BSP_irq_enable_at_i8259s Being Called for %d\n", (int)name);
110      BSP_irq_enable_at_i8259s ((int) name);
111    }
112#endif
113   
114    if (is_pci_irq(name)) {
115      /*
116       * Enable interrupt at OPENPIC level
117       */
118printk(" openpic_enable_irq %d\n", (int)name );
119       openpic_enable_irq ((int) name);
120    }
121}
122
123int
124BSP_disable_irq_at_pic(const rtems_irq_number name)
125{
126#ifdef BSP_PCI_ISA_BRIDGE_IRQ
127    if (is_isa_irq(name)) {
128      /*
129       * disable interrupt at PIC level
130       */
131      return BSP_irq_disable_at_i8259s ((int) name);
132    }
133#endif
134    if (is_pci_irq(name)) {
135      /*
136       * disable interrupt at OPENPIC level
137       */
138      return openpic_disable_irq ((int) name );
139    }
140        return -1;
141}
142
143/*
144 * RTEMS Global Interrupt Handler Management Routines
145 */
146int BSP_setup_the_pic(rtems_irq_global_settings* config)
147{
148    int i;
149   /*
150    * Store various code accelerators
151    */
152    default_rtems_entry = config->defaultEntry;
153    rtems_hdl_tbl               = config->irqHdlTbl;
154
155    /*
156     * set up internal tables used by rtems interrupt prologue
157     */
158#if 0
159#ifdef BSP_PCI_ISA_BRIDGE_IRQ
160    /*
161     * start with ISA IRQ
162     */
163    compute_i8259_masks_from_prio (config);
164
165    for (i=BSP_ISA_IRQ_LOWEST_OFFSET; i < BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER; i++) {
166      if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
167         BSP_irq_enable_at_i8259s (i);
168      }
169      else {
170         BSP_irq_disable_at_i8259s (i);
171      }
172    }
173
174        if ( BSP_ISA_IRQ_NUMBER > 0 ) {
175        /*
176                 * must enable slave pic anyway
177                 */
178                BSP_irq_enable_at_i8259s (2);
179        }
180#endif
181#endif
182
183    /*
184     * continue with PCI IRQ
185     */
186    for (i=BSP_PCI_IRQ_LOWEST_OFFSET; i < BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER ; i++) {
187      /*
188       * Note that openpic_set_priority() sets the TASK priority of the PIC
189       */
190      openpic_set_source_priority(i - BSP_PCI_IRQ_LOWEST_OFFSET,
191                                  config->irqPrioTbl[i]);
192      if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
193         openpic_enable_irq ((int) i );
194      }
195      else {
196         openpic_disable_irq ((int) i );
197      }
198    }
199
200#ifdef BSP_PCI_ISA_BRIDGE_IRQ
201        if ( BSP_ISA_IRQ_NUMBER > 0 ) {
202        /*
203             * Must enable PCI/ISA bridge IRQ
204             */
205        openpic_enable_irq (0);
206        }
207#endif
208
209    return 1;
210}
211
212int _BSP_vme_bridge_irq = -1;
213
214unsigned BSP_spuriousIntr = 0;
215
216/*
217 * High level IRQ handler called from shared_raw_irq_code_entry
218 */
219int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum)
220{
221  register unsigned int irq;
222#ifdef BSP_PCI_ISA_BRIDGE_IRQ
223  register unsigned isaIntr;                  /* boolean */
224  register unsigned oldMask = 0;              /* old isa pic masks */
225  register unsigned newMask;                  /* new isa pic masks */
226#endif
227
228  if (excNum == ASM_DEC_VECTOR) {
229/* printk("ASM_DEC_VECTOR\n"); */
230        bsp_irq_dispatch_list(rtems_hdl_tbl, BSP_DECREMENTER, default_rtems_entry.hdl);
231
232    return 0;
233
234  }
235  irq = openpic_irq(0);
236  if (irq == OPENPIC_VEC_SPURIOUS) {
237/* printk("OPENPIC_VEC_SPURIOUS interrupt %d\n", OPENPIC_VEC_SPURIOUS ); */
238     ++BSP_spuriousIntr;
239    return 0;
240  }
241
242  /* some BSPs might want to use a different numbering... */
243  irq = irq - OPENPIC_VEC_SOURCE + BSP_PCI_IRQ_LOWEST_OFFSET;
244/* printk("OpenPic Irq: %d\n", irq); */
245
246#ifdef BSP_PCI_ISA_BRIDGE_IRQ
247  isaIntr = (irq == BSP_PCI_ISA_BRIDGE_IRQ);
248  if (isaIntr)  {
249/* printk("BSP_PCI_ISA_BRIDGE_IRQ\n"); */
250    /*
251     * Acknowledge and read 8259 vector
252     */
253    irq = (unsigned int) (*(unsigned char *) RAVEN_INTR_ACK_REG);
254    /*
255     * store current PIC mask
256     */
257    oldMask = i8259s_cache;
258    newMask = oldMask | irq_mask_or_tbl [irq];
259    i8259s_cache = newMask;
260    outport_byte(PIC_MASTER_IMR_IO_PORT, i8259s_cache & 0xff);
261    outport_byte(PIC_SLAVE_IMR_IO_PORT, ((i8259s_cache & 0xff00) >> 8));
262    BSP_irq_ack_at_i8259s (irq);
263    openpic_eoi(0);
264  }
265#endif
266
267
268  /* dispatch handlers */
269/* printk("dispatch\n"); */
270irq -=16;
271  bsp_irq_dispatch_list(rtems_hdl_tbl, irq, default_rtems_entry.hdl);
272/* printk("Back from dispatch\n"); */
273
274#ifdef BSP_PCI_ISA_BRIDGE_IRQ
275  if (isaIntr)  {\
276    i8259s_cache = oldMask;
277    outport_byte(PIC_MASTER_IMR_IO_PORT, i8259s_cache & 0xff);
278    outport_byte(PIC_SLAVE_IMR_IO_PORT, ((i8259s_cache & 0xff00) >> 8));
279  }
280  else
281#endif
282  {
283#ifdef BSP_PCI_VME_DRIVER_DOES_EOI
284        /* leave it to the VME bridge driver to do EOI, so
285     * it can re-enable the openpic while handling
286     * VME interrupts (-> VME priorities in software)
287         */
288        if (_BSP_vme_bridge_irq != irq)
289#endif
290                openpic_eoi(0);
291  }
292  return 0;
293}
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