source: rtems/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c @ 8b3b2ef

4.104.114.84.9
Last change on this file since 8b3b2ef was 8b3b2ef, checked in by Jennifer Averett <Jennifer.Averett@…>, on May 4, 2005 at 7:26:19 PM

2005-05-04 Jennifer Averett <jennifer.averett@…>

  • irq/irq_init.c, startup/bspstart.c: Name modification for generic pci interface
  • Property mode set to 100644
File size: 10.1 KB
Line 
1/* irq_init.c
2 *
3 *  This file contains the implementation of rtems initialization
4 *  related to interrupt handling.
5 *
6 *  CopyRight (C) 1999 valette@crf.canon.fr
7 *
8 * Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com>
9 * to make it valid for MVME2300 Motorola boards.
10 *
11 * Till Straumann <strauman@slac.stanford.edu>, 12/20/2001:
12 * Use the new interface to openpic_init
13 *
14 *  COPYRIGHT (c) 1989-1999.
15 *  On-Line Applications Research Corporation (OAR).
16 *
17 *  The license and distribution terms for this file may be
18 *  found in the file LICENSE in this distribution or at
19 *  http://www.rtems.com/license/LICENSE.
20 *
21 *  $Id$
22 */
23
24#include <libcpu/io.h>
25#include <libcpu/spr.h>
26#include <bsp/pci.h>
27#include <bsp/residual.h>
28#include <bsp/openpic.h>
29#include <bsp/irq.h>
30#include <bsp.h>
31#include <libcpu/raw_exception.h>
32#include <bsp/motorola.h>
33#include <rtems/bspIo.h>
34
35/*
36#define SHOW_ISA_PCI_BRIDGE_SETTINGS
37*/
38
39typedef struct {
40  unsigned char bus;    /* few chance the PCI/ISA bridge is not on first bus but ... */
41  unsigned char device;
42  unsigned char function;
43} pci_isa_bridge_device;
44
45pci_isa_bridge_device* via_82c586 = 0;
46static pci_isa_bridge_device bridge;
47
48extern unsigned int external_exception_vector_prolog_code_size[];
49extern void external_exception_vector_prolog_code();
50extern unsigned int decrementer_exception_vector_prolog_code_size[];
51extern void decrementer_exception_vector_prolog_code();
52
53/*
54 * default on/off function
55 */
56static void nop_func(){}
57/*
58 * default isOn function
59 */
60static int not_connected() {return 0;}
61/*
62 * default possible isOn function
63 */
64static int connected() {return 1;}
65
66static rtems_irq_connect_data           rtemsIrq[BSP_IRQ_NUMBER];
67static rtems_irq_global_settings        initial_config;
68static rtems_irq_connect_data           defaultIrq = {
69  /* vectorIdex,         hdl            , handle        , on            , off           , isOn */
70  0,                     nop_func       , NULL          , nop_func      , nop_func      , not_connected
71};
72static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={
73  /*
74   * actual rpiorities for interrupt :
75   *    0   means that only current interrupt is masked
76   *    255 means all other interrupts are masked
77   */
78  /*
79   * ISA interrupts.
80   * The second entry has a priority of 255 because
81   * it is the slave pic entry and is should always remain
82   * unmasked.
83   */
84  0,0,
85  255,
86  0, 0, 0, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,
87  /*
88   * PCI Interrupts
89   */
90  8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, /* for raven prio 0 means unactive... */
91  /*
92   * Processor exceptions handled as interrupts
93   */
94  0
95};
96
97static unsigned char mcp750_openpic_initpolarities[] = {
98    1,  /*  0 8259 cascade */
99    0,  /*  1 all the rest of them */
100    0,  /*  2 all the rest of them */
101    0,  /*  3 all the rest of them */
102    0,  /*  4 all the rest of them */
103    0,  /*  5 all the rest of them */
104    0,  /*  6 all the rest of them */
105    0,  /*  7 all the rest of them */
106    0,  /*  8 all the rest of them */
107    0,  /*  9 all the rest of them */
108    0,  /* 10 all the rest of them */
109    0,  /* 11 all the rest of them */
110    0,  /* 12 all the rest of them */
111    0,  /* 13 all the rest of them */
112    0,  /* 14 all the rest of them */
113    0,  /* 15 all the rest of them */
114    0,  /* 16 all the rest of them */
115    0,  /* 17 all the rest of them */
116    1,  /* 18 all the rest of them */
117    1,  /* 19 all the rest of them */
118    1,  /* 20 all the rest of them */
119    1,  /* 21 all the rest of them */
120    1,  /* 22 all the rest of them */
121    1,  /* 23 all the rest of them */
122    1,  /* 24 all the rest of them */
123    1,  /* 25 all the rest of them */
124};
125
126static unsigned char mcp750_openpic_initsenses[] = {
127    1,  /* 0 MCP750_INT_PCB(8259) */
128    0,  /* 1 MCP750_INT_FALCON_ECC_ERR */
129    1,  /* 2 MCP750_INT_PCI_ETHERNET */
130    1,  /* 3 MCP750_INT_PCI_PMC */
131    1,  /* 4 MCP750_INT_PCI_WATCHDOG_TIMER1 */
132    1,  /* 5 MCP750_INT_PCI_PRST_SIGNAL */
133    1,  /* 6 MCP750_INT_PCI_FALL_SIGNAL */
134    1,  /* 7 MCP750_INT_PCI_DEG_SIGNAL */
135    1,  /* 8 MCP750_INT_PCI_BUS1_INTA */
136    1,  /* 9 MCP750_INT_PCI_BUS1_INTB */
137    1,  /*10 MCP750_INT_PCI_BUS1_INTC */
138    1,  /*11 MCP750_INT_PCI_BUS1_INTD */
139    1,  /*12 MCP750_INT_PCI_BUS2_INTA */
140    1,  /*13 MCP750_INT_PCI_BUS2_INTB */
141    1,  /*14 MCP750_INT_PCI_BUS2_INTC */
142    1,  /*15 MCP750_INT_PCI_BUS2_INTD */
143    1,
144    1, 
145    1,
146    1,
147    1,
148    1,
149    1,
150    1,
151    1,
152    1
153};
154
155void VIA_isa_bridge_interrupts_setup(void)
156{
157  pci_isa_bridge_device pci_dev;
158  unsigned int temp;
159  unsigned char tmp;
160  unsigned char maxBus;
161  unsigned found = 0;
162
163  maxBus = pci_bus_count();
164  pci_dev.function      = 0; /* Assumes the bidge is the first function */
165     
166  for (pci_dev.bus = 0; pci_dev.bus < maxBus; pci_dev.bus++) {
167#ifdef SCAN_PCI_PRINT       
168    printk("isa_bridge_interrupts_setup: Scanning bus %d\n", pci_dev.bus);
169#endif       
170    for (pci_dev.device = 0; pci_dev.device < PCI_MAX_DEVICES; pci_dev.device++) {
171#ifdef SCAN_PCI_PRINT       
172      printk("isa_bridge_interrupts_setup: Scanning device %d\n", pci_dev.device);
173#endif       
174      pci_read_config_dword(pci_dev.bus, pci_dev.device,  pci_dev.function,
175                               PCI_VENDOR_ID, &temp);
176#ifdef SCAN_PCI_PRINT       
177      printk("Vendor/device = %x\n", temp);
178#endif
179      if ((temp == (((unsigned short) PCI_VENDOR_ID_VIA) | (PCI_DEVICE_ID_VIA_82C586_0 << 16)))
180         ) {
181        bridge = pci_dev;
182        via_82c586 = &bridge;
183#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS     
184        /*
185         * Should print : bus = 0, device = 11, function = 0 on a MCP750.
186         */
187        printk("Via PCI/ISA bridge found at bus = %d, device = %d, function = %d\n",
188               via_82c586->bus,
189               via_82c586->device,
190               via_82c586->function);
191#endif       
192        found = 1;
193        goto loop_exit;
194           
195      }
196    }
197  }
198loop_exit:
199  if (!found) BSP_panic("VIA_82C586 PCI/ISA bridge not found!n");
200     
201  tmp = inb(0x810);
202  if  ( !(tmp & 0x2)) {
203#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS     
204    printk("This is a second generation MCP750 board\n");
205    printk("We must reprogram the PCI/ISA bridge...\n");
206#endif       
207    pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
208                         0x47,  &tmp);
209#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS     
210    printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp);
211#endif       
212    /*
213     * Enable 4D0/4D1 ISA interrupt level/edge config registers
214     */
215    tmp |= 0x20;
216    pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
217                          0x47, tmp);
218    /*
219     * Now program the ISA interrupt edge/level
220     */
221    tmp = ELCRS_INT9_LVL | ELCRS_INT10_LVL | ELCRS_INT11_LVL;
222    outb(tmp, ISA8259_S_ELCR);
223    tmp = ELCRM_INT5_LVL;
224    outb(tmp, ISA8259_M_ELCR);;
225    /*
226     * Set the Interrupt inputs to non-inverting level interrupt
227     */
228    pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
229                            0x54, &tmp);
230#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS     
231    printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp);
232#endif       
233    tmp = 0;
234    pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
235                          0x54, tmp);
236  }
237  else {
238#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS     
239    printk("This is a first generation MCP750 board\n");
240    printk("We just show the actual value used by PCI/ISA bridge\n");
241#endif       
242    pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
243                         0x47,  &tmp);
244#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS     
245    printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp);
246#endif       
247    /*
248     * Show the Interrupt inputs inverting/non-inverting level status
249     */
250    pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
251                         0x54, &tmp);
252#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS     
253    printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp);
254#endif       
255  }
256}
257
258  /*
259   * This code assumes the exceptions management setup has already
260   * been done. We just need to replace the exceptions that will
261   * be handled like interrupt. On mcp750/mpc750 and many PPC processors
262   * this means the decrementer exception and the external exception.
263   */
264void BSP_rtems_irq_mng_init(unsigned cpuId)
265{
266  rtems_raw_except_connect_data vectorDesc;
267  int i;
268
269  /*
270   * First initialize the Interrupt management hardware
271   */
272#ifdef TRACE_IRQ_INIT 
273  printk("Going to initialize openpic compliant device\n");
274#endif       
275  openpic_init(1, mcp750_openpic_initpolarities, mcp750_openpic_initsenses);
276
277#ifdef TRACE_IRQ_INIT 
278  printk("Going to initialize the PCI/ISA bridge IRQ related setting (VIA 82C586)\n");
279#endif
280
281  /*
282   * Initialize Rtems management interrupt table
283   */
284    /*
285     * re-init the rtemsIrq table
286     */
287    for (i = 0; i < BSP_IRQ_NUMBER; i++) {
288      rtemsIrq[i]      = defaultIrq;
289      rtemsIrq[i].name = i;
290    }
291    /*
292     * Init initial Interrupt management config
293     */
294    initial_config.irqNb        = BSP_IRQ_NUMBER;
295    initial_config.defaultEntry = defaultIrq;
296    initial_config.irqHdlTbl    = rtemsIrq;
297    initial_config.irqBase      = BSP_ASM_IRQ_VECTOR_BASE;
298    initial_config.irqPrioTbl   = irqPrioTable;
299
300    if (!BSP_rtems_irq_mngt_set(&initial_config)) {
301      /*
302       * put something here that will show the failure...
303       */
304      BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
305    }
306 
307  /*
308   * We must connect the raw irq handler for the two
309   * expected interrupt sources : decrementer and external interrupts.
310   */
311    vectorDesc.exceptIndex      =       ASM_DEC_VECTOR;
312    vectorDesc.hdl.vector       =       ASM_DEC_VECTOR;
313    vectorDesc.hdl.raw_hdl      =       decrementer_exception_vector_prolog_code;
314    vectorDesc.hdl.raw_hdl_size =       (unsigned) decrementer_exception_vector_prolog_code_size;
315    vectorDesc.on               =       nop_func;
316    vectorDesc.off              =       nop_func;
317    vectorDesc.isOn             =       connected;
318    if (!mpc60x_set_exception (&vectorDesc)) {
319      BSP_panic("Unable to initialize RTEMS decrementer raw exception\n");
320    }
321    vectorDesc.exceptIndex      =       ASM_EXT_VECTOR;
322    vectorDesc.hdl.vector       =       ASM_EXT_VECTOR;
323    vectorDesc.hdl.raw_hdl      =       external_exception_vector_prolog_code;
324    vectorDesc.hdl.raw_hdl_size =       (unsigned) external_exception_vector_prolog_code_size;
325    if (!mpc60x_set_exception (&vectorDesc)) {
326      BSP_panic("Unable to initialize RTEMS external raw exception\n");
327    }
328#ifdef TRACE_IRQ_INIT 
329    printk("RTEMS IRQ management is now operationnal\n");
330#endif
331}
332
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