[0329aae] | 1 | /* irq_init.c |
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| 2 | * |
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| 3 | * This file contains the implementation of rtems initialization |
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| 4 | * related to interrupt handling. |
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| 5 | * |
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| 6 | * CopyRight (C) 1999 valette@crf.canon.fr |
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| 7 | * |
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| 8 | * Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com> |
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| 9 | * to make it valid for MVME2300 Motorola boards. |
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| 10 | * |
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| 11 | * Till Straumann <strauman@slac.stanford.edu>, 12/20/2001: |
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| 12 | * Use the new interface to openpic_init |
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| 13 | * |
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| 14 | * COPYRIGHT (c) 1989-1999. |
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| 15 | * On-Line Applications Research Corporation (OAR). |
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| 16 | * |
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| 17 | * The license and distribution terms for this file may be |
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| 18 | * found in the file LICENSE in this distribution or at |
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| 19 | * http://www.rtems.com/license/LICENSE. |
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| 20 | * |
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| 21 | * $Id$ |
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| 22 | */ |
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| 23 | |
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| 24 | #include <libcpu/io.h> |
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| 25 | #include <libcpu/spr.h> |
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| 26 | #include <bsp/pci.h> |
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| 27 | #include <bsp/residual.h> |
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| 28 | #include <bsp/openpic.h> |
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| 29 | #include <bsp/irq.h> |
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| 30 | #include <bsp.h> |
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| 31 | #include <libcpu/raw_exception.h> |
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| 32 | #include <bsp/motorola.h> |
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| 33 | #include <rtems/bspIo.h> |
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| 34 | |
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| 35 | /* |
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| 36 | #define SHOW_ISA_PCI_BRIDGE_SETTINGS |
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| 37 | */ |
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| 38 | |
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| 39 | typedef struct { |
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| 40 | unsigned char bus; /* few chance the PCI/ISA bridge is not on first bus but ... */ |
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| 41 | unsigned char device; |
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| 42 | unsigned char function; |
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| 43 | } pci_isa_bridge_device; |
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| 44 | |
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| 45 | pci_isa_bridge_device* via_82c586 = 0; |
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| 46 | static pci_isa_bridge_device bridge; |
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| 47 | |
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| 48 | extern unsigned int external_exception_vector_prolog_code_size[]; |
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| 49 | extern void external_exception_vector_prolog_code(); |
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| 50 | extern unsigned int decrementer_exception_vector_prolog_code_size[]; |
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| 51 | extern void decrementer_exception_vector_prolog_code(); |
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| 52 | |
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| 53 | /* |
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| 54 | * default on/off function |
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| 55 | */ |
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| 56 | static void nop_func(){} |
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| 57 | /* |
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| 58 | * default isOn function |
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| 59 | */ |
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| 60 | static int not_connected() {return 0;} |
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| 61 | /* |
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| 62 | * default possible isOn function |
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| 63 | */ |
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| 64 | static int connected() {return 1;} |
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| 65 | |
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| 66 | static rtems_irq_connect_data rtemsIrq[BSP_IRQ_NUMBER]; |
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| 67 | static rtems_irq_global_settings initial_config; |
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| 68 | static rtems_irq_connect_data defaultIrq = { |
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| 69 | /* vectorIdex, hdl , handle , on , off , isOn */ |
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| 70 | 0, nop_func , NULL , nop_func , nop_func , not_connected |
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| 71 | }; |
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| 72 | static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={ |
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| 73 | /* |
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| 74 | * actual rpiorities for interrupt : |
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| 75 | * 0 means that only current interrupt is masked |
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| 76 | * 255 means all other interrupts are masked |
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| 77 | */ |
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| 78 | /* |
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| 79 | * ISA interrupts. |
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| 80 | * The second entry has a priority of 255 because |
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| 81 | * it is the slave pic entry and is should always remain |
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| 82 | * unmasked. |
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| 83 | */ |
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| 84 | 0,0, |
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| 85 | 255, |
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| 86 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
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| 87 | /* |
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| 88 | * PCI Interrupts |
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| 89 | */ |
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| 90 | 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, /* for raven prio 0 means unactive... */ |
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| 91 | /* |
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| 92 | * Processor exceptions handled as interrupts |
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| 93 | */ |
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| 94 | 0 |
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| 95 | }; |
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| 96 | |
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| 97 | static unsigned char mcp750_openpic_initpolarities[] = { |
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| 98 | 1, /* 0 8259 cascade */ |
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| 99 | 0, /* 1 all the rest of them */ |
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| 100 | 0, /* 2 all the rest of them */ |
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| 101 | 0, /* 3 all the rest of them */ |
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| 102 | 0, /* 4 all the rest of them */ |
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| 103 | 0, /* 5 all the rest of them */ |
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| 104 | 0, /* 6 all the rest of them */ |
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| 105 | 0, /* 7 all the rest of them */ |
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| 106 | 0, /* 8 all the rest of them */ |
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| 107 | 0, /* 9 all the rest of them */ |
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| 108 | 0, /* 10 all the rest of them */ |
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| 109 | 0, /* 11 all the rest of them */ |
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| 110 | 0, /* 12 all the rest of them */ |
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| 111 | 0, /* 13 all the rest of them */ |
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| 112 | 0, /* 14 all the rest of them */ |
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| 113 | 0, /* 15 all the rest of them */ |
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| 114 | 0, /* 16 all the rest of them */ |
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| 115 | 0, /* 17 all the rest of them */ |
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| 116 | 1, /* 18 all the rest of them */ |
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| 117 | 1, /* 19 all the rest of them */ |
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| 118 | 1, /* 20 all the rest of them */ |
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| 119 | 1, /* 21 all the rest of them */ |
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| 120 | 1, /* 22 all the rest of them */ |
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| 121 | 1, /* 23 all the rest of them */ |
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| 122 | 1, /* 24 all the rest of them */ |
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| 123 | 1, /* 25 all the rest of them */ |
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| 124 | }; |
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| 125 | |
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| 126 | static unsigned char mcp750_openpic_initsenses[] = { |
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| 127 | 1, /* 0 MCP750_INT_PCB(8259) */ |
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| 128 | 0, /* 1 MCP750_INT_FALCON_ECC_ERR */ |
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| 129 | 1, /* 2 MCP750_INT_PCI_ETHERNET */ |
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| 130 | 1, /* 3 MCP750_INT_PCI_PMC */ |
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| 131 | 1, /* 4 MCP750_INT_PCI_WATCHDOG_TIMER1 */ |
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| 132 | 1, /* 5 MCP750_INT_PCI_PRST_SIGNAL */ |
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| 133 | 1, /* 6 MCP750_INT_PCI_FALL_SIGNAL */ |
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| 134 | 1, /* 7 MCP750_INT_PCI_DEG_SIGNAL */ |
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| 135 | 1, /* 8 MCP750_INT_PCI_BUS1_INTA */ |
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| 136 | 1, /* 9 MCP750_INT_PCI_BUS1_INTB */ |
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| 137 | 1, /*10 MCP750_INT_PCI_BUS1_INTC */ |
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| 138 | 1, /*11 MCP750_INT_PCI_BUS1_INTD */ |
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| 139 | 1, /*12 MCP750_INT_PCI_BUS2_INTA */ |
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| 140 | 1, /*13 MCP750_INT_PCI_BUS2_INTB */ |
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| 141 | 1, /*14 MCP750_INT_PCI_BUS2_INTC */ |
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| 142 | 1, /*15 MCP750_INT_PCI_BUS2_INTD */ |
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| 143 | 1, |
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| 144 | 1, |
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| 145 | 1, |
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| 146 | 1, |
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| 147 | 1, |
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| 148 | 1, |
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| 149 | 1, |
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| 150 | 1, |
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| 151 | 1, |
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| 152 | 1 |
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| 153 | }; |
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| 154 | |
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| 155 | void VIA_isa_bridge_interrupts_setup(void) |
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| 156 | { |
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| 157 | pci_isa_bridge_device pci_dev; |
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| 158 | unsigned int temp; |
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| 159 | unsigned char tmp; |
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| 160 | unsigned char maxBus; |
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| 161 | unsigned found = 0; |
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| 162 | |
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[8b3b2ef] | 163 | maxBus = pci_bus_count(); |
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[0329aae] | 164 | pci_dev.function = 0; /* Assumes the bidge is the first function */ |
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| 165 | |
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| 166 | for (pci_dev.bus = 0; pci_dev.bus < maxBus; pci_dev.bus++) { |
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| 167 | #ifdef SCAN_PCI_PRINT |
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| 168 | printk("isa_bridge_interrupts_setup: Scanning bus %d\n", pci_dev.bus); |
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| 169 | #endif |
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| 170 | for (pci_dev.device = 0; pci_dev.device < PCI_MAX_DEVICES; pci_dev.device++) { |
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| 171 | #ifdef SCAN_PCI_PRINT |
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| 172 | printk("isa_bridge_interrupts_setup: Scanning device %d\n", pci_dev.device); |
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| 173 | #endif |
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| 174 | pci_read_config_dword(pci_dev.bus, pci_dev.device, pci_dev.function, |
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| 175 | PCI_VENDOR_ID, &temp); |
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| 176 | #ifdef SCAN_PCI_PRINT |
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| 177 | printk("Vendor/device = %x\n", temp); |
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| 178 | #endif |
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| 179 | if ((temp == (((unsigned short) PCI_VENDOR_ID_VIA) | (PCI_DEVICE_ID_VIA_82C586_0 << 16))) |
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| 180 | ) { |
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| 181 | bridge = pci_dev; |
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| 182 | via_82c586 = &bridge; |
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| 183 | #ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS |
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| 184 | /* |
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| 185 | * Should print : bus = 0, device = 11, function = 0 on a MCP750. |
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| 186 | */ |
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| 187 | printk("Via PCI/ISA bridge found at bus = %d, device = %d, function = %d\n", |
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| 188 | via_82c586->bus, |
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| 189 | via_82c586->device, |
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| 190 | via_82c586->function); |
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| 191 | #endif |
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| 192 | found = 1; |
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| 193 | goto loop_exit; |
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| 194 | |
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| 195 | } |
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| 196 | } |
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| 197 | } |
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| 198 | loop_exit: |
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| 199 | if (!found) BSP_panic("VIA_82C586 PCI/ISA bridge not found!n"); |
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| 200 | |
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| 201 | tmp = inb(0x810); |
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| 202 | if ( !(tmp & 0x2)) { |
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| 203 | #ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS |
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| 204 | printk("This is a second generation MCP750 board\n"); |
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| 205 | printk("We must reprogram the PCI/ISA bridge...\n"); |
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| 206 | #endif |
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| 207 | pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, |
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| 208 | 0x47, &tmp); |
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| 209 | #ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS |
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| 210 | printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp); |
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| 211 | #endif |
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| 212 | /* |
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| 213 | * Enable 4D0/4D1 ISA interrupt level/edge config registers |
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| 214 | */ |
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| 215 | tmp |= 0x20; |
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| 216 | pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, |
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| 217 | 0x47, tmp); |
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| 218 | /* |
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| 219 | * Now program the ISA interrupt edge/level |
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| 220 | */ |
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| 221 | tmp = ELCRS_INT9_LVL | ELCRS_INT10_LVL | ELCRS_INT11_LVL; |
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| 222 | outb(tmp, ISA8259_S_ELCR); |
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| 223 | tmp = ELCRM_INT5_LVL; |
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| 224 | outb(tmp, ISA8259_M_ELCR);; |
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| 225 | /* |
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| 226 | * Set the Interrupt inputs to non-inverting level interrupt |
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| 227 | */ |
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| 228 | pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, |
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| 229 | 0x54, &tmp); |
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| 230 | #ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS |
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| 231 | printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp); |
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| 232 | #endif |
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| 233 | tmp = 0; |
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| 234 | pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, |
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| 235 | 0x54, tmp); |
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| 236 | } |
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| 237 | else { |
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| 238 | #ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS |
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| 239 | printk("This is a first generation MCP750 board\n"); |
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| 240 | printk("We just show the actual value used by PCI/ISA bridge\n"); |
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| 241 | #endif |
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| 242 | pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, |
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| 243 | 0x47, &tmp); |
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| 244 | #ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS |
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| 245 | printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp); |
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| 246 | #endif |
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| 247 | /* |
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| 248 | * Show the Interrupt inputs inverting/non-inverting level status |
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| 249 | */ |
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| 250 | pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, |
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| 251 | 0x54, &tmp); |
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| 252 | #ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS |
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| 253 | printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp); |
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| 254 | #endif |
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| 255 | } |
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| 256 | } |
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| 257 | |
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| 258 | /* |
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| 259 | * This code assumes the exceptions management setup has already |
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| 260 | * been done. We just need to replace the exceptions that will |
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| 261 | * be handled like interrupt. On mcp750/mpc750 and many PPC processors |
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| 262 | * this means the decrementer exception and the external exception. |
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| 263 | */ |
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| 264 | void BSP_rtems_irq_mng_init(unsigned cpuId) |
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| 265 | { |
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| 266 | rtems_raw_except_connect_data vectorDesc; |
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| 267 | int i; |
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| 268 | |
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| 269 | /* |
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| 270 | * First initialize the Interrupt management hardware |
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| 271 | */ |
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| 272 | #ifdef TRACE_IRQ_INIT |
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| 273 | printk("Going to initialize openpic compliant device\n"); |
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| 274 | #endif |
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| 275 | openpic_init(1, mcp750_openpic_initpolarities, mcp750_openpic_initsenses); |
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| 276 | |
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| 277 | #ifdef TRACE_IRQ_INIT |
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| 278 | printk("Going to initialize the PCI/ISA bridge IRQ related setting (VIA 82C586)\n"); |
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| 279 | #endif |
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| 280 | |
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| 281 | /* |
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| 282 | * Initialize Rtems management interrupt table |
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| 283 | */ |
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| 284 | /* |
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| 285 | * re-init the rtemsIrq table |
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| 286 | */ |
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| 287 | for (i = 0; i < BSP_IRQ_NUMBER; i++) { |
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| 288 | rtemsIrq[i] = defaultIrq; |
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| 289 | rtemsIrq[i].name = i; |
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| 290 | } |
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| 291 | /* |
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| 292 | * Init initial Interrupt management config |
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| 293 | */ |
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| 294 | initial_config.irqNb = BSP_IRQ_NUMBER; |
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| 295 | initial_config.defaultEntry = defaultIrq; |
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| 296 | initial_config.irqHdlTbl = rtemsIrq; |
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| 297 | initial_config.irqBase = BSP_ASM_IRQ_VECTOR_BASE; |
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| 298 | initial_config.irqPrioTbl = irqPrioTable; |
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| 299 | |
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| 300 | if (!BSP_rtems_irq_mngt_set(&initial_config)) { |
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| 301 | /* |
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| 302 | * put something here that will show the failure... |
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| 303 | */ |
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| 304 | BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n"); |
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| 305 | } |
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| 306 | |
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| 307 | /* |
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| 308 | * We must connect the raw irq handler for the two |
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| 309 | * expected interrupt sources : decrementer and external interrupts. |
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| 310 | */ |
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| 311 | vectorDesc.exceptIndex = ASM_DEC_VECTOR; |
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| 312 | vectorDesc.hdl.vector = ASM_DEC_VECTOR; |
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| 313 | vectorDesc.hdl.raw_hdl = decrementer_exception_vector_prolog_code; |
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| 314 | vectorDesc.hdl.raw_hdl_size = (unsigned) decrementer_exception_vector_prolog_code_size; |
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| 315 | vectorDesc.on = nop_func; |
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| 316 | vectorDesc.off = nop_func; |
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| 317 | vectorDesc.isOn = connected; |
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| 318 | if (!mpc60x_set_exception (&vectorDesc)) { |
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| 319 | BSP_panic("Unable to initialize RTEMS decrementer raw exception\n"); |
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| 320 | } |
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| 321 | vectorDesc.exceptIndex = ASM_EXT_VECTOR; |
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| 322 | vectorDesc.hdl.vector = ASM_EXT_VECTOR; |
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| 323 | vectorDesc.hdl.raw_hdl = external_exception_vector_prolog_code; |
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| 324 | vectorDesc.hdl.raw_hdl_size = (unsigned) external_exception_vector_prolog_code_size; |
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| 325 | if (!mpc60x_set_exception (&vectorDesc)) { |
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| 326 | BSP_panic("Unable to initialize RTEMS external raw exception\n"); |
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| 327 | } |
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| 328 | #ifdef TRACE_IRQ_INIT |
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| 329 | printk("RTEMS IRQ management is now operationnal\n"); |
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| 330 | #endif |
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| 331 | } |
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| 332 | |
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