1 | /* This file contains the termios TTY driver for the |
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2 | * Motorola MC68360 SCC ports. |
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3 | */ |
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4 | |
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5 | /* |
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6 | * COPYRIGHT (c) 1989-2008. |
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7 | * On-Line Applications Research Corporation (OAR). |
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8 | * |
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9 | * The license and distribution terms for this file may be |
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10 | * found in the file LICENSE in this distribution or at |
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11 | * http://www.rtems.org/license/LICENSE. |
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12 | */ |
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13 | |
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14 | #include <stdio.h> |
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15 | #include <termios.h> |
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16 | #include <bsp.h> |
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17 | #include <libcpu/io.h> |
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18 | #include <rtems/libio.h> |
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19 | #include <bsp/pci.h> |
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20 | #include <bsp/irq.h> |
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21 | #include <libchip/serial.h> |
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22 | #include "m68360.h" |
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23 | #include <libchip/sersupp.h> |
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24 | #include <stdlib.h> |
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25 | #include <rtems/bspIo.h> |
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26 | #include <string.h> |
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27 | |
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28 | /* #define DEBUG_360 */ |
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29 | |
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30 | #if 1 /* XXX */ |
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31 | int EP1A_READ_LENGTH_GREATER_THAN_1 = 0; |
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32 | |
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33 | #define MC68360_LENGTH_SIZE 400 |
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34 | int mc68360_length_array[ MC68360_LENGTH_SIZE ]; |
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35 | int mc68360_length_count=0; |
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36 | #endif |
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37 | |
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38 | |
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39 | M68360_t M68360_chips = NULL; |
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40 | |
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41 | #define SYNC eieio |
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42 | #define mc68360_scc_Is_422( _minor ) \ |
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43 | (Console_Port_Tbl[minor]->sDeviceName[7] == '4' ) |
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44 | |
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45 | static void scc_write8( |
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46 | const char *name, |
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47 | volatile uint8_t *address, |
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48 | uint8_t value |
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49 | ) |
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50 | { |
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51 | #ifdef DEBUG_360 |
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52 | printk( "WR8 %s 0x%08x 0x%02x\n", name, address, value ); |
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53 | #endif |
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54 | *address = value; |
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55 | } |
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56 | |
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57 | static uint16_t scc_read16( |
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58 | const char *name, |
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59 | volatile uint16_t *address |
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60 | ) |
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61 | { |
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62 | uint16_t value; |
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63 | |
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64 | #ifdef DEBUG_360 |
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65 | printk( "RD16 %s 0x%08x ", name, address ); |
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66 | #endif |
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67 | value = *address; |
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68 | #ifdef DEBUG_360 |
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69 | printk( "0x%04x\n", value ); |
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70 | #endif |
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71 | |
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72 | return value; |
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73 | } |
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74 | |
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75 | static void scc_write16( |
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76 | const char *name, |
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77 | volatile uint16_t *address, |
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78 | uint16_t value |
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79 | ) |
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80 | { |
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81 | #ifdef DEBUG_360 |
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82 | printk( "WR16 %s 0x%08x 0x%04x\n", name, address, value ); |
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83 | #endif |
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84 | *address = value; |
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85 | } |
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86 | |
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87 | static uint32_t scc_read32( |
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88 | const char *name, |
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89 | volatile uint32_t *address |
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90 | ) |
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91 | { |
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92 | uint32_t value; |
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93 | |
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94 | #ifdef DEBUG_360 |
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95 | printk( "RD32 %s 0x%08x ", name, address ); |
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96 | #endif |
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97 | value = *address; |
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98 | #ifdef DEBUG_360 |
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99 | printk( "0x%08x\n", value ); |
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100 | #endif |
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101 | |
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102 | return value; |
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103 | } |
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104 | |
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105 | static void scc_write32( |
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106 | const char *name, |
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107 | volatile uint32_t *address, |
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108 | uint32_t value |
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109 | ) |
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110 | { |
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111 | #ifdef DEBUG_360 |
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112 | printk( "WR32 %s 0x%08x 0x%08x\n", name, address, value ); |
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113 | #endif |
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114 | *address = value; |
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115 | } |
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116 | |
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117 | #define TX_BUFFER_ADDRESS( _ptr ) \ |
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118 | ((char *)ptr->txBuf - (char *)ptr->chip->board_data->baseaddr) |
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119 | #define RX_BUFFER_ADDRESS( _ptr ) \ |
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120 | ((char *)ptr->rxBuf - (char *)ptr->chip->board_data->baseaddr) |
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121 | |
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122 | |
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123 | /************************************************************************** |
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124 | * Function: mc68360_sccBRGC * |
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125 | ************************************************************************** |
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126 | * Description: * |
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127 | * * |
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128 | * This function is called to compute the divisor register values for * |
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129 | * a given baud rate. * |
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130 | * * |
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131 | * * |
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132 | * Inputs: * |
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133 | * * |
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134 | * int baud - Baud rate (in bps). * |
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135 | * * |
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136 | * Output: * |
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137 | * * |
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138 | * int - baud rate generator configuration. * |
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139 | * * |
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140 | **************************************************************************/ |
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141 | static int |
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142 | mc68360_sccBRGC(int baud, int m360_clock_rate) |
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143 | { |
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144 | int data; |
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145 | |
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146 | /* |
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147 | * configure baud rate generator for 16x bit rate, where..... |
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148 | * b = desired baud rate |
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149 | * clk = system clock (33mhz) |
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150 | * d = clock dividor value |
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151 | * |
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152 | * for b > 300 : d = clk/(b*16) |
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153 | * for b<= 300 : d = (clk/ (b*16*16))-1) |
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154 | */ |
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155 | |
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156 | SYNC(); |
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157 | if( baud > 300 ) data = 33333333 / (baud * 16 ); |
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158 | else data = (33333333 / (baud * 16 * 16) ) - 1; |
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159 | data *= 2; |
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160 | data &= 0x00001ffe ; |
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161 | |
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162 | /* really data = 0x010000 | data | ((baud>300)? 0 : 1 ) ; */ |
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163 | data |= ((baud>300)? 0 : 1 ) ; |
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164 | data |= 0x010000 ; |
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165 | |
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166 | return data; |
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167 | } |
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168 | |
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169 | |
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170 | /************************************************************************** |
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171 | * Function: sccInterruptHandler * |
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172 | ************************************************************************** |
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173 | * Description: * |
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174 | * * |
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175 | * This is the interrupt service routine for the console UART. It * |
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176 | * handles both receive and transmit interrupts. The bulk of the * |
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177 | * work is done by termios. * |
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178 | * * |
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179 | * Inputs: * |
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180 | * * |
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181 | * chip - structure of chip specific information * |
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182 | * * |
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183 | * Output: * |
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184 | * * |
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185 | * none * |
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186 | * * |
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187 | **************************************************************************/ |
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188 | void mc68360_sccInterruptHandler( M68360_t chip ) |
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189 | { |
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190 | volatile m360_t *m360; |
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191 | int port; |
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192 | uint16_t status; |
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193 | uint16_t length; |
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194 | int i; |
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195 | char data; |
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196 | int clear_isr; |
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197 | |
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198 | |
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199 | #ifdef DEBUG_360 |
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200 | printk("mc68360_sccInterruptHandler\n"); |
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201 | #endif |
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202 | for (port=0; port<4; port++) { |
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203 | |
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204 | clear_isr = FALSE; |
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205 | m360 = chip->m360; |
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206 | |
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207 | /* |
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208 | * XXX - Can we add something here to check if this is our interrupt. |
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209 | * XXX - We need a parameter here so that we know which 360 instead of |
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210 | * looping through them all! |
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211 | */ |
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212 | |
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213 | /* |
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214 | * Handle a RX interrupt. |
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215 | */ |
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216 | if ( scc_read16("scce", &chip->port[port].pSCCR->scce) & 0x1) |
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217 | { |
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218 | clear_isr = TRUE; |
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219 | scc_write16("scce", &chip->port[port].pSCCR->scce, 0x1 ); |
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220 | status =scc_read16( "sccRxBd->status", &chip->port[port].sccRxBd->status); |
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221 | while ((status & M360_BD_EMPTY) == 0) |
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222 | { |
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223 | length= scc_read16("sccRxBd->length",&chip->port[port].sccRxBd->length); |
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224 | if (length > 1) |
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225 | EP1A_READ_LENGTH_GREATER_THAN_1 = length; |
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226 | |
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227 | for (i=0;i<length;i++) { |
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228 | data= chip->port[port].rxBuf[i]; |
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229 | rtems_termios_enqueue_raw_characters( |
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230 | Console_Port_Data[ chip->port[port].minor ].termios_data, |
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231 | &data, |
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232 | 1); |
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233 | } |
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234 | scc_write16( "sccRxBd->status", &chip->port[port].sccRxBd->status, |
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235 | M360_BD_EMPTY | M360_BD_WRAP | M360_BD_INTERRUPT ); |
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236 | status =scc_read16( "sccRxBd->status", &chip->port[port].sccRxBd->status); |
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237 | } |
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238 | } |
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239 | |
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240 | /* |
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241 | * Handle a TX interrupt. |
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242 | */ |
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243 | if (scc_read16("scce", &chip->port[port].pSCCR->scce) & 0x2) |
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244 | { |
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245 | clear_isr = TRUE; |
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246 | scc_write16("scce", &chip->port[port].pSCCR->scce, 0x2); |
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247 | status = scc_read16("sccTxBd->status", &chip->port[port].sccTxBd->status); |
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248 | if ((status & M360_BD_EMPTY) == 0) |
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249 | { |
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250 | scc_write16("sccTxBd->status",&chip->port[port].sccTxBd->status,0); |
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251 | #if 1 |
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252 | rtems_termios_dequeue_characters( |
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253 | Console_Port_Data[chip->port[port].minor].termios_data, |
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254 | chip->port[port].sccTxBd->length); |
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255 | #else |
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256 | mc68360_scc_write_support_int(chip->port[port].minor,"*****", 5); |
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257 | #endif |
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258 | } |
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259 | } |
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260 | |
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261 | /* |
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262 | * Clear SCC interrupt-in-service bit. |
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263 | */ |
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264 | if ( clear_isr ) |
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265 | scc_write32( "cisr", &m360->cisr, (0x80000000 >> chip->port[port].channel) ); |
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266 | } |
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267 | } |
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268 | |
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269 | /* |
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270 | * mc68360_scc_open |
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271 | * |
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272 | * This function opens a port for communication. |
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273 | * |
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274 | * Default state is 9600 baud, 8 bits, No parity, and 1 stop bit. |
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275 | */ |
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276 | static int mc68360_scc_open( |
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277 | int major, |
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278 | int minor, |
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279 | void * arg |
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280 | ) |
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281 | { |
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282 | M68360_serial_ports_t ptr; |
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283 | volatile m360_t *m360; |
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284 | uint32_t data; |
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285 | |
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286 | #ifdef DEBUG_360 |
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287 | printk("mc68360_scc_open %d\n", minor); |
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288 | #endif |
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289 | |
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290 | |
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291 | ptr = Console_Port_Tbl[minor]->pDeviceParams; |
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292 | m360 = ptr->chip->m360; |
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293 | |
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294 | /* |
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295 | * Enable the receiver and the transmitter. |
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296 | */ |
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297 | |
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298 | SYNC(); |
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299 | data = scc_read32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l); |
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300 | scc_write32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l, |
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301 | (data | M360_GSMR_ENR | M360_GSMR_ENT) ); |
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302 | |
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303 | data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_MASK ); |
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304 | data &= (~PMCQ1_INT_MASK_QUICC); |
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305 | PMCQ1_Write_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_MASK, data ); |
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306 | |
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307 | data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_STATUS ); |
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308 | data &= (~PMCQ1_INT_STATUS_QUICC); |
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309 | PMCQ1_Write_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_STATUS, data ); |
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310 | |
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311 | return RTEMS_SUCCESSFUL; |
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312 | } |
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313 | |
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314 | uint32_t mc68360_scc_calculate_pbdat( M68360_t chip ) |
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315 | { |
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316 | uint32_t i; |
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317 | uint32_t pbdat_data; |
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318 | int minor; |
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319 | uint32_t type422data[4] = { |
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320 | 0x00440, 0x00880, 0x10100, 0x20200 |
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321 | }; |
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322 | |
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323 | pbdat_data = 0x3; |
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324 | for (i=0; i<4; i++) { |
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325 | minor = chip->port[i].minor; |
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326 | if mc68360_scc_Is_422( minor ) |
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327 | pbdat_data |= type422data[i]; |
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328 | } |
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329 | |
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330 | return pbdat_data; |
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331 | } |
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332 | |
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333 | /* |
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334 | * mc68360_scc_initialize_interrupts |
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335 | * |
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336 | * This routine initializes the console's receive and transmit |
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337 | * ring buffers and loads the appropriate vectors to handle the interrupts. |
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338 | */ |
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339 | |
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340 | void mc68360_scc_initialize_interrupts(int minor) |
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341 | { |
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342 | M68360_serial_ports_t ptr; |
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343 | volatile m360_t *m360; |
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344 | uint32_t data; |
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345 | uint32_t buffers_start; |
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346 | uint32_t tmp_u32; |
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347 | |
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348 | #ifdef DEBUG_360 |
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349 | printk("mc68360_scc_initialize_interrupts: minor %d\n", minor ); |
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350 | printk("Console_Port_Tbl[minor]->pDeviceParams 0x%08x\n", |
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351 | Console_Port_Tbl[minor]->pDeviceParams ); |
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352 | #endif |
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353 | |
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354 | ptr = Console_Port_Tbl[minor]->pDeviceParams; |
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355 | m360 = ptr->chip->m360; |
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356 | |
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357 | #ifdef DEBUG_360 |
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358 | printk("m360 0x%08x baseaddr 0x%08x\n", |
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359 | m360, ptr->chip->board_data->baseaddr); |
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360 | #endif |
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361 | |
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362 | buffers_start = ptr->chip->board_data->baseaddr + 0x00200000 + |
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363 | ( (M68360_RX_BUF_SIZE + M68360_TX_BUF_SIZE) * (ptr->channel-1)); |
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364 | ptr->rxBuf = (uint8_t *) buffers_start; |
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365 | ptr->txBuf = (uint8_t *)(buffers_start + M68360_RX_BUF_SIZE); |
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366 | #ifdef DEBUG_360 |
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367 | printk("rxBuf 0x%08x txBuf 0x%08x\n", ptr->rxBuf, ptr->txBuf ); |
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368 | #endif |
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369 | /* |
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370 | * Set Channel Drive Enable bits in EPLD |
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371 | */ |
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372 | data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_DRIVER_ENABLE ); |
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373 | SYNC(); |
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374 | data = data & ~(PMCQ1_DRIVER_ENABLE_3 | PMCQ1_DRIVER_ENABLE_2 | |
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375 | PMCQ1_DRIVER_ENABLE_1 | PMCQ1_DRIVER_ENABLE_0); |
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376 | PMCQ1_Write_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_DRIVER_ENABLE, data); |
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377 | data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_DRIVER_ENABLE ); |
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378 | SYNC(); |
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379 | |
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380 | /* |
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381 | * Disable the receiver and the transmitter. |
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382 | */ |
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383 | |
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384 | SYNC(); |
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385 | tmp_u32 = scc_read32( "gsmr_l", &ptr->pSCCR->gsmr_l ); |
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386 | tmp_u32 &= (~(M360_GSMR_ENR | M360_GSMR_ENT ) ) ; |
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387 | scc_write32( "gsmr_l", &ptr->pSCCR->gsmr_l, tmp_u32 ); |
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388 | |
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389 | /* |
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390 | * Disable Interrupt Error and Interrupt Breakpoint |
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391 | * Set SAID to 4 XXX - Shouldn't it be 7 for slave mode |
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392 | * Set SAISM to 7 |
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393 | */ |
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394 | SYNC(); |
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395 | scc_write16( "sdcr", &m360->sdcr, 0x0740 ); |
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396 | |
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397 | /* |
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398 | * Clear status -- reserved interrupt, SDMA channel error, SDMA breakpoint |
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399 | */ |
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400 | scc_write8( "sdsr", &m360->sdsr, 0x07 ); |
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401 | SYNC(); |
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402 | |
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403 | /* |
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404 | * Initialize timer information in RISC Controller Configuration Register |
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405 | */ |
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406 | scc_write16( "rccr", &m360->rccr, 0x8100 ); |
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407 | SYNC(); |
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408 | |
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409 | /* |
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410 | * XXX |
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411 | */ |
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412 | scc_write16( "papar", &m360->papar, 0xffff ); |
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413 | scc_write16( "padir", &m360->padir, 0x5500 ); /* From Memo */ |
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414 | scc_write16( "paodr", &m360->paodr, 0x0000 ); |
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415 | SYNC(); |
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416 | |
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417 | /* |
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418 | * XXX |
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419 | */ |
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420 | |
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421 | #if 0 |
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422 | scc_write32( "pbpar", &m360->pbpar, 0x00000000 ); |
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423 | scc_write32( "pbdir", &m360->pbdir, 0x0003ffff ); |
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424 | scc_write32( "pbdat", &m360->pbdat, 0x0000003f ); |
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425 | SYNC(); |
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426 | #else |
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427 | data = mc68360_scc_calculate_pbdat( ptr->chip ); |
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428 | scc_write32( "pbpar", &m360->pbpar, 0x00000000 ); |
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429 | scc_write32( "pbdat", &m360->pbdat, data ); |
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430 | SYNC(); |
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431 | scc_write32( "pbdir", &m360->pbdir, 0x0003fc3 ); |
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432 | SYNC(); |
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433 | #endif |
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434 | |
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435 | |
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436 | /* |
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437 | * XXX |
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438 | */ |
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439 | scc_write16( "pcpar", &m360->pcpar, 0x0000 ); |
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440 | scc_write16( "pcdir", &m360->pcdir, 0x0000 ); |
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441 | scc_write16( "pcso", &m360->pcso, 0x0000 ); |
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442 | SYNC(); |
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443 | |
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444 | /* |
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445 | * configure baud rate generator for 16x bit rate, where..... |
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446 | * b = desired baud rate |
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447 | * clk = system clock (33mhz) |
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448 | * d = clock dividor value |
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449 | * |
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450 | * for b > 300 : d = clk/(b*16) |
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451 | * for b<= 300 : d = (clk/ (b*16*16))-1) |
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452 | */ |
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453 | SYNC(); |
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454 | if( ptr->baud > 300 ) data = 33333333 / (ptr->baud * 16 ); |
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455 | else data = (33333333 / (ptr->baud * 16 * 16) ) - 1; |
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456 | data *= 2 ; |
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457 | data &= 0x00001ffe ; |
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458 | |
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459 | /* really data = 0x010000 | data | ((baud>300)? 0 : 1 ) ; */ |
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460 | data |= ((ptr->baud>300)? 0 : 1 ) ; |
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461 | data |= 0x010000 ; |
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462 | |
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463 | scc_write32( "pBRGC", ptr->pBRGC, data ); |
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464 | |
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465 | data = (((ptr->channel-1)*8) | (ptr->channel-1)) ; |
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466 | data = data << ((ptr->channel-1)*8) ; |
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467 | data |= scc_read32( "sicr", &m360->sicr ); |
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468 | scc_write32( "sicr", &m360->sicr, data ); |
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469 | |
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470 | /* |
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471 | * initialise SCC parameter ram |
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472 | */ |
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473 | SYNC(); |
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474 | scc_write16( "pSCCB->rbase", &ptr->pSCCB->rbase, |
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475 | (char *)(ptr->sccRxBd) - (char *)m360 ); |
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476 | scc_write16( "pSCCB->tbase", &ptr->pSCCB->tbase, |
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477 | (char *)(ptr->sccTxBd) - (char *)m360 ); |
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478 | |
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479 | scc_write8( "pSCCB->rfcr", &ptr->pSCCB->rfcr, 0x15 ); /* 0x15 0x18 */ |
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480 | scc_write8( "pSCCB->tfcr", &ptr->pSCCB->tfcr, 0x15 ); /* 0x15 0x18 */ |
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481 | |
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482 | scc_write16( "pSCCB->mrblr", &ptr->pSCCB->mrblr, M68360_RX_BUF_SIZE ); |
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483 | |
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484 | /* |
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485 | * initialise tx and rx scc parameters |
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486 | */ |
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487 | SYNC(); |
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488 | data = M360_CR_INIT_TX_RX_PARAMS | 0x01; |
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489 | data |= (M360_CR_CH_NUM * (ptr->channel-1) ); |
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490 | scc_write16( "CR", &m360->cr, data ); |
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491 | |
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492 | /* |
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493 | * initialise uart specific parameter RAM |
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494 | */ |
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495 | SYNC(); |
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496 | scc_write16( "pSCCB->un.uart.max_idl", &ptr->pSCCB->un.uart.max_idl, 15000 ); |
---|
497 | scc_write16( "pSCCB->un.uart.brkcr", &ptr->pSCCB->un.uart.brkcr, 0x0001 ); |
---|
498 | scc_write16( "pSCCB->un.uart.parec", &ptr->pSCCB->un.uart.parec, 0x0000 ); |
---|
499 | |
---|
500 | scc_write16( "pSCCB->un,uart.frmec", &ptr->pSCCB->un.uart.frmec, 0x0000 ); |
---|
501 | |
---|
502 | scc_write16( "pSCCB->un.uart.nosec", &ptr->pSCCB->un.uart.nosec, 0x0000 ); |
---|
503 | scc_write16( "pSCCB->un.uart.brkec", &ptr->pSCCB->un.uart.brkec, 0x0000 ); |
---|
504 | scc_write16( "pSCCB->un.uart.uaddr0", &ptr->pSCCB->un.uart.uaddr[0], 0x0000 ); |
---|
505 | scc_write16( "pSCCB->un.uart.uaddr1", &ptr->pSCCB->un.uart.uaddr[1], 0x0000 ); |
---|
506 | scc_write16( "pSCCB->un.uart.toseq", &ptr->pSCCB->un.uart.toseq, 0x0000 ); |
---|
507 | scc_write16( "pSCCB->un.uart.char0", |
---|
508 | &ptr->pSCCB->un.uart.character[0], 0x0039 ); |
---|
509 | scc_write16( "pSCCB->un.uart.char1", |
---|
510 | &ptr->pSCCB->un.uart.character[1], 0x8000 ); |
---|
511 | scc_write16( "pSCCB->un.uart.char2", |
---|
512 | &ptr->pSCCB->un.uart.character[2], 0x8000 ); |
---|
513 | scc_write16( "pSCCB->un.uart.char3", |
---|
514 | &ptr->pSCCB->un.uart.character[3], 0x8000 ); |
---|
515 | scc_write16( "pSCCB->un.uart.char4", |
---|
516 | &ptr->pSCCB->un.uart.character[4], 0x8000 ); |
---|
517 | scc_write16( "pSCCB->un.uart.char5", |
---|
518 | &ptr->pSCCB->un.uart.character[5], 0x8000 ); |
---|
519 | scc_write16( "pSCCB->un.uart.char6", |
---|
520 | &ptr->pSCCB->un.uart.character[6], 0x8000 ); |
---|
521 | scc_write16( "pSCCB->un.uart.char7", |
---|
522 | &ptr->pSCCB->un.uart.character[7], 0x8000 ); |
---|
523 | |
---|
524 | scc_write16( "pSCCB->un.uart.rccm", &ptr->pSCCB->un.uart.rccm, 0xc0ff ); |
---|
525 | |
---|
526 | /* |
---|
527 | * setup buffer descriptor stuff |
---|
528 | */ |
---|
529 | SYNC(); |
---|
530 | scc_write16( "sccRxBd->status", &ptr->sccRxBd->status, 0x0000 ); |
---|
531 | SYNC(); |
---|
532 | scc_write16( "sccRxBd->length", &ptr->sccRxBd->length, 0x0000 ); |
---|
533 | scc_write16( "sccRxBd->status", &ptr->sccRxBd->status, |
---|
534 | M360_BD_EMPTY | M360_BD_WRAP | M360_BD_INTERRUPT ); |
---|
535 | /* XXX Radstone Example writes RX buffer ptr as two u16's */ |
---|
536 | scc_write32( "sccRxBd->buffer", &ptr->sccRxBd->buffer, |
---|
537 | RX_BUFFER_ADDRESS( ptr ) ); |
---|
538 | |
---|
539 | SYNC(); |
---|
540 | scc_write16( "sccTxBd->status", &ptr->sccTxBd->status, 0x0000 ); |
---|
541 | SYNC(); |
---|
542 | scc_write16( "sccTxBd->length", &ptr->sccTxBd->length, 0x0000 ); |
---|
543 | /* XXX Radstone Example writes TX buffer ptr as two u16's */ |
---|
544 | scc_write32( "sccTxBd->buffer", &ptr->sccTxBd->buffer, |
---|
545 | TX_BUFFER_ADDRESS( ptr ) ); |
---|
546 | |
---|
547 | /* |
---|
548 | * clear previous events and set interrupt priorities |
---|
549 | */ |
---|
550 | scc_write16( "pSCCR->scce", &ptr->pSCCR->scce, 0x1bef ); /* From memo */ |
---|
551 | SYNC(); |
---|
552 | SYNC(); |
---|
553 | scc_write32( "cicr", &m360->cicr, 0x001b9f40 ); |
---|
554 | SYNC(); |
---|
555 | |
---|
556 | /* scc_write32( "cicr", &m360->cicr, scc_read32( "cicr", &m360->cicr ) ); */ |
---|
557 | |
---|
558 | scc_write16( "pSCCR->sccm", &ptr->pSCCR->sccm, M360_SCCE_TX | M360_SCCE_RX ); |
---|
559 | |
---|
560 | data = scc_read32("cimr", &m360->cimr); |
---|
561 | data |= (0x80000000 >> ptr->channel); |
---|
562 | scc_write32( "cimr", &m360->cimr, data ); |
---|
563 | SYNC(); |
---|
564 | scc_write32( "cipr", &m360->cipr, scc_read32( "cipr", &m360->cipr ) ); |
---|
565 | |
---|
566 | scc_write32( "pSCCR->gsmr_h", &ptr->pSCCR->gsmr_h, M360_GSMR_RFW ); |
---|
567 | scc_write32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l, |
---|
568 | (M360_GSMR_TDCR_16X | M360_GSMR_RDCR_16X | M360_GSMR_MODE_UART) ); |
---|
569 | |
---|
570 | scc_write16( "pSCCR->dsr", &ptr->pSCCR->dsr, 0x7e7e ); |
---|
571 | SYNC(); |
---|
572 | |
---|
573 | scc_write16( "pSCCR->psmr", &ptr->pSCCR->psmr, |
---|
574 | (M360_PSMR_CL8 | M360_PSMR_UM_NORMAL | M360_PSMR_TPM_ODD) ); |
---|
575 | SYNC(); |
---|
576 | |
---|
577 | #if 0 /* XXX - ??? */ |
---|
578 | /* |
---|
579 | * Enable the receiver and the transmitter. |
---|
580 | */ |
---|
581 | |
---|
582 | SYNC(); |
---|
583 | data = scc_read32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l); |
---|
584 | scc_write32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l, |
---|
585 | (data | M360_GSMR_ENR | M360_GSMR_ENT) ); |
---|
586 | |
---|
587 | data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_MASK ); |
---|
588 | data &= (~PMCQ1_INT_MASK_QUICC); |
---|
589 | PMCQ1_Write_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_MASK, data ); |
---|
590 | |
---|
591 | data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_STATUS ); |
---|
592 | data &= (~PMCQ1_INT_STATUS_QUICC); |
---|
593 | PMCQ1_Write_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_STATUS, data ); |
---|
594 | #endif |
---|
595 | } |
---|
596 | |
---|
597 | /* |
---|
598 | * mc68360_scc_write_support_int |
---|
599 | * |
---|
600 | * Console Termios output entry point when using interrupt driven output. |
---|
601 | */ |
---|
602 | |
---|
603 | ssize_t mc68360_scc_write_support_int( |
---|
604 | int minor, |
---|
605 | const char *buf, |
---|
606 | size_t len |
---|
607 | ) |
---|
608 | { |
---|
609 | rtems_interrupt_level Irql; |
---|
610 | M68360_serial_ports_t ptr; |
---|
611 | |
---|
612 | #if 1 |
---|
613 | mc68360_length_array[ mc68360_length_count ] = len; |
---|
614 | mc68360_length_count++; |
---|
615 | if ( mc68360_length_count >= MC68360_LENGTH_SIZE ) |
---|
616 | mc68360_length_count=0; |
---|
617 | #endif |
---|
618 | |
---|
619 | ptr = Console_Port_Tbl[minor]->pDeviceParams; |
---|
620 | |
---|
621 | /* |
---|
622 | * We are using interrupt driven output and termios only sends us |
---|
623 | * one character at a time. |
---|
624 | */ |
---|
625 | |
---|
626 | if ( !len ) |
---|
627 | return 0; |
---|
628 | |
---|
629 | /* |
---|
630 | * |
---|
631 | */ |
---|
632 | #ifdef DEBUG_360 |
---|
633 | printk("mc68360_scc_write_support_int: char 0x%x length %d\n", |
---|
634 | (unsigned int)*buf, len ); |
---|
635 | #endif |
---|
636 | /* |
---|
637 | * We must copy the data from the global memory space to MC68360 space |
---|
638 | */ |
---|
639 | |
---|
640 | rtems_interrupt_disable(Irql); |
---|
641 | |
---|
642 | scc_write16( "sccTxBd->status", &ptr->sccTxBd->status, 0 ); |
---|
643 | memcpy((void *) ptr->txBuf, buf, len); |
---|
644 | scc_write32( "sccTxBd->buffer", &ptr->sccTxBd->buffer, |
---|
645 | TX_BUFFER_ADDRESS(ptr->txBuf) ); |
---|
646 | scc_write16( "sccTxBd->length", &ptr->sccTxBd->length, len ); |
---|
647 | scc_write16( "sccTxBd->status", &ptr->sccTxBd->status, |
---|
648 | (M360_BD_READY | M360_BD_WRAP | M360_BD_INTERRUPT) ); |
---|
649 | |
---|
650 | rtems_interrupt_enable(Irql); |
---|
651 | |
---|
652 | return len; |
---|
653 | } |
---|
654 | |
---|
655 | /* |
---|
656 | * mc68360_scc_write_polled |
---|
657 | * |
---|
658 | * This routine polls out the requested character. |
---|
659 | */ |
---|
660 | |
---|
661 | void mc68360_scc_write_polled( |
---|
662 | int minor, |
---|
663 | char cChar |
---|
664 | ) |
---|
665 | { |
---|
666 | #ifdef DEBUG_360 |
---|
667 | printk("mc68360_scc_write_polled: %c\n", cChar); |
---|
668 | #endif |
---|
669 | } |
---|
670 | |
---|
671 | /* |
---|
672 | * mc68681_set_attributes |
---|
673 | * |
---|
674 | * This function sets the DUART channel to reflect the requested termios |
---|
675 | * port settings. |
---|
676 | */ |
---|
677 | |
---|
678 | int mc68360_scc_set_attributes( |
---|
679 | int minor, |
---|
680 | const struct termios *t |
---|
681 | ) |
---|
682 | { |
---|
683 | int baud; |
---|
684 | volatile m360_t *m360; |
---|
685 | M68360_serial_ports_t ptr; |
---|
686 | uint16_t value; |
---|
687 | |
---|
688 | #ifdef DEBUG_360 |
---|
689 | printk("mc68360_scc_set_attributes\n"); |
---|
690 | #endif |
---|
691 | |
---|
692 | ptr = Console_Port_Tbl[minor]->pDeviceParams; |
---|
693 | m360 = ptr->chip->m360; |
---|
694 | |
---|
695 | switch (t->c_cflag & CBAUD) |
---|
696 | { |
---|
697 | case B50: baud = 50; break; |
---|
698 | case B75: baud = 75; break; |
---|
699 | case B110: baud = 110; break; |
---|
700 | case B134: baud = 134; break; |
---|
701 | case B150: baud = 150; break; |
---|
702 | case B200: baud = 200; break; |
---|
703 | case B300: baud = 300; break; |
---|
704 | case B600: baud = 600; break; |
---|
705 | case B1200: baud = 1200; break; |
---|
706 | case B1800: baud = 1800; break; |
---|
707 | case B2400: baud = 2400; break; |
---|
708 | case B4800: baud = 4800; break; |
---|
709 | case B9600: baud = 9600; break; |
---|
710 | case B19200: baud = 19200; break; |
---|
711 | case B38400: baud = 38400; break; |
---|
712 | case B57600: baud = 57600; break; |
---|
713 | case B115200: baud = 115200; break; |
---|
714 | case B230400: baud = 230400; break; |
---|
715 | case B460800: baud = 460800; break; |
---|
716 | default: baud = -1; break; |
---|
717 | } |
---|
718 | |
---|
719 | if (baud > 0) |
---|
720 | { |
---|
721 | scc_write32( |
---|
722 | "pBRGC", |
---|
723 | ptr->pBRGC, |
---|
724 | mc68360_sccBRGC(baud, ptr->chip->m360_clock_rate) |
---|
725 | ); |
---|
726 | } |
---|
727 | |
---|
728 | /* Initial value of PSMR should be 0 */ |
---|
729 | value = M360_PSMR_UM_NORMAL; |
---|
730 | |
---|
731 | /* set the number of data bits, 8 is most common */ |
---|
732 | if (t->c_cflag & CSIZE) /* was it specified? */ |
---|
733 | { |
---|
734 | switch (t->c_cflag & CSIZE) { |
---|
735 | case CS5: value |= M360_PSMR_CL5; break; |
---|
736 | case CS6: value |= M360_PSMR_CL6; break; |
---|
737 | case CS7: value |= M360_PSMR_CL7; break; |
---|
738 | case CS8: value |= M360_PSMR_CL8; break; |
---|
739 | } |
---|
740 | } else { |
---|
741 | value |= M360_PSMR_CL8; /* default to 8 data bits */ |
---|
742 | } |
---|
743 | |
---|
744 | /* the number of stop bits */ |
---|
745 | if (t->c_cflag & CSTOPB) |
---|
746 | value |= M360_PSMR_SL_2; /* Two stop bits */ |
---|
747 | else |
---|
748 | value |= M360_PSMR_SL_1; /* One stop bit */ |
---|
749 | |
---|
750 | /* Set Parity M360_PSMR_PEN bit should be clear on no parity so |
---|
751 | * do nothing in that case |
---|
752 | */ |
---|
753 | if (t->c_cflag & PARENB) /* enable parity detection? */ |
---|
754 | { |
---|
755 | value |= M360_PSMR_PEN; |
---|
756 | if (t->c_cflag & PARODD){ |
---|
757 | value |= M360_PSMR_RPM_ODD; /* select odd parity */ |
---|
758 | value |= M360_PSMR_TPM_ODD; |
---|
759 | } else { |
---|
760 | value |= M360_PSMR_RPM_EVEN; /* select even parity */ |
---|
761 | value |= M360_PSMR_TPM_EVEN; |
---|
762 | } |
---|
763 | } |
---|
764 | |
---|
765 | SYNC(); |
---|
766 | scc_write16( "pSCCR->psmr", &ptr->pSCCR->psmr, value ); |
---|
767 | SYNC(); |
---|
768 | |
---|
769 | return 0; |
---|
770 | } |
---|
771 | |
---|
772 | /* |
---|
773 | * mc68360_scc_close |
---|
774 | * |
---|
775 | * This function shuts down the requested port. |
---|
776 | */ |
---|
777 | |
---|
778 | int mc68360_scc_close( |
---|
779 | int major, |
---|
780 | int minor, |
---|
781 | void *arg |
---|
782 | ) |
---|
783 | { |
---|
784 | return(RTEMS_SUCCESSFUL); |
---|
785 | } |
---|
786 | |
---|
787 | /* |
---|
788 | * mc68360_scc_inbyte_nonblocking_polled |
---|
789 | * |
---|
790 | * Console Termios polling input entry point. |
---|
791 | */ |
---|
792 | |
---|
793 | int mc68360_scc_inbyte_nonblocking_polled( |
---|
794 | int minor |
---|
795 | ) |
---|
796 | { |
---|
797 | return -1; |
---|
798 | } |
---|
799 | |
---|
800 | /* |
---|
801 | * mc68360_scc_write_support_polled |
---|
802 | * |
---|
803 | * Console Termios output entry point when using polled output. |
---|
804 | * |
---|
805 | */ |
---|
806 | |
---|
807 | ssize_t mc68360_scc_write_support_polled( |
---|
808 | int minor, |
---|
809 | const char *buf, |
---|
810 | size_t len |
---|
811 | ) |
---|
812 | { |
---|
813 | printk("mc68360_scc_write_support_polled: minor %d char %c len %d\n", |
---|
814 | minor, buf, len ); |
---|
815 | return len; |
---|
816 | } |
---|
817 | |
---|
818 | /* |
---|
819 | * mc68360_scc_init |
---|
820 | * |
---|
821 | * This function initializes the DUART to a quiecsent state. |
---|
822 | */ |
---|
823 | |
---|
824 | void mc68360_scc_init(int minor) |
---|
825 | { |
---|
826 | #ifdef DEBUG_360 |
---|
827 | printk("mc68360_scc_init\n"); |
---|
828 | #endif |
---|
829 | } |
---|
830 | |
---|
831 | int mc68360_scc_create_chip( PPMCQ1BoardData BoardData, uint8_t int_vector ) |
---|
832 | { |
---|
833 | M68360_t chip; |
---|
834 | int i; |
---|
835 | |
---|
836 | #ifdef DEBUG_360 |
---|
837 | printk("mc68360_scc_create_chip\n"); |
---|
838 | #endif |
---|
839 | |
---|
840 | /* |
---|
841 | * Create console structure for this card |
---|
842 | * XXX - Note Does this need to be moved up to if a QUICC is fitted |
---|
843 | * section? |
---|
844 | */ |
---|
845 | if ((chip = malloc(sizeof(struct _m68360_per_chip))) == NULL) |
---|
846 | { |
---|
847 | printk("Error Unable to allocate memory for _m68360_per_chip\n"); |
---|
848 | return RTEMS_IO_ERROR; |
---|
849 | } |
---|
850 | |
---|
851 | chip->next = M68360_chips; |
---|
852 | chip->m360 = (void *)BoardData->baseaddr; |
---|
853 | chip->m360_interrupt = int_vector; |
---|
854 | chip->m360_clock_rate = 25000000; |
---|
855 | chip->board_data = BoardData; |
---|
856 | M68360_chips = chip; |
---|
857 | |
---|
858 | for (i=1; i<=4; i++) { |
---|
859 | chip->port[i-1].channel = i; |
---|
860 | chip->port[i-1].chip = chip; |
---|
861 | chip->port[i-1].baud = 9600; |
---|
862 | |
---|
863 | switch( i ) { |
---|
864 | case 1: |
---|
865 | chip->port[i-1].pBRGC = &chip->m360->brgc1; |
---|
866 | chip->port[i-1].pSCCB = (m360SCCparms_t *) &chip->m360->scc1p; |
---|
867 | chip->port[i-1].pSCCR = &chip->m360->scc1; |
---|
868 | M360SetupMemory( chip ); /* Do this first time through */ |
---|
869 | break; |
---|
870 | case 2: |
---|
871 | chip->port[i-1].pBRGC = &chip->m360->brgc2; |
---|
872 | chip->port[i-1].pSCCB = &chip->m360->scc2p; |
---|
873 | chip->port[i-1].pSCCR = &chip->m360->scc2; |
---|
874 | break; |
---|
875 | case 3: |
---|
876 | chip->port[i-1].pBRGC = &chip->m360->brgc3; |
---|
877 | chip->port[i-1].pSCCB = &chip->m360->scc3p; |
---|
878 | chip->port[i-1].pSCCR = &chip->m360->scc3; |
---|
879 | break; |
---|
880 | case 4: |
---|
881 | chip->port[i-1].pBRGC = &chip->m360->brgc4; |
---|
882 | chip->port[i-1].pSCCB = &chip->m360->scc4p; |
---|
883 | chip->port[i-1].pSCCR = &chip->m360->scc4; |
---|
884 | break; |
---|
885 | default: |
---|
886 | printk("Invalid mc68360 channel %d\n", i); |
---|
887 | return RTEMS_IO_ERROR; |
---|
888 | } |
---|
889 | |
---|
890 | /* |
---|
891 | * Allocate buffer descriptors. |
---|
892 | */ |
---|
893 | |
---|
894 | chip->port[i-1].sccRxBd = M360AllocateBufferDescriptors(chip, 1); |
---|
895 | chip->port[i-1].sccTxBd = M360AllocateBufferDescriptors(chip, 1); |
---|
896 | } |
---|
897 | |
---|
898 | rsPMCQ1QuiccIntConnect( |
---|
899 | chip->board_data->busNo, |
---|
900 | chip->board_data->slotNo, |
---|
901 | chip->board_data->funcNo, |
---|
902 | &mc68360_sccInterruptHandler, |
---|
903 | (uintptr_t) chip |
---|
904 | ); |
---|
905 | |
---|
906 | return RTEMS_SUCCESSFUL; |
---|
907 | } |
---|
908 | |
---|
909 | const console_fns mc68360_scc_fns = { |
---|
910 | libchip_serial_default_probe, /* deviceProbe */ |
---|
911 | mc68360_scc_open, /* deviceFirstOpen */ |
---|
912 | NULL, /* deviceLastClose */ |
---|
913 | NULL, /* deviceRead */ |
---|
914 | mc68360_scc_write_support_int, /* deviceWrite */ |
---|
915 | mc68360_scc_initialize_interrupts, /* deviceInitialize */ |
---|
916 | mc68360_scc_write_polled, /* deviceWritePolled */ |
---|
917 | mc68360_scc_set_attributes, /* deviceSetAttributes */ |
---|
918 | TRUE /* deviceOutputUsesInterrupts */ |
---|
919 | }; |
---|
920 | |
---|
921 | const console_fns mc68360_scc_polled = { |
---|
922 | libchip_serial_default_probe, /* deviceProbe */ |
---|
923 | mc68360_scc_open, /* deviceFirstOpen */ |
---|
924 | mc68360_scc_close, /* deviceLastClose */ |
---|
925 | mc68360_scc_inbyte_nonblocking_polled, /* deviceRead */ |
---|
926 | mc68360_scc_write_support_polled, /* deviceWrite */ |
---|
927 | mc68360_scc_init, /* deviceInitialize */ |
---|
928 | mc68360_scc_write_polled, /* deviceWritePolled */ |
---|
929 | mc68360_scc_set_attributes, /* deviceSetAttributes */ |
---|
930 | FALSE /* deviceOutputUsesInterrupts */ |
---|
931 | }; |
---|
932 | |
---|