1 | /* This file contains the termios TTY driver for the |
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2 | * Motorola MC68360 SCC ports. |
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3 | * |
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4 | * COPYRIGHT (c) 1989-2008. |
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5 | * On-Line Applications Research Corporation (OAR). |
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6 | * |
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7 | * The license and distribution terms for this file may be |
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8 | * found in the file LICENSE in this distribution or at |
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9 | * http://www.rtems.org/license/LICENSE. |
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10 | */ |
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11 | |
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12 | #include <stdio.h> |
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13 | #include <termios.h> |
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14 | #include <bsp.h> |
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15 | #include <libcpu/io.h> |
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16 | #include <rtems/libio.h> |
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17 | #include <bsp/pci.h> |
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18 | #include <bsp/irq.h> |
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19 | #include <libchip/serial.h> |
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20 | #include "m68360.h" |
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21 | #include <libchip/sersupp.h> |
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22 | #include <stdlib.h> |
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23 | #include <rtems/bspIo.h> |
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24 | #include <string.h> |
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25 | |
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26 | #if 0 |
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27 | #define DEBUG_360 |
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28 | #endif |
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29 | |
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30 | #if 1 /* XXX */ |
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31 | int EP1A_READ_LENGTH_GREATER_THAN_1 = 0; |
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32 | |
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33 | #define MC68360_LENGTH_SIZE 400 |
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34 | int mc68360_length_array[ MC68360_LENGTH_SIZE ]; |
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35 | int mc68360_length_count=0; |
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36 | |
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37 | void mc68360_Show_length_array(void) { |
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38 | int i; |
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39 | for (i=0; i<MC68360_LENGTH_SIZE; i++) |
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40 | printf(" %d", mc68360_length_array[i] ); |
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41 | printf("\n\n"); |
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42 | } |
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43 | #endif |
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44 | |
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45 | |
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46 | M68360_t M68360_chips = NULL; |
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47 | |
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48 | #define SYNC eieio |
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49 | #define mc68360_scc_Is_422( _minor ) (Console_Port_Tbl[minor]->sDeviceName[7] == '4' ) |
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50 | |
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51 | |
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52 | void mc68360_scc_nullFunc(void) {} |
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53 | |
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54 | uint8_t scc_read8( |
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55 | const char *name, |
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56 | volatile uint8_t *address |
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57 | ) |
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58 | { |
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59 | uint8_t value; |
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60 | |
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61 | #ifdef DEBUG_360 |
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62 | printk( "RD8 %s 0x%08x ", name, address ); |
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63 | #endif |
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64 | value = *address; |
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65 | #ifdef DEBUG_360 |
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66 | printk( "0x%02x\n", value ); |
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67 | #endif |
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68 | |
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69 | return value; |
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70 | } |
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71 | |
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72 | void scc_write8( |
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73 | const char *name, |
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74 | volatile uint8_t *address, |
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75 | uint8_t value |
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76 | ) |
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77 | { |
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78 | #ifdef DEBUG_360 |
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79 | printk( "WR8 %s 0x%08x 0x%02x\n", name, address, value ); |
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80 | #endif |
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81 | *address = value; |
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82 | } |
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83 | |
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84 | |
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85 | uint16_t scc_read16( |
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86 | const char *name, |
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87 | volatile uint16_t *address |
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88 | ) |
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89 | { |
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90 | uint16_t value; |
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91 | |
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92 | #ifdef DEBUG_360 |
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93 | printk( "RD16 %s 0x%08x ", name, address ); |
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94 | #endif |
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95 | value = *address; |
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96 | #ifdef DEBUG_360 |
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97 | printk( "0x%04x\n", value ); |
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98 | #endif |
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99 | |
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100 | return value; |
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101 | } |
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102 | |
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103 | void scc_write16( |
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104 | const char *name, |
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105 | volatile uint16_t *address, |
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106 | uint16_t value |
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107 | ) |
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108 | { |
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109 | #ifdef DEBUG_360 |
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110 | printk( "WR16 %s 0x%08x 0x%04x\n", name, address, value ); |
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111 | #endif |
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112 | *address = value; |
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113 | } |
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114 | |
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115 | |
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116 | uint32_t scc_read32( |
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117 | const char *name, |
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118 | volatile uint32_t *address |
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119 | ) |
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120 | { |
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121 | uint32_t value; |
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122 | |
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123 | #ifdef DEBUG_360 |
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124 | printk( "RD32 %s 0x%08x ", name, address ); |
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125 | #endif |
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126 | value = *address; |
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127 | #ifdef DEBUG_360 |
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128 | printk( "0x%08x\n", value ); |
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129 | #endif |
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130 | |
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131 | return value; |
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132 | } |
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133 | |
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134 | void scc_write32( |
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135 | const char *name, |
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136 | volatile uint32_t *address, |
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137 | uint32_t value |
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138 | ) |
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139 | { |
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140 | #ifdef DEBUG_360 |
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141 | printk( "WR32 %s 0x%08x 0x%08x\n", name, address, value ); |
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142 | #endif |
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143 | *address = value; |
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144 | } |
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145 | |
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146 | void mc68360_sccShow_Regs(int minor){ |
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147 | M68360_serial_ports_t ptr; |
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148 | ptr = Console_Port_Tbl[minor]->pDeviceParams; |
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149 | |
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150 | printk( "scce 0x%08x", &ptr->pSCCR->scce ); |
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151 | printk( " 0x%04x\n", ptr->pSCCR->scce ); |
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152 | |
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153 | } |
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154 | |
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155 | #define TX_BUFFER_ADDRESS( _ptr ) \ |
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156 | ((char *)ptr->txBuf - (char *)ptr->chip->board_data->baseaddr) |
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157 | #define RX_BUFFER_ADDRESS( _ptr ) \ |
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158 | ((char *)ptr->rxBuf - (char *)ptr->chip->board_data->baseaddr) |
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159 | |
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160 | |
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161 | /************************************************************************** |
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162 | * Function: mc68360_sccBRGC * |
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163 | ************************************************************************** |
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164 | * Description: * |
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165 | * * |
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166 | * This function is called to compute the divisor register values for * |
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167 | * a given baud rate. * |
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168 | * * |
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169 | * * |
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170 | * Inputs: * |
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171 | * * |
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172 | * int baud - Baud rate (in bps). * |
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173 | * * |
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174 | * Output: * |
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175 | * * |
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176 | * int - baud rate generator configuration. * |
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177 | * * |
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178 | **************************************************************************/ |
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179 | static int |
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180 | mc68360_sccBRGC(int baud, int m360_clock_rate) |
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181 | { |
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182 | int data; |
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183 | #if 0 |
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184 | int divisor; |
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185 | int div16; |
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186 | |
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187 | div16 = 0; |
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188 | divisor = ((m360_clock_rate / 16) + (baud / 2)) / baud; |
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189 | if (divisor > 4096) |
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190 | { |
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191 | div16 = 1; |
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192 | divisor = (divisor + 8) / 16; |
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193 | } |
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194 | return(M360_BRG_EN | M360_BRG_EXTC_BRGCLK | |
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195 | ((divisor - 1) << 1) | div16); |
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196 | #endif |
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197 | |
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198 | /* |
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199 | * configure baud rate generator for 16x bit rate, where..... |
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200 | * b = desired baud rate |
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201 | * clk = system clock (33mhz) |
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202 | * d = clock dividor value |
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203 | * |
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204 | * for b > 300 : d = clk/(b*16) |
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205 | * for b<= 300 : d = (clk/ (b*16*16))-1) |
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206 | */ |
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207 | |
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208 | SYNC(); |
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209 | if( baud > 300 ) data = 33333333 / (baud * 16 ); |
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210 | else data = (33333333 / (baud * 16 * 16) ) - 1; |
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211 | data *= 2; |
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212 | data &= 0x00001ffe ; |
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213 | |
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214 | /* really data = 0x010000 | data | ((baud>300)? 0 : 1 ) ; */ |
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215 | data |= ((baud>300)? 0 : 1 ) ; |
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216 | data |= 0x010000 ; |
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217 | |
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218 | return data; |
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219 | } |
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220 | |
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221 | |
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222 | /************************************************************************** |
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223 | * Function: sccInterruptHandler * |
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224 | ************************************************************************** |
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225 | * Description: * |
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226 | * * |
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227 | * This is the interrupt service routine for the console UART. It * |
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228 | * handles both receive and transmit interrupts. The bulk of the * |
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229 | * work is done by termios. * |
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230 | * * |
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231 | * Inputs: * |
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232 | * * |
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233 | * chip - structure of chip specific information * |
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234 | * * |
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235 | * Output: * |
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236 | * * |
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237 | * none * |
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238 | * * |
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239 | **************************************************************************/ |
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240 | void mc68360_sccInterruptHandler( M68360_t chip ) |
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241 | { |
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242 | volatile m360_t *m360; |
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243 | int port; |
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244 | uint16_t status; |
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245 | uint16_t length; |
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246 | int i; |
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247 | char data; |
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248 | int clear_isr; |
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249 | |
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250 | |
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251 | #ifdef DEBUG_360 |
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252 | printk("mc68360_sccInterruptHandler\n"); |
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253 | #endif |
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254 | for (port=0; port<4; port++) { |
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255 | |
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256 | clear_isr = FALSE; |
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257 | m360 = chip->m360; |
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258 | |
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259 | /* |
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260 | * XXX - Can we add something here to check if this is our interrupt. |
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261 | * XXX - We need a parameter here so that we know which 360 instead of |
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262 | * looping through them all! |
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263 | */ |
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264 | |
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265 | /* |
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266 | * Handle a RX interrupt. |
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267 | */ |
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268 | if ( scc_read16("scce", &chip->port[port].pSCCR->scce) & 0x1) |
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269 | { |
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270 | clear_isr = TRUE; |
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271 | scc_write16("scce", &chip->port[port].pSCCR->scce, 0x1 ); |
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272 | status =scc_read16( "sccRxBd->status", &chip->port[port].sccRxBd->status); |
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273 | while ((status & M360_BD_EMPTY) == 0) |
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274 | { |
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275 | length= scc_read16("sccRxBd->length",&chip->port[port].sccRxBd->length); |
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276 | if (length > 1) |
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277 | EP1A_READ_LENGTH_GREATER_THAN_1 = length; |
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278 | |
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279 | for (i=0;i<length;i++) { |
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280 | data= chip->port[port].rxBuf[i]; |
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281 | rtems_termios_enqueue_raw_characters( |
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282 | Console_Port_Data[ chip->port[port].minor ].termios_data, |
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283 | &data, |
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284 | 1); |
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285 | } |
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286 | scc_write16( "sccRxBd->status", &chip->port[port].sccRxBd->status, |
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287 | M360_BD_EMPTY | M360_BD_WRAP | M360_BD_INTERRUPT ); |
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288 | status =scc_read16( "sccRxBd->status", &chip->port[port].sccRxBd->status); |
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289 | } |
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290 | } |
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291 | |
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292 | /* |
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293 | * Handle a TX interrupt. |
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294 | */ |
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295 | if (scc_read16("scce", &chip->port[port].pSCCR->scce) & 0x2) |
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296 | { |
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297 | clear_isr = TRUE; |
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298 | scc_write16("scce", &chip->port[port].pSCCR->scce, 0x2); |
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299 | status = scc_read16("sccTxBd->status", &chip->port[port].sccTxBd->status); |
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300 | if ((status & M360_BD_EMPTY) == 0) |
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301 | { |
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302 | scc_write16("sccTxBd->status",&chip->port[port].sccTxBd->status,0); |
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303 | #if 1 |
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304 | rtems_termios_dequeue_characters( |
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305 | Console_Port_Data[chip->port[port].minor].termios_data, |
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306 | chip->port[port].sccTxBd->length); |
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307 | #else |
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308 | mc68360_scc_write_support_int(chip->port[port].minor,"*****", 5); |
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309 | #endif |
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310 | } |
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311 | } |
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312 | |
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313 | /* |
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314 | * Clear SCC interrupt-in-service bit. |
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315 | */ |
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316 | if ( clear_isr ) |
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317 | scc_write32( "cisr", &m360->cisr, (0x80000000 >> chip->port[port].channel) ); |
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318 | } |
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319 | } |
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320 | |
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321 | /* |
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322 | * mc68360_scc_open |
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323 | * |
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324 | * This function opens a port for communication. |
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325 | * |
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326 | * Default state is 9600 baud, 8 bits, No parity, and 1 stop bit. |
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327 | */ |
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328 | |
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329 | int mc68360_scc_open( |
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330 | int major, |
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331 | int minor, |
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332 | void * arg |
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333 | ) |
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334 | { |
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335 | M68360_serial_ports_t ptr; |
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336 | volatile m360_t *m360; |
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337 | uint32_t data; |
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338 | |
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339 | #ifdef DEBUG_360 |
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340 | printk("mc68360_scc_open %d\n", minor); |
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341 | #endif |
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342 | |
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343 | |
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344 | ptr = Console_Port_Tbl[minor]->pDeviceParams; |
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345 | m360 = ptr->chip->m360; |
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346 | |
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347 | /* |
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348 | * Enable the receiver and the transmitter. |
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349 | */ |
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350 | |
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351 | SYNC(); |
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352 | data = scc_read32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l); |
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353 | scc_write32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l, |
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354 | (data | M360_GSMR_ENR | M360_GSMR_ENT) ); |
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355 | |
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356 | data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_MASK ); |
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357 | data &= (~PMCQ1_INT_MASK_QUICC); |
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358 | PMCQ1_Write_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_MASK, data ); |
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359 | |
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360 | data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_STATUS ); |
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361 | data &= (~PMCQ1_INT_STATUS_QUICC); |
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362 | PMCQ1_Write_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_STATUS, data ); |
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363 | |
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364 | return RTEMS_SUCCESSFUL; |
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365 | } |
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366 | |
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367 | uint32_t mc68360_scc_calculate_pbdat( M68360_t chip ) |
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368 | { |
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369 | uint32_t i; |
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370 | uint32_t pbdat_data; |
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371 | int minor; |
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372 | uint32_t type422data[4] = { |
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373 | 0x00440, 0x00880, 0x10100, 0x20200 |
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374 | }; |
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375 | |
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376 | pbdat_data = 0x3; |
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377 | for (i=0; i<4; i++) { |
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378 | minor = chip->port[i].minor; |
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379 | if mc68360_scc_Is_422( minor ) |
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380 | pbdat_data |= type422data[i]; |
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381 | } |
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382 | |
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383 | return pbdat_data; |
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384 | } |
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385 | |
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386 | /* |
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387 | * mc68360_scc_initialize_interrupts |
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388 | * |
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389 | * This routine initializes the console's receive and transmit |
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390 | * ring buffers and loads the appropriate vectors to handle the interrupts. |
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391 | */ |
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392 | |
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393 | void mc68360_scc_initialize_interrupts(int minor) |
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394 | { |
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395 | M68360_serial_ports_t ptr; |
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396 | volatile m360_t *m360; |
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397 | uint32_t data; |
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398 | uint32_t buffers_start; |
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399 | uint32_t tmp_u32; |
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400 | |
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401 | #ifdef DEBUG_360 |
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402 | printk("mc68360_scc_initialize_interrupts: minor %d\n", minor ); |
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403 | printk("Console_Port_Tbl[minor]->pDeviceParams 0x%08x\n", |
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404 | Console_Port_Tbl[minor]->pDeviceParams ); |
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405 | #endif |
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406 | |
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407 | ptr = Console_Port_Tbl[minor]->pDeviceParams; |
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408 | m360 = ptr->chip->m360; |
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409 | |
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410 | #ifdef DEBUG_360 |
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411 | printk("m360 0x%08x baseaddr 0x%08x\n", |
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412 | m360, ptr->chip->board_data->baseaddr); |
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413 | #endif |
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414 | |
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415 | buffers_start = ptr->chip->board_data->baseaddr + 0x00200000 + |
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416 | ( (M68360_RX_BUF_SIZE + M68360_TX_BUF_SIZE) * (ptr->channel-1)); |
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417 | ptr->rxBuf = (uint8_t *) buffers_start; |
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418 | ptr->txBuf = (uint8_t *)(buffers_start + M68360_RX_BUF_SIZE); |
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419 | #ifdef DEBUG_360 |
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420 | printk("rxBuf 0x%08x txBuf 0x%08x\n", ptr->rxBuf, ptr->txBuf ); |
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421 | #endif |
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422 | /* |
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423 | * Set Channel Drive Enable bits in EPLD |
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424 | */ |
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425 | data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_DRIVER_ENABLE ); |
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426 | SYNC(); |
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427 | data = data & ~(PMCQ1_DRIVER_ENABLE_3 | PMCQ1_DRIVER_ENABLE_2 | |
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428 | PMCQ1_DRIVER_ENABLE_1 | PMCQ1_DRIVER_ENABLE_0); |
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429 | PMCQ1_Write_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_DRIVER_ENABLE, data); |
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430 | data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_DRIVER_ENABLE ); |
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431 | SYNC(); |
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432 | |
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433 | /* |
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434 | * Disable the receiver and the transmitter. |
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435 | */ |
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436 | |
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437 | SYNC(); |
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438 | tmp_u32 = scc_read32( "gsmr_l", &ptr->pSCCR->gsmr_l ); |
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439 | tmp_u32 &= (~(M360_GSMR_ENR | M360_GSMR_ENT ) ) ; |
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440 | scc_write32( "gsmr_l", &ptr->pSCCR->gsmr_l, tmp_u32 ); |
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441 | |
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442 | /* |
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443 | * Disable Interrupt Error and Interrupt Breakpoint |
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444 | * Set SAID to 4 XXX - Shouldn't it be 7 for slave mode |
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445 | * Set SAISM to 7 |
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446 | */ |
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447 | SYNC(); |
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448 | scc_write16( "sdcr", &m360->sdcr, 0x0740 ); |
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449 | |
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450 | /* |
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451 | * Clear status -- reserved interrupt, SDMA channel error, SDMA breakpoint |
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452 | */ |
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453 | scc_write8( "sdsr", &m360->sdsr, 0x07 ); |
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454 | SYNC(); |
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455 | |
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456 | /* |
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457 | * Initialize timer information in RISC Controller Configuration Register |
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458 | */ |
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459 | scc_write16( "rccr", &m360->rccr, 0x8100 ); |
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460 | SYNC(); |
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461 | |
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462 | /* |
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463 | * XXX |
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464 | */ |
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465 | scc_write16( "papar", &m360->papar, 0xffff ); |
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466 | scc_write16( "padir", &m360->padir, 0x5500 ); /* From Memo */ |
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467 | scc_write16( "paodr", &m360->paodr, 0x0000 ); |
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468 | SYNC(); |
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469 | |
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470 | /* |
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471 | * XXX |
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472 | */ |
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473 | |
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474 | #if 0 |
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475 | scc_write32( "pbpar", &m360->pbpar, 0x00000000 ); |
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476 | scc_write32( "pbdir", &m360->pbdir, 0x0003ffff ); |
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477 | scc_write32( "pbdat", &m360->pbdat, 0x0000003f ); |
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478 | SYNC(); |
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479 | #else |
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480 | data = mc68360_scc_calculate_pbdat( ptr->chip ); |
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481 | scc_write32( "pbpar", &m360->pbpar, 0x00000000 ); |
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482 | scc_write32( "pbdat", &m360->pbdat, data ); |
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483 | SYNC(); |
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484 | scc_write32( "pbdir", &m360->pbdir, 0x0003fc3 ); |
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485 | SYNC(); |
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486 | #endif |
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487 | |
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488 | |
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489 | /* |
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490 | * XXX |
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491 | */ |
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492 | scc_write16( "pcpar", &m360->pcpar, 0x0000 ); |
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493 | scc_write16( "pcdir", &m360->pcdir, 0x0000 ); |
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494 | scc_write16( "pcso", &m360->pcso, 0x0000 ); |
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495 | SYNC(); |
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496 | |
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497 | /* |
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498 | * configure baud rate generator for 16x bit rate, where..... |
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499 | * b = desired baud rate |
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500 | * clk = system clock (33mhz) |
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501 | * d = clock dividor value |
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502 | * |
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503 | * for b > 300 : d = clk/(b*16) |
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504 | * for b<= 300 : d = (clk/ (b*16*16))-1) |
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505 | */ |
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506 | SYNC(); |
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507 | if( ptr->baud > 300 ) data = 33333333 / (ptr->baud * 16 ); |
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508 | else data = (33333333 / (ptr->baud * 16 * 16) ) - 1; |
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509 | data *= 2 ; |
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510 | data &= 0x00001ffe ; |
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511 | |
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512 | /* really data = 0x010000 | data | ((baud>300)? 0 : 1 ) ; */ |
---|
513 | data |= ((ptr->baud>300)? 0 : 1 ) ; |
---|
514 | data |= 0x010000 ; |
---|
515 | |
---|
516 | scc_write32( "pBRGC", ptr->pBRGC, data ); |
---|
517 | |
---|
518 | data = (((ptr->channel-1)*8) | (ptr->channel-1)) ; |
---|
519 | data = data << ((ptr->channel-1)*8) ; |
---|
520 | data |= scc_read32( "sicr", &m360->sicr ); |
---|
521 | scc_write32( "sicr", &m360->sicr, data ); |
---|
522 | |
---|
523 | /* |
---|
524 | * initialise SCC parameter ram |
---|
525 | */ |
---|
526 | SYNC(); |
---|
527 | scc_write16( "pSCCB->rbase", &ptr->pSCCB->rbase, |
---|
528 | (char *)(ptr->sccRxBd) - (char *)m360 ); |
---|
529 | scc_write16( "pSCCB->tbase", &ptr->pSCCB->tbase, |
---|
530 | (char *)(ptr->sccTxBd) - (char *)m360 ); |
---|
531 | |
---|
532 | scc_write8( "pSCCB->rfcr", &ptr->pSCCB->rfcr, 0x15 ); /* 0x15 0x18 */ |
---|
533 | scc_write8( "pSCCB->tfcr", &ptr->pSCCB->tfcr, 0x15 ); /* 0x15 0x18 */ |
---|
534 | |
---|
535 | scc_write16( "pSCCB->mrblr", &ptr->pSCCB->mrblr, M68360_RX_BUF_SIZE ); |
---|
536 | |
---|
537 | /* |
---|
538 | * initialise tx and rx scc parameters |
---|
539 | */ |
---|
540 | SYNC(); |
---|
541 | data = M360_CR_INIT_TX_RX_PARAMS | 0x01; |
---|
542 | data |= (M360_CR_CH_NUM * (ptr->channel-1) ); |
---|
543 | scc_write16( "CR", &m360->cr, data ); |
---|
544 | |
---|
545 | /* |
---|
546 | * initialise uart specific parameter RAM |
---|
547 | */ |
---|
548 | SYNC(); |
---|
549 | scc_write16( "pSCCB->un.uart.max_idl", &ptr->pSCCB->un.uart.max_idl, 15000 ); |
---|
550 | scc_write16( "pSCCB->un.uart.brkcr", &ptr->pSCCB->un.uart.brkcr, 0x0001 ); |
---|
551 | scc_write16( "pSCCB->un.uart.parec", &ptr->pSCCB->un.uart.parec, 0x0000 ); |
---|
552 | |
---|
553 | scc_write16( "pSCCB->un,uart.frmec", &ptr->pSCCB->un.uart.frmec, 0x0000 ); |
---|
554 | |
---|
555 | scc_write16( "pSCCB->un.uart.nosec", &ptr->pSCCB->un.uart.nosec, 0x0000 ); |
---|
556 | scc_write16( "pSCCB->un.uart.brkec", &ptr->pSCCB->un.uart.brkec, 0x0000 ); |
---|
557 | scc_write16( "pSCCB->un.uart.uaddr0", &ptr->pSCCB->un.uart.uaddr[0], 0x0000 ); |
---|
558 | scc_write16( "pSCCB->un.uart.uaddr1", &ptr->pSCCB->un.uart.uaddr[1], 0x0000 ); |
---|
559 | scc_write16( "pSCCB->un.uart.toseq", &ptr->pSCCB->un.uart.toseq, 0x0000 ); |
---|
560 | scc_write16( "pSCCB->un.uart.char0", |
---|
561 | &ptr->pSCCB->un.uart.character[0], 0x0039 ); |
---|
562 | scc_write16( "pSCCB->un.uart.char1", |
---|
563 | &ptr->pSCCB->un.uart.character[1], 0x8000 ); |
---|
564 | scc_write16( "pSCCB->un.uart.char2", |
---|
565 | &ptr->pSCCB->un.uart.character[2], 0x8000 ); |
---|
566 | scc_write16( "pSCCB->un.uart.char3", |
---|
567 | &ptr->pSCCB->un.uart.character[3], 0x8000 ); |
---|
568 | scc_write16( "pSCCB->un.uart.char4", |
---|
569 | &ptr->pSCCB->un.uart.character[4], 0x8000 ); |
---|
570 | scc_write16( "pSCCB->un.uart.char5", |
---|
571 | &ptr->pSCCB->un.uart.character[5], 0x8000 ); |
---|
572 | scc_write16( "pSCCB->un.uart.char6", |
---|
573 | &ptr->pSCCB->un.uart.character[6], 0x8000 ); |
---|
574 | scc_write16( "pSCCB->un.uart.char7", |
---|
575 | &ptr->pSCCB->un.uart.character[7], 0x8000 ); |
---|
576 | |
---|
577 | scc_write16( "pSCCB->un.uart.rccm", &ptr->pSCCB->un.uart.rccm, 0xc0ff ); |
---|
578 | |
---|
579 | /* |
---|
580 | * setup buffer descriptor stuff |
---|
581 | */ |
---|
582 | SYNC(); |
---|
583 | scc_write16( "sccRxBd->status", &ptr->sccRxBd->status, 0x0000 ); |
---|
584 | SYNC(); |
---|
585 | scc_write16( "sccRxBd->length", &ptr->sccRxBd->length, 0x0000 ); |
---|
586 | scc_write16( "sccRxBd->status", &ptr->sccRxBd->status, |
---|
587 | M360_BD_EMPTY | M360_BD_WRAP | M360_BD_INTERRUPT ); |
---|
588 | /* XXX Radstone Example writes RX buffer ptr as two u16's */ |
---|
589 | scc_write32( "sccRxBd->buffer", &ptr->sccRxBd->buffer, |
---|
590 | RX_BUFFER_ADDRESS( ptr ) ); |
---|
591 | |
---|
592 | SYNC(); |
---|
593 | scc_write16( "sccTxBd->status", &ptr->sccTxBd->status, 0x0000 ); |
---|
594 | SYNC(); |
---|
595 | scc_write16( "sccTxBd->length", &ptr->sccTxBd->length, 0x0000 ); |
---|
596 | /* XXX Radstone Example writes TX buffer ptr as two u16's */ |
---|
597 | scc_write32( "sccTxBd->buffer", &ptr->sccTxBd->buffer, |
---|
598 | TX_BUFFER_ADDRESS( ptr ) ); |
---|
599 | |
---|
600 | /* |
---|
601 | * clear previous events and set interrupt priorities |
---|
602 | */ |
---|
603 | scc_write16( "pSCCR->scce", &ptr->pSCCR->scce, 0x1bef ); /* From memo */ |
---|
604 | SYNC(); |
---|
605 | SYNC(); |
---|
606 | scc_write32( "cicr", &m360->cicr, 0x001b9f40 ); |
---|
607 | SYNC(); |
---|
608 | |
---|
609 | /* scc_write32( "cicr", &m360->cicr, scc_read32( "cicr", &m360->cicr ) ); */ |
---|
610 | |
---|
611 | scc_write16( "pSCCR->sccm", &ptr->pSCCR->sccm, M360_SCCE_TX | M360_SCCE_RX ); |
---|
612 | |
---|
613 | data = scc_read32("cimr", &m360->cimr); |
---|
614 | data |= (0x80000000 >> ptr->channel); |
---|
615 | scc_write32( "cimr", &m360->cimr, data ); |
---|
616 | SYNC(); |
---|
617 | scc_write32( "cipr", &m360->cipr, scc_read32( "cipr", &m360->cipr ) ); |
---|
618 | |
---|
619 | scc_write32( "pSCCR->gsmr_h", &ptr->pSCCR->gsmr_h, M360_GSMR_RFW ); |
---|
620 | scc_write32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l, |
---|
621 | (M360_GSMR_TDCR_16X | M360_GSMR_RDCR_16X | M360_GSMR_MODE_UART) ); |
---|
622 | |
---|
623 | scc_write16( "pSCCR->dsr", &ptr->pSCCR->dsr, 0x7e7e ); |
---|
624 | SYNC(); |
---|
625 | |
---|
626 | scc_write16( "pSCCR->psmr", &ptr->pSCCR->psmr, |
---|
627 | (M360_PSMR_CL8 | M360_PSMR_UM_NORMAL | M360_PSMR_TPM_ODD) ); |
---|
628 | SYNC(); |
---|
629 | |
---|
630 | #if 0 /* XXX - ??? */ |
---|
631 | /* |
---|
632 | * Enable the receiver and the transmitter. |
---|
633 | */ |
---|
634 | |
---|
635 | SYNC(); |
---|
636 | data = scc_read32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l); |
---|
637 | scc_write32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l, |
---|
638 | (data | M360_GSMR_ENR | M360_GSMR_ENT) ); |
---|
639 | |
---|
640 | data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_MASK ); |
---|
641 | data &= (~PMCQ1_INT_MASK_QUICC); |
---|
642 | PMCQ1_Write_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_MASK, data ); |
---|
643 | |
---|
644 | data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_STATUS ); |
---|
645 | data &= (~PMCQ1_INT_STATUS_QUICC); |
---|
646 | PMCQ1_Write_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_STATUS, data ); |
---|
647 | #endif |
---|
648 | } |
---|
649 | |
---|
650 | /* |
---|
651 | * mc68360_scc_write_support_int |
---|
652 | * |
---|
653 | * Console Termios output entry point when using interrupt driven output. |
---|
654 | */ |
---|
655 | |
---|
656 | int mc68360_scc_write_support_int( |
---|
657 | int minor, |
---|
658 | const char *buf, |
---|
659 | int len |
---|
660 | ) |
---|
661 | { |
---|
662 | rtems_interrupt_level Irql; |
---|
663 | M68360_serial_ports_t ptr; |
---|
664 | |
---|
665 | #if 1 |
---|
666 | mc68360_length_array[ mc68360_length_count ] = len; |
---|
667 | mc68360_length_count++; |
---|
668 | if ( mc68360_length_count >= MC68360_LENGTH_SIZE ) |
---|
669 | mc68360_length_count=0; |
---|
670 | #endif |
---|
671 | |
---|
672 | ptr = Console_Port_Tbl[minor]->pDeviceParams; |
---|
673 | |
---|
674 | /* |
---|
675 | * We are using interrupt driven output and termios only sends us |
---|
676 | * one character at a time. |
---|
677 | */ |
---|
678 | |
---|
679 | if ( !len ) |
---|
680 | return 0; |
---|
681 | |
---|
682 | /* |
---|
683 | * |
---|
684 | */ |
---|
685 | #ifdef DEBUG_360 |
---|
686 | printk("mc68360_scc_write_support_int: char 0x%x length %d\n", |
---|
687 | (unsigned int)*buf, len ); |
---|
688 | #endif |
---|
689 | /* |
---|
690 | * We must copy the data from the global memory space to MC68360 space |
---|
691 | */ |
---|
692 | |
---|
693 | rtems_interrupt_disable(Irql); |
---|
694 | |
---|
695 | scc_write16( "sccTxBd->status", &ptr->sccTxBd->status, 0 ); |
---|
696 | memcpy((void *) ptr->txBuf, buf, len); |
---|
697 | scc_write32( "sccTxBd->buffer", &ptr->sccTxBd->buffer, |
---|
698 | TX_BUFFER_ADDRESS(ptr->txBuf) ); |
---|
699 | scc_write16( "sccTxBd->length", &ptr->sccTxBd->length, len ); |
---|
700 | scc_write16( "sccTxBd->status", &ptr->sccTxBd->status, |
---|
701 | (M360_BD_READY | M360_BD_WRAP | M360_BD_INTERRUPT) ); |
---|
702 | |
---|
703 | rtems_interrupt_enable(Irql); |
---|
704 | |
---|
705 | return len; |
---|
706 | } |
---|
707 | |
---|
708 | /* |
---|
709 | * mc68360_scc_write_polled |
---|
710 | * |
---|
711 | * This routine polls out the requested character. |
---|
712 | */ |
---|
713 | |
---|
714 | void mc68360_scc_write_polled( |
---|
715 | int minor, |
---|
716 | char cChar |
---|
717 | ) |
---|
718 | { |
---|
719 | #ifdef DEBUG_360 |
---|
720 | printk("mc68360_scc_write_polled: %c\n", cChar); |
---|
721 | #endif |
---|
722 | } |
---|
723 | |
---|
724 | /* |
---|
725 | * mc68681_set_attributes |
---|
726 | * |
---|
727 | * This function sets the DUART channel to reflect the requested termios |
---|
728 | * port settings. |
---|
729 | */ |
---|
730 | |
---|
731 | int mc68360_scc_set_attributes( |
---|
732 | int minor, |
---|
733 | const struct termios *t |
---|
734 | ) |
---|
735 | { |
---|
736 | int baud; |
---|
737 | volatile m360_t *m360; |
---|
738 | M68360_serial_ports_t ptr; |
---|
739 | uint16_t value; |
---|
740 | |
---|
741 | #ifdef DEBUG_360 |
---|
742 | printk("mc68360_scc_set_attributes\n"); |
---|
743 | #endif |
---|
744 | |
---|
745 | ptr = Console_Port_Tbl[minor]->pDeviceParams; |
---|
746 | m360 = ptr->chip->m360; |
---|
747 | |
---|
748 | switch (t->c_cflag & CBAUD) |
---|
749 | { |
---|
750 | case B50: baud = 50; break; |
---|
751 | case B75: baud = 75; break; |
---|
752 | case B110: baud = 110; break; |
---|
753 | case B134: baud = 134; break; |
---|
754 | case B150: baud = 150; break; |
---|
755 | case B200: baud = 200; break; |
---|
756 | case B300: baud = 300; break; |
---|
757 | case B600: baud = 600; break; |
---|
758 | case B1200: baud = 1200; break; |
---|
759 | case B1800: baud = 1800; break; |
---|
760 | case B2400: baud = 2400; break; |
---|
761 | case B4800: baud = 4800; break; |
---|
762 | case B9600: baud = 9600; break; |
---|
763 | case B19200: baud = 19200; break; |
---|
764 | case B38400: baud = 38400; break; |
---|
765 | case B57600: baud = 57600; break; |
---|
766 | case B115200: baud = 115200; break; |
---|
767 | case B230400: baud = 230400; break; |
---|
768 | case B460800: baud = 460800; break; |
---|
769 | default: baud = -1; break; |
---|
770 | } |
---|
771 | |
---|
772 | if (baud > 0) |
---|
773 | { |
---|
774 | scc_write32( |
---|
775 | "pBRGC", |
---|
776 | ptr->pBRGC, |
---|
777 | mc68360_sccBRGC(baud, ptr->chip->m360_clock_rate) |
---|
778 | ); |
---|
779 | } |
---|
780 | |
---|
781 | /* Initial value of PSMR should be 0 */ |
---|
782 | value = M360_PSMR_UM_NORMAL; |
---|
783 | |
---|
784 | /* set the number of data bits, 8 is most common */ |
---|
785 | if (t->c_cflag & CSIZE) /* was it specified? */ |
---|
786 | { |
---|
787 | switch (t->c_cflag & CSIZE) { |
---|
788 | case CS5: value |= M360_PSMR_CL5; break; |
---|
789 | case CS6: value |= M360_PSMR_CL6; break; |
---|
790 | case CS7: value |= M360_PSMR_CL7; break; |
---|
791 | case CS8: value |= M360_PSMR_CL8; break; |
---|
792 | } |
---|
793 | } else { |
---|
794 | value |= M360_PSMR_CL8; /* default to 8 data bits */ |
---|
795 | } |
---|
796 | |
---|
797 | /* the number of stop bits */ |
---|
798 | if (t->c_cflag & CSTOPB) |
---|
799 | value |= M360_PSMR_SL_2; /* Two stop bits */ |
---|
800 | else |
---|
801 | value |= M360_PSMR_SL_1; /* One stop bit */ |
---|
802 | |
---|
803 | /* Set Parity M360_PSMR_PEN bit should be clear on no parity so |
---|
804 | * do nothing in that case |
---|
805 | */ |
---|
806 | if (t->c_cflag & PARENB) /* enable parity detection? */ |
---|
807 | { |
---|
808 | value |= M360_PSMR_PEN; |
---|
809 | if (t->c_cflag & PARODD){ |
---|
810 | value |= M360_PSMR_RPM_ODD; /* select odd parity */ |
---|
811 | value |= M360_PSMR_TPM_ODD; |
---|
812 | } else { |
---|
813 | value |= M360_PSMR_RPM_EVEN; /* select even parity */ |
---|
814 | value |= M360_PSMR_TPM_EVEN; |
---|
815 | } |
---|
816 | } |
---|
817 | |
---|
818 | SYNC(); |
---|
819 | scc_write16( "pSCCR->psmr", &ptr->pSCCR->psmr, value ); |
---|
820 | SYNC(); |
---|
821 | |
---|
822 | return 0; |
---|
823 | } |
---|
824 | |
---|
825 | /* |
---|
826 | * mc68360_scc_close |
---|
827 | * |
---|
828 | * This function shuts down the requested port. |
---|
829 | */ |
---|
830 | |
---|
831 | int mc68360_scc_close( |
---|
832 | int major, |
---|
833 | int minor, |
---|
834 | void *arg |
---|
835 | ) |
---|
836 | { |
---|
837 | return(RTEMS_SUCCESSFUL); |
---|
838 | } |
---|
839 | |
---|
840 | /* |
---|
841 | * mc68360_scc_inbyte_nonblocking_polled |
---|
842 | * |
---|
843 | * Console Termios polling input entry point. |
---|
844 | */ |
---|
845 | |
---|
846 | int mc68360_scc_inbyte_nonblocking_polled( |
---|
847 | int minor |
---|
848 | ) |
---|
849 | { |
---|
850 | return -1; |
---|
851 | } |
---|
852 | |
---|
853 | /* |
---|
854 | * mc68360_scc_write_support_polled |
---|
855 | * |
---|
856 | * Console Termios output entry point when using polled output. |
---|
857 | * |
---|
858 | */ |
---|
859 | |
---|
860 | ssize_t mc68360_scc_write_support_polled( |
---|
861 | int minor, |
---|
862 | const char *buf, |
---|
863 | size_t len |
---|
864 | ) |
---|
865 | { |
---|
866 | printk("mc68360_scc_write_support_polled: minor %d char %c len %d\n", |
---|
867 | minor, buf, len ); |
---|
868 | return len; |
---|
869 | } |
---|
870 | |
---|
871 | /* |
---|
872 | * mc68360_scc_init |
---|
873 | * |
---|
874 | * This function initializes the DUART to a quiecsent state. |
---|
875 | */ |
---|
876 | |
---|
877 | void mc68360_scc_init(int minor) |
---|
878 | { |
---|
879 | #ifdef DEBUG_360 |
---|
880 | printk("mc68360_scc_init\n"); |
---|
881 | #endif |
---|
882 | } |
---|
883 | |
---|
884 | int mc68360_scc_create_chip( PPMCQ1BoardData BoardData, uint8_t int_vector ) |
---|
885 | { |
---|
886 | M68360_t chip; |
---|
887 | int i; |
---|
888 | |
---|
889 | #ifdef DEBUG_360 |
---|
890 | printk("mc68360_scc_create_chip\n"); |
---|
891 | #endif |
---|
892 | |
---|
893 | /* |
---|
894 | * Create console structure for this card |
---|
895 | * XXX - Note Does this need to be moved up to if a QUICC is fitted |
---|
896 | * section? |
---|
897 | */ |
---|
898 | if ((chip = malloc(sizeof(struct _m68360_per_chip))) == NULL) |
---|
899 | { |
---|
900 | printk("Error Unable to allocate memory for _m68360_per_chip\n"); |
---|
901 | return RTEMS_IO_ERROR; |
---|
902 | } |
---|
903 | |
---|
904 | chip->next = M68360_chips; |
---|
905 | chip->m360 = (void *)BoardData->baseaddr; |
---|
906 | chip->m360_interrupt = int_vector; |
---|
907 | chip->m360_clock_rate = 25000000; |
---|
908 | chip->board_data = BoardData; |
---|
909 | M68360_chips = chip; |
---|
910 | |
---|
911 | for (i=1; i<=4; i++) { |
---|
912 | chip->port[i-1].channel = i; |
---|
913 | chip->port[i-1].chip = chip; |
---|
914 | chip->port[i-1].baud = 9600; |
---|
915 | |
---|
916 | switch( i ) { |
---|
917 | case 1: |
---|
918 | chip->port[i-1].pBRGC = &chip->m360->brgc1; |
---|
919 | chip->port[i-1].pSCCB = (m360SCCparms_t *) &chip->m360->scc1p; |
---|
920 | chip->port[i-1].pSCCR = &chip->m360->scc1; |
---|
921 | M360SetupMemory( chip ); /* Do this first time through */ |
---|
922 | break; |
---|
923 | case 2: |
---|
924 | chip->port[i-1].pBRGC = &chip->m360->brgc2; |
---|
925 | chip->port[i-1].pSCCB = &chip->m360->scc2p; |
---|
926 | chip->port[i-1].pSCCR = &chip->m360->scc2; |
---|
927 | break; |
---|
928 | case 3: |
---|
929 | chip->port[i-1].pBRGC = &chip->m360->brgc3; |
---|
930 | chip->port[i-1].pSCCB = &chip->m360->scc3p; |
---|
931 | chip->port[i-1].pSCCR = &chip->m360->scc3; |
---|
932 | break; |
---|
933 | case 4: |
---|
934 | chip->port[i-1].pBRGC = &chip->m360->brgc4; |
---|
935 | chip->port[i-1].pSCCB = &chip->m360->scc4p; |
---|
936 | chip->port[i-1].pSCCR = &chip->m360->scc4; |
---|
937 | break; |
---|
938 | default: |
---|
939 | printk("Invalid mc68360 channel %d\n", i); |
---|
940 | return RTEMS_IO_ERROR; |
---|
941 | } |
---|
942 | |
---|
943 | /* |
---|
944 | * Allocate buffer descriptors. |
---|
945 | */ |
---|
946 | |
---|
947 | chip->port[i-1].sccRxBd = M360AllocateBufferDescriptors(chip, 1); |
---|
948 | chip->port[i-1].sccTxBd = M360AllocateBufferDescriptors(chip, 1); |
---|
949 | } |
---|
950 | |
---|
951 | rsPMCQ1QuiccIntConnect( |
---|
952 | chip->board_data->busNo, |
---|
953 | chip->board_data->slotNo, |
---|
954 | chip->board_data->funcNo, |
---|
955 | &mc68360_sccInterruptHandler, |
---|
956 | chip |
---|
957 | ); |
---|
958 | |
---|
959 | return RTEMS_SUCCESSFUL; |
---|
960 | } |
---|
961 | |
---|
962 | const console_fns mc68360_scc_fns = { |
---|
963 | libchip_serial_default_probe, /* deviceProbe */ |
---|
964 | mc68360_scc_open, /* deviceFirstOpen */ |
---|
965 | NULL, /* deviceLastClose */ |
---|
966 | NULL, /* deviceRead */ |
---|
967 | mc68360_scc_write_support_int, /* deviceWrite */ |
---|
968 | mc68360_scc_initialize_interrupts, /* deviceInitialize */ |
---|
969 | mc68360_scc_write_polled, /* deviceWritePolled */ |
---|
970 | mc68360_scc_set_attributes, /* deviceSetAttributes */ |
---|
971 | TRUE /* deviceOutputUsesInterrupts */ |
---|
972 | }; |
---|
973 | |
---|
974 | const console_fns mc68360_scc_polled = { |
---|
975 | libchip_serial_default_probe, /* deviceProbe */ |
---|
976 | mc68360_scc_open, /* deviceFirstOpen */ |
---|
977 | mc68360_scc_close, /* deviceLastClose */ |
---|
978 | mc68360_scc_inbyte_nonblocking_polled, /* deviceRead */ |
---|
979 | mc68360_scc_write_support_polled, /* deviceWrite */ |
---|
980 | mc68360_scc_init, /* deviceInitialize */ |
---|
981 | mc68360_scc_write_polled, /* deviceWritePolled */ |
---|
982 | mc68360_scc_set_attributes, /* deviceSetAttributes */ |
---|
983 | FALSE /* deviceOutputUsesInterrupts */ |
---|
984 | }; |
---|
985 | |
---|