1 | /* genpvec.c |
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2 | * |
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3 | * These routines handle the external exception. Multiple ISRs occur off |
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4 | * of this one interrupt. This method will allow multiple ISRs to be |
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5 | * called using the same IRQ index. However, removing the ISR routines is |
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6 | * presently not supported. |
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7 | * |
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8 | * The external exception vector numbers begin with DMV170_IRQ_FIRST. |
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9 | * DMV170_IRQ_FIRST is defined to be one greater than the last processor |
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10 | * interrupt. |
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11 | * |
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12 | * COPYRIGHT (c) 1989-1999. |
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13 | * On-Line Applications Research Corporation (OAR). |
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14 | * |
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15 | * The license and distribution terms for this file may in |
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16 | * the file LICENSE in this distribution or at |
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17 | * http://www.rtems.com/license/LICENSE. |
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18 | * |
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19 | * $Id$ |
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20 | */ |
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21 | |
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22 | #include <bsp.h> |
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23 | #include <rtems/chain.h> |
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24 | #include <assert.h> |
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25 | |
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26 | #define NUM_LIRQ_HANDLERS 20 |
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27 | #define NUM_LIRQ ( MAX_BOARD_IRQS - PPC_IRQ_LAST ) |
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28 | |
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29 | /* |
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30 | * Structure to for one of possible multiple interrupt handlers for |
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31 | * a given interrupt. |
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32 | */ |
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33 | typedef struct |
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34 | { |
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35 | Chain_Node Node; |
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36 | rtems_isr_entry handler; /* isr routine */ |
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37 | rtems_vector_number vector; /* vector number */ |
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38 | } EE_ISR_Type; |
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39 | |
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40 | /* |
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41 | * Note: The following will not work if we add a method to remove |
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42 | * handlers at a later time. |
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43 | */ |
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44 | EE_ISR_Type ISR_Nodes [NUM_LIRQ_HANDLERS]; |
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45 | uint16_t Nodes_Used; |
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46 | Chain_Control ISR_Array [NUM_LIRQ]; |
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47 | |
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48 | /*PAGE |
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49 | * |
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50 | * external_exception_ISR |
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51 | * |
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52 | * This interrupt service routine is called for an External Exception. |
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53 | * |
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54 | * Input parameters: |
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55 | * vector - vector number representing the external exception vector. |
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56 | * |
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57 | * Output parameters: NONE |
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58 | * |
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59 | * Return values: |
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60 | */ |
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61 | |
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62 | rtems_isr external_exception_ISR ( |
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63 | rtems_vector_number vector /* IN */ |
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64 | ) |
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65 | { |
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66 | uint16_t index; |
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67 | rtems_boolean is_active=FALSE; |
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68 | uint32_t scv64_status; |
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69 | Chain_Node *node; |
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70 | EE_ISR_Type *ee_isr; |
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71 | |
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72 | /* |
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73 | * Get all active interrupts. |
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74 | */ |
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75 | scv64_status = SCV64_Get_Interrupt(); |
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76 | scv64_status &= SCV64_Get_Interrupt_Enable(); |
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77 | |
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78 | /* |
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79 | * Process any set interrupts. |
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80 | */ |
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81 | for (index = 0; index <= 5; index++) { |
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82 | switch(index) { |
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83 | case 0: |
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84 | is_active = SCV64_Is_IRQ0( scv64_status ); |
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85 | break; |
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86 | case 1: |
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87 | is_active = SCV64_Is_IRQ1( scv64_status ); |
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88 | break; |
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89 | case 2: |
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90 | is_active = SCV64_Is_IRQ2( scv64_status ); |
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91 | break; |
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92 | case 3: |
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93 | is_active = SCV64_Is_IRQ3( scv64_status ); |
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94 | break; |
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95 | case 4: |
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96 | is_active = SCV64_Is_IRQ4( scv64_status ); |
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97 | break; |
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98 | case 5: |
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99 | is_active = SCV64_Is_IRQ5( scv64_status ); |
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100 | break; |
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101 | } |
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102 | |
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103 | if (is_active) { |
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104 | /* |
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105 | * Read vector. |
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106 | */ |
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107 | node = ISR_Array[ index ].first; |
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108 | while ( !_Chain_Is_tail( &ISR_Array[ index ], node ) ) { |
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109 | ee_isr = (EE_ISR_Type *) node; |
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110 | (*ee_isr->handler)( ee_isr->vector ); |
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111 | node = node->next; |
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112 | } |
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113 | } |
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114 | } |
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115 | } |
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116 | |
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117 | /*PAGE |
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118 | * |
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119 | * initialize_external_exception_vector |
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120 | * |
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121 | * This routine initializes the external exception vector |
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122 | * |
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123 | * Input parameters: NONE |
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124 | * |
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125 | * Output parameters: NONE |
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126 | * |
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127 | * Return values: NONE |
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128 | */ |
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129 | |
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130 | void initialize_external_exception_vector () |
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131 | { |
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132 | int i; |
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133 | rtems_isr_entry previous_isr; |
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134 | rtems_status_code status; |
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135 | extern void SCV64_Initialize( void ); |
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136 | |
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137 | Nodes_Used = 0; |
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138 | |
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139 | /* |
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140 | * Initialize the SCV64 chip |
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141 | */ |
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142 | SCV64_Initialize(); |
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143 | |
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144 | for (i=0; i <NUM_LIRQ; i++) |
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145 | Chain_Initialize_empty( &ISR_Array[i] ); |
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146 | |
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147 | /* |
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148 | * Install external_exception_ISR () as the handler for |
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149 | * the General Purpose Interrupt. |
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150 | */ |
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151 | |
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152 | status = rtems_interrupt_catch( external_exception_ISR, |
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153 | PPC_IRQ_EXTERNAL , (rtems_isr_entry *) &previous_isr ); |
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154 | |
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155 | } |
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156 | |
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157 | /*PAGE |
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158 | * |
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159 | * set_EE_vector |
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160 | * |
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161 | * This routine installs one of multiple ISRs for the general purpose |
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162 | * inerrupt. |
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163 | * |
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164 | * Input parameters: |
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165 | * handler - handler to call at exception |
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166 | * vector - vector number associated with this handler. |
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167 | * |
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168 | * Output parameters: NONE |
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169 | * |
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170 | * Return values: |
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171 | */ |
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172 | |
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173 | rtems_isr_entry set_EE_vector( |
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174 | rtems_isr_entry handler, /* isr routine */ |
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175 | rtems_vector_number vector /* vector number */ |
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176 | ) |
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177 | { |
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178 | uint16_t vec_idx = vector - DMV170_IRQ_FIRST; |
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179 | uint32_t index; |
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180 | |
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181 | /* |
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182 | * Verify that all of the nodes have not been used. |
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183 | */ |
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184 | assert (Nodes_Used < NUM_LIRQ_HANDLERS); |
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185 | |
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186 | /* |
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187 | * If we have already installed this handler for this vector, then |
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188 | * just reset it. |
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189 | */ |
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190 | |
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191 | for ( index=0 ; index <= Nodes_Used ; index++ ) { |
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192 | if ( ISR_Nodes[index].vector == vector && |
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193 | ISR_Nodes[index].handler == handler ) |
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194 | return 0; |
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195 | } |
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196 | |
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197 | /* |
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198 | * Increment the number of nedes used and set the index for the node |
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199 | * array. |
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200 | */ |
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201 | |
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202 | Nodes_Used++; |
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203 | index = Nodes_Used - 1; |
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204 | |
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205 | /* |
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206 | * Write the values of the handler and the vector to this node. |
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207 | */ |
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208 | ISR_Nodes[index].handler = handler; |
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209 | ISR_Nodes[index].vector = vector; |
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210 | |
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211 | /* |
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212 | * Connect this node to the chain at the location of the |
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213 | * vector index. |
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214 | */ |
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215 | Chain_Append( &ISR_Array[vec_idx], &ISR_Nodes[index].Node ); |
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216 | |
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217 | /* |
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218 | * Enable the LIRQ interrupt. |
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219 | */ |
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220 | SCV64_Generate_DUART_Interrupts(); |
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221 | |
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222 | /* |
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223 | * No interrupt service routine was removed so return 0 |
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224 | */ |
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225 | return 0; |
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226 | } |
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