1 | /* |
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2 | ******************************************************************* |
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3 | ******************************************************************* |
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4 | ** ** |
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5 | ** RTEMS/KA9Q DRIVER FOR NATIONAL DP83932 `SONIC' ** |
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6 | ** SYSTEMS-ORIENTED NETWORK INTERFACE CONTROLLER ** |
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7 | ** ** |
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8 | ******************************************************************* |
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9 | ******************************************************************* |
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10 | */ |
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11 | |
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12 | /* |
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13 | * $Revision$ $Date$ $Author$ |
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14 | * $State$ |
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15 | */ |
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16 | |
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17 | /* |
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18 | * References: |
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19 | * 1) DP83932C-20/25/33 MHz SONIC(TM) Systems-Oriented Network Interface |
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20 | * Controller data sheet. TL/F/10492, RRD-B30M105, National Semiconductor, |
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21 | * 1995. |
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22 | * |
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23 | * 2) Software Driver Programmer's Guide for the DP83932 SONIC(TM), |
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24 | * Application Note 746, Wesley Lee and Mike Lui, TL/F/11140, |
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25 | * RRD-B30M75, National Semiconductor, March, 1991. |
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26 | * |
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27 | * 3) SVME/DMV-171 Single Board Computer Documentation Package, #805905, |
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28 | * DY 4 Systems Inc., Kanata, Ontario, September, 1996. |
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29 | */ |
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30 | |
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31 | #include "sonic.h" |
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32 | |
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33 | #include <rtems/error.h> |
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34 | #include <ka9q/rtems_ka9q.h> |
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35 | #include <ka9q/global.h> |
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36 | #include <ka9q/domain.h> |
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37 | #include <ka9q/enet.h> |
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38 | #include <ka9q/iface.h> |
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39 | #include <ka9q/netuser.h> |
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40 | #include <ka9q/trace.h> |
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41 | #include <ka9q/commands.h> |
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42 | |
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43 | /* |
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44 | * Debug levels |
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45 | * |
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46 | */ |
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47 | |
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48 | #define SONIC_DEBUG_NONE 0x0000 |
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49 | #define SONIC_DEBUG_ALL 0xFFFF |
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50 | #define SONIC_DEBUG_PRINT_REGISTERS 0x0001 |
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51 | #define SONIC_DEBUG_MEMORY 0x0002 |
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52 | #define SONIC_DEBUG_MEMORY_ALLOCATE 0x0004 |
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53 | #define SONIC_DEBUG_FRAGMENTS 0x0008 |
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54 | #define SONIC_DEBUG_CAM 0x0008 |
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55 | #define SONIC_DEBUG_DESCRIPTORS 0x0010 |
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56 | #define SONIC_DEBUG_ERRORS 0x0020 |
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57 | |
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58 | #define SONIC_DEBUG (SONIC_DEBUG_NONE) |
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59 | |
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60 | /* |
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61 | * XXX |
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62 | */ |
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63 | |
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64 | #include <dmv170.h> |
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65 | |
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66 | /* |
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67 | * Use the top line if you want more symbols. |
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68 | */ |
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69 | |
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70 | #define SONIC_STATIC |
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71 | /* #define SONIC_STATIC static */ |
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72 | |
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73 | /* |
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74 | * Number of devices supported by this driver |
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75 | */ |
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76 | #ifndef NSONIC |
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77 | # define NSONIC 1 |
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78 | #endif |
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79 | |
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80 | /* |
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81 | * Default location of device registers |
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82 | */ |
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83 | #ifndef SONIC_BASE_ADDRESS |
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84 | # define SONIC_BASE_ADDRESS 0xF3000000 |
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85 | # warning "Using default SONIC_BASE_ADDRESS." |
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86 | #endif |
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87 | |
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88 | /* |
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89 | * Default interrupt vector |
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90 | */ |
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91 | #ifndef SONIC_VECTOR |
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92 | # define SONIC_VECTOR 1 |
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93 | # warning "Using default SONIC_VECTOR." |
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94 | #endif |
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95 | |
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96 | /* |
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97 | * Default device configuration register values |
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98 | * Conservative, generic values. |
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99 | * DCR: |
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100 | * No extended bus mode |
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101 | * Unlatched bus retry |
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102 | * Programmable outputs unused |
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103 | * Asynchronous bus mode |
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104 | * User definable pins unused |
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105 | * No wait states (access time controlled by DTACK*) |
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106 | * 32-bit DMA |
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107 | * Empty/Fill DMA mode |
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108 | * Maximum Transmit/Receive FIFO |
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109 | * DC2: |
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110 | * Extended programmable outputs unused |
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111 | * Normal HOLD request |
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112 | * Packet compress output unused |
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113 | * No reject on CAM match |
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114 | */ |
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115 | #define SONIC_DCR \ |
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116 | (DCR_DW32 | DCR_WAIT0 | DCR_PO0 | DCR_PO1 | DCR_RFT4 | DCR_TFT8) |
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117 | #ifndef SONIC_DCR |
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118 | # define SONIC_DCR (DCR_DW32 | DCR_TFT28) |
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119 | #endif |
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120 | #ifndef SONIC_DC2 |
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121 | # define SONIC_DC2 (0) |
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122 | #endif |
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123 | |
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124 | /* |
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125 | * Default sizes of transmit and receive descriptor areas |
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126 | */ |
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127 | #define RDA_COUNT 20 |
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128 | #define TDA_COUNT 10 |
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129 | |
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130 | /* |
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131 | * |
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132 | * As suggested by National Application Note 746, make the |
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133 | * receive resource area bigger than the receive descriptor area. |
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134 | */ |
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135 | #define RRA_EXTRA_COUNT 0 |
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136 | |
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137 | /* |
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138 | * RTEMS event used by interrupt handler to signal daemons. |
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139 | */ |
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140 | #define INTERRUPT_EVENT RTEMS_EVENT_1 |
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141 | |
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142 | /* |
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143 | * Largest Ethernet frame. |
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144 | */ |
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145 | #define MAXIMUM_FRAME_SIZE 1518 |
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146 | |
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147 | /* |
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148 | * Receive buffer size. |
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149 | * Allow for a pointer, plus a full ethernet frame (including Frame |
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150 | * Check Sequence) rounded up to a 4-byte boundary. |
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151 | */ |
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152 | #define RBUF_SIZE ((sizeof (void *) + (MAXIMUM_FRAME_SIZE) + 3) & ~3) |
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153 | #define RBUF_WC ((((MAXIMUM_FRAME_SIZE) + 3) & ~3) / 2) |
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154 | |
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155 | /* |
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156 | * Macros for manipulating 32-bit pointers as 16-bit fragments |
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157 | */ |
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158 | #define LSW(p) ((rtems_unsigned16)((rtems_unsigned32)(p))) |
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159 | #define MSW(p) ((rtems_unsigned16)((rtems_unsigned32)(p) >> 16)) |
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160 | #define PTR(m,l) ((void*)(((rtems_unsigned16)(m)<<16)|(rtems_unsigned16)(l))) |
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161 | |
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162 | /* |
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163 | * Hardware-specific storage |
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164 | */ |
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165 | struct sonic { |
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166 | /* |
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167 | * Connection to KA9Q |
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168 | */ |
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169 | struct iface *iface; |
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170 | |
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171 | /* |
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172 | * Default location of device registers |
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173 | * ===CACHE=== |
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174 | * This area must be non-cacheable, guarded. |
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175 | */ |
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176 | void *sonic; |
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177 | |
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178 | /* |
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179 | * Interrupt vector |
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180 | */ |
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181 | rtems_vector_number vector; |
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182 | |
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183 | /* |
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184 | * Task waiting for transmit resources |
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185 | */ |
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186 | rtems_id txWaitTid; |
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187 | |
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188 | /* |
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189 | * Receive resource area |
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190 | */ |
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191 | int rdaCount; |
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192 | ReceiveResourcePointer_t rsa; |
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193 | ReceiveResourcePointer_t rea; |
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194 | CamDescriptorPointer_t cdp; |
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195 | ReceiveDescriptorPointer_t rda; |
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196 | ReceiveDescriptorPointer_t rdp_last; |
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197 | |
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198 | /* |
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199 | * Transmit descriptors |
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200 | */ |
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201 | int tdaCount; |
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202 | TransmitDescriptorPointer_t tdaHead; /* Last filled */ |
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203 | TransmitDescriptorPointer_t tdaTail; /* Next to retire */ |
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204 | int tdaActiveCount; |
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205 | |
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206 | /* |
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207 | * Statistics |
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208 | */ |
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209 | unsigned long Interrupts; |
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210 | unsigned long rxInterrupts; |
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211 | unsigned long rxMissed; |
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212 | unsigned long rxGiant; |
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213 | unsigned long rxNonOctet; |
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214 | unsigned long rxBadCRC; |
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215 | unsigned long rxCollision; |
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216 | |
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217 | unsigned long txInterrupts; |
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218 | unsigned long txSingleCollision; |
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219 | unsigned long txMultipleCollision; |
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220 | unsigned long txCollision; |
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221 | unsigned long txDeferred; |
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222 | unsigned long txUnderrun; |
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223 | unsigned long txLateCollision; |
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224 | unsigned long txExcessiveCollision; |
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225 | unsigned long txExcessiveDeferral; |
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226 | unsigned long txLostCarrier; |
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227 | unsigned long txRawWait; |
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228 | }; |
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229 | SONIC_STATIC struct sonic sonic[NSONIC]; |
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230 | |
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231 | /* |
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232 | ****************************************************************** |
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233 | * * |
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234 | * Support Routines * |
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235 | * * |
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236 | ****************************************************************** |
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237 | */ |
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238 | |
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239 | void sonic_write_register( |
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240 | void *base, |
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241 | unsigned32 regno, |
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242 | unsigned32 value |
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243 | ); |
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244 | |
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245 | unsigned32 sonic_read_register( |
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246 | void *base, |
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247 | unsigned32 regno |
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248 | ); |
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249 | |
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250 | void sonic_enable_interrupts( |
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251 | void *rp, |
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252 | unsigned32 mask |
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253 | ) |
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254 | { |
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255 | rtems_interrupt_level level; |
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256 | |
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257 | rtems_interrupt_disable( level ); |
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258 | sonic_write_register( |
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259 | rp, |
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260 | SONIC_REG_IMR, |
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261 | sonic_read_register(rp, SONIC_REG_IMR) | mask |
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262 | ); |
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263 | rtems_interrupt_enable( level ); |
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264 | } |
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265 | |
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266 | /* |
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267 | * Allocate non-cacheable memory on a single 64k page. |
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268 | * Very simple minded -- just keeps trying till the memory is on a single page. |
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269 | */ |
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270 | SONIC_STATIC void * sonic_allocate(unsigned int nbytes) |
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271 | { |
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272 | void *p; |
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273 | unsigned long a1, a2; |
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274 | |
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275 | for (;;) { |
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276 | /* |
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277 | * ===CACHE=== |
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278 | * Change malloc to malloc_noncacheable_guarded. |
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279 | */ |
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280 | p = calloc(1, nbytes); |
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281 | if (p == NULL) |
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282 | rtems_panic ("No memory!"); |
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283 | a1 = (unsigned long)p; |
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284 | a2 = a1 + nbytes - 1; |
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285 | if ((a1 >> 16) == (a2 >> 16)) |
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286 | break; |
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287 | } |
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288 | #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY_ALLOCATE) |
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289 | printf( "sonic_allocate %d bytes at %p\n", nbytes, p ); |
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290 | #endif |
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291 | return p; |
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292 | } |
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293 | |
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294 | /* |
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295 | * Shut down the interface. |
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296 | * This is a pretty simple-minded routine. It doesn't worry |
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297 | * about cleaning up mbufs, shutting down daemons, etc. |
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298 | */ |
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299 | |
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300 | SONIC_STATIC int sonic_stop (struct iface *iface) |
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301 | { |
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302 | int i; |
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303 | struct sonic *dp = &sonic[iface->dev]; |
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304 | void *rp = dp->sonic; |
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305 | |
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306 | /* |
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307 | * Stop the transmitter and receiver. |
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308 | */ |
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309 | sonic_write_register( rp, SONIC_REG_CR, CR_HTX | CR_RXDIS ); |
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310 | |
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311 | /* |
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312 | * Wait for things to stop. |
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313 | * For safety's sake, there is an alternate exit. |
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314 | */ |
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315 | i = 0; |
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316 | while (sonic_read_register( rp, SONIC_REG_CR ) & (CR_RXEN | CR_TXP)) { |
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317 | if (++i == 10000) |
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318 | break; |
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319 | } |
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320 | |
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321 | /* |
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322 | * Reset the device |
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323 | */ |
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324 | sonic_write_register( rp, SONIC_REG_CR, CR_RST ); |
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325 | sonic_write_register( rp, SONIC_REG_IMR, 0 ); |
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326 | return 0; |
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327 | } |
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328 | |
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329 | /* |
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330 | * Show interface statistics |
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331 | */ |
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332 | |
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333 | SONIC_STATIC void sonic_show (struct iface *iface) |
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334 | { |
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335 | struct sonic *dp = &sonic[iface->dev]; |
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336 | |
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337 | printf (" Total Interrupts:%-8lu", dp->Interrupts); |
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338 | printf (" Rx Interrupts:%-8lu", dp->rxInterrupts); |
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339 | printf (" Giant:%-8lu", dp->rxGiant); |
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340 | printf (" Non-octet:%-8lu\n", dp->rxNonOctet); |
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341 | printf (" Bad CRC:%-8lu", dp->rxBadCRC); |
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342 | printf (" Collision:%-8lu", dp->rxCollision); |
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343 | printf (" Missed:%-8lu\n", dp->rxMissed); |
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344 | |
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345 | printf ( " Tx Interrupts:%-8lu", dp->txInterrupts); |
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346 | printf ( " Deferred:%-8lu", dp->txDeferred); |
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347 | printf (" Lost Carrier:%-8lu\n", dp->txLostCarrier); |
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348 | printf ( "Single Collisions:%-8lu", dp->txSingleCollision); |
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349 | printf ( "Multiple Collisions:%-8lu", dp->txMultipleCollision); |
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350 | printf ("Excessive Collisions:%-8lu\n", dp->txExcessiveCollision); |
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351 | printf ( " Total Collisions:%-8lu", dp->txCollision); |
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352 | printf ( " Late Collision:%-8lu", dp->txLateCollision); |
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353 | printf (" Underrun:%-8lu\n", dp->txUnderrun); |
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354 | printf ( " Raw output wait:%-8lu\n", dp->txRawWait); |
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355 | } |
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356 | |
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357 | /* |
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358 | ****************************************************************** |
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359 | * * |
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360 | * Interrupt Handler * |
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361 | * * |
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362 | ****************************************************************** |
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363 | */ |
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364 | |
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365 | SONIC_STATIC rtems_isr sonic_interrupt_handler (rtems_vector_number v) |
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366 | { |
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367 | struct sonic *dp = sonic; |
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368 | unsigned32 isr, imr; |
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369 | void *rp; |
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370 | |
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371 | #if (NSONIC > 1) |
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372 | /* |
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373 | * Find the device which requires service |
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374 | */ |
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375 | for (;;) { |
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376 | if (dp->vector == v) |
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377 | break; |
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378 | if (++dp == &sonic[NSONIC]) |
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379 | return; /* Spurious interrupt? */ |
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380 | } |
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381 | #endif /* NSONIC > 1 */ |
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382 | |
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383 | /* |
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384 | * Get pointer to SONIC registers |
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385 | */ |
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386 | rp = dp->sonic; |
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387 | |
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388 | dp->Interrupts++; |
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389 | |
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390 | isr = sonic_read_register( rp, SONIC_REG_ISR ); |
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391 | imr = sonic_read_register( rp, SONIC_REG_IMR ); |
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392 | |
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393 | /* |
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394 | * Packet received or receive buffer area exceeded? |
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395 | */ |
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396 | if ((imr & (IMR_PRXEN | IMR_RBAEEN)) && |
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397 | (isr & (ISR_PKTRX | ISR_RBAE))) { |
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398 | imr &= ~(IMR_PRXEN | IMR_RBAEEN); |
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399 | dp->rxInterrupts++; |
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400 | rtems_event_send (dp->iface->rxproc, INTERRUPT_EVENT); |
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401 | } |
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402 | |
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403 | /* |
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404 | * Packet started, transmitter done or transmitter error? |
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405 | */ |
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406 | if ((imr & (IMR_PINTEN | IMR_PTXEN | IMR_TXEREN)) |
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407 | && (isr & (ISR_PINT | ISR_TXDN | ISR_TXER))) { |
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408 | imr &= ~(IMR_PINTEN | IMR_PTXEN | IMR_TXEREN); |
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409 | dp->txInterrupts++; |
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410 | rtems_event_send (dp->txWaitTid, INTERRUPT_EVENT); |
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411 | } |
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412 | |
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413 | sonic_write_register( rp, SONIC_REG_IMR, imr ); |
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414 | } |
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415 | |
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416 | /* |
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417 | ****************************************************************** |
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418 | * * |
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419 | * Transmitter Routines * |
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420 | * * |
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421 | ****************************************************************** |
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422 | */ |
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423 | |
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424 | /* |
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425 | * Soak up transmit descriptors that have been sent. |
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426 | */ |
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427 | |
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428 | SONIC_STATIC void sonic_retire_tda (struct sonic *dp) |
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429 | { |
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430 | rtems_unsigned16 status; |
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431 | unsigned int collisions; |
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432 | |
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433 | /* |
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434 | * Repeat for all completed transmit descriptors. |
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435 | */ |
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436 | while ((dp->tdaActiveCount != 0) |
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437 | && ((status = dp->tdaTail->status) != 0)) { |
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438 | |
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439 | #if (SONIC_DEBUG & SONIC_DEBUG_DESCRIPTORS) |
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440 | printf( "retire TDA %p (0x%04x)\n", dp->tdaTail, status ); |
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441 | #endif |
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442 | |
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443 | #if (SONIC_DEBUG & SONIC_DEBUG_ERRORS) |
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444 | if ( status != 0x0001 ) |
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445 | printf( "ERROR: retire TDA %p (0x%04x)\n", dp->tdaTail, status ); |
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446 | #endif |
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447 | |
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448 | /* |
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449 | * Check for errors which stop the transmitter. |
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450 | */ |
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451 | if (status & (TDA_STATUS_EXD | |
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452 | TDA_STATUS_EXC | |
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453 | TDA_STATUS_FU | |
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454 | TDA_STATUS_BCM)) { |
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455 | /* |
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456 | * Restart the transmitter if there are |
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457 | * packets waiting to go. |
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458 | */ |
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459 | rtems_unsigned16 link; |
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460 | link = *(dp->tdaTail->linkp); |
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461 | |
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462 | if ((link & TDA_LINK_EOL) == 0) { |
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463 | void *rp = dp->sonic; |
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464 | |
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465 | sonic_write_register( rp, SONIC_REG_CTDA, link ); |
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466 | sonic_write_register( rp, SONIC_REG_CR, CR_TXP ); |
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467 | } |
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468 | } |
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469 | |
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470 | /* |
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471 | * Update network statistics |
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472 | */ |
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473 | collisions = (status & TDA_STATUS_COLLISION_MASK) >> TDA_STATUS_COLLISION_SHIFT; |
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474 | if (collisions) { |
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475 | if (collisions == 1) |
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476 | dp->txSingleCollision++; |
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477 | else |
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478 | dp->txMultipleCollision++; |
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479 | dp->txCollision += collisions; |
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480 | } |
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481 | if (status & TDA_STATUS_EXC) |
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482 | dp->txExcessiveCollision++; |
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483 | if (status & TDA_STATUS_OWC) |
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484 | dp->txLateCollision++; |
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485 | if (status & TDA_STATUS_EXD) |
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486 | dp->txExcessiveDeferral++; |
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487 | if (status & TDA_STATUS_DEF) |
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488 | dp->txDeferred++; |
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489 | if (status & TDA_STATUS_FU) |
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490 | dp->txUnderrun++; |
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491 | if (status & TDA_STATUS_CRSL) |
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492 | dp->txLostCarrier++; |
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493 | |
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494 | /* |
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495 | * Free the packet and reset a couple of fields |
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496 | */ |
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497 | dp->tdaActiveCount--; |
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498 | free_p ((struct mbuf **)&dp->tdaTail->mbufp); |
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499 | |
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500 | dp->tdaTail->frag[0].frag_link = LSW(dp->tdaTail->link_pad); |
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501 | dp->tdaTail->frag_count = 0; |
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502 | |
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503 | /* |
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504 | * Move to the next transmit descriptor |
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505 | */ |
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506 | dp->tdaTail = dp->tdaTail->next; |
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507 | #if (SONIC_DEBUG & SONIC_DEBUG_DESCRIPTORS) |
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508 | printf( "next TDA %p\n", dp->tdaTail ); |
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509 | #endif |
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510 | } |
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511 | } |
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512 | |
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513 | /* |
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514 | * Send raw packet (caller provides header). |
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515 | * This code runs in the context of the interface transmit |
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516 | * task (most packets) or in the context of the network |
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517 | * task (for ARP requests). |
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518 | */ |
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519 | |
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520 | SONIC_STATIC int sonic_raw (struct iface *iface, struct mbuf **bpp) |
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521 | { |
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522 | struct sonic *dp = &sonic[iface->dev]; |
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523 | void *rp = dp->sonic; |
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524 | struct mbuf *bp; |
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525 | TransmitDescriptorPointer_t tdp; |
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526 | volatile struct TransmitDescriptorFragLink *fp; |
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527 | unsigned int packetSize; |
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528 | int i; |
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529 | static char padBuf[64]; |
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530 | |
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531 | /* |
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532 | * Update the log. |
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533 | */ |
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534 | iface->rawsndcnt++; |
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535 | iface->lastsent = secclock (); |
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536 | dump (iface, IF_TRACE_OUT, *bpp); |
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537 | |
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538 | /* |
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539 | * It would not do to have two tasks active in the transmit |
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540 | * loop at the same time. |
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541 | * The blocking is simple-minded since the odds of two tasks |
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542 | * simultaneously attempting to use this code are low. The only |
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543 | * way that two tasks can try to run here is: |
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544 | * 1) Task A enters this code and ends up having to |
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545 | * wait for a transmit buffer descriptor. |
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546 | * 2) Task B gains control and tries to transmit a packet. |
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547 | * The RTEMS/KA9Q scheduling semaphore ensures that there |
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548 | * are no race conditions associated with manipulating the |
---|
549 | * txWaitTid variable. |
---|
550 | */ |
---|
551 | if (dp->txWaitTid) { |
---|
552 | #if (SONIC_DEBUG & SONIC_DEBUG_FRAGMENTS) |
---|
553 | printf( "TX: conflict delay\n" ); |
---|
554 | #endif |
---|
555 | dp->txRawWait++; |
---|
556 | while (dp->txWaitTid) |
---|
557 | rtems_ka9q_ppause (10); |
---|
558 | } |
---|
559 | |
---|
560 | /* |
---|
561 | * Free up transmit descriptors. |
---|
562 | */ |
---|
563 | sonic_retire_tda (dp); |
---|
564 | |
---|
565 | /* |
---|
566 | * Wait for transmit descriptor to become available. |
---|
567 | */ |
---|
568 | if (dp->tdaActiveCount == dp->tdaCount) { |
---|
569 | #if (SONIC_DEBUG & SONIC_DEBUG_FRAGMENTS) |
---|
570 | puts( "Wait for more TDAs" ); |
---|
571 | #endif |
---|
572 | /* |
---|
573 | * Find out who we are |
---|
574 | */ |
---|
575 | if (dp->txWaitTid == 0) |
---|
576 | rtems_task_ident (RTEMS_SELF, 0, &dp->txWaitTid); |
---|
577 | |
---|
578 | /* |
---|
579 | * Clear old events. |
---|
580 | */ |
---|
581 | sonic_write_register( rp, SONIC_REG_ISR, ISR_PINT | ISR_TXDN | ISR_TXER ); |
---|
582 | |
---|
583 | /* |
---|
584 | * Wait for transmit descriptor to become available. |
---|
585 | * Note that the transmit descriptors are checked |
---|
586 | * *before* * entering the wait loop -- this catches |
---|
587 | * the possibility that a transmit descriptor became |
---|
588 | * available between the `if' the started this block, |
---|
589 | * and the clearing of the interrupt status register. |
---|
590 | */ |
---|
591 | sonic_retire_tda (dp); |
---|
592 | while (dp->tdaActiveCount == dp->tdaCount) { |
---|
593 | /* |
---|
594 | * Enable transmitter interrupts. |
---|
595 | */ |
---|
596 | sonic_enable_interrupts( rp, (IMR_PINTEN | IMR_PTXEN | IMR_TXEREN) ); |
---|
597 | |
---|
598 | /* |
---|
599 | * Wait for interrupt |
---|
600 | */ |
---|
601 | rtems_ka9q_event_receive (INTERRUPT_EVENT, |
---|
602 | RTEMS_WAIT|RTEMS_EVENT_ANY, |
---|
603 | RTEMS_NO_TIMEOUT); |
---|
604 | sonic_write_register( rp, SONIC_REG_ISR, ISR_PINT | ISR_TXDN | ISR_TXER ); |
---|
605 | sonic_retire_tda (dp); |
---|
606 | } |
---|
607 | } |
---|
608 | |
---|
609 | /* |
---|
610 | * Get the head of the packet mbuf chain. |
---|
611 | */ |
---|
612 | bp = *bpp; |
---|
613 | |
---|
614 | /* |
---|
615 | * Fill in the transmit descriptor fragment descriptors. |
---|
616 | * ===CACHE=== |
---|
617 | * If data cache is operating in write-back mode, flush cached |
---|
618 | * data to memory. |
---|
619 | */ |
---|
620 | tdp = dp->tdaHead->next; |
---|
621 | tdp->mbufp = bp; |
---|
622 | packetSize = 0; |
---|
623 | fp = tdp->frag; |
---|
624 | for (i = 0 ; i < MAXIMUM_FRAGS_PER_DESCRIPTOR ; i++, fp++) { |
---|
625 | fp->frag_lsw = LSW(bp->data); |
---|
626 | fp->frag_msw = MSW(bp->data); |
---|
627 | fp->frag_size = bp->cnt; |
---|
628 | packetSize += bp->cnt; |
---|
629 | |
---|
630 | #if (SONIC_DEBUG & SONIC_DEBUG_FRAGMENTS) |
---|
631 | printf( "fp %p 0x%04x%04x %d\n", |
---|
632 | fp, fp->frag_msw, fp->frag_lsw, fp->frag_size ); |
---|
633 | #endif |
---|
634 | /* |
---|
635 | * Break out of the loop if this mbuf is the last in the frame. |
---|
636 | */ |
---|
637 | if ((bp = bp->next) == NULL) |
---|
638 | break; |
---|
639 | } |
---|
640 | |
---|
641 | /* |
---|
642 | * Pad short packets. |
---|
643 | */ |
---|
644 | if ((packetSize < 64) && (i < MAXIMUM_FRAGS_PER_DESCRIPTOR)) { |
---|
645 | int padSize = 64 - packetSize; |
---|
646 | fp++; |
---|
647 | fp->frag_lsw = LSW(padBuf); |
---|
648 | fp->frag_msw = MSW(padBuf); |
---|
649 | fp->frag_size = padSize; |
---|
650 | #if (SONIC_DEBUG & SONIC_DEBUG_FRAGMENTS) |
---|
651 | printf( "PAD fp %p 0x%04x%04x %d\n", |
---|
652 | fp, fp->frag_msw, fp->frag_lsw, fp->frag_size ); |
---|
653 | #endif |
---|
654 | packetSize += padSize; |
---|
655 | i++; |
---|
656 | } |
---|
657 | |
---|
658 | /* |
---|
659 | * Fill Transmit Descriptor |
---|
660 | */ |
---|
661 | tdp->pkt_size = packetSize; |
---|
662 | tdp->frag_count = i + 1; |
---|
663 | tdp->status = 0; |
---|
664 | |
---|
665 | /* |
---|
666 | * Chain onto list and start transmission. |
---|
667 | */ |
---|
668 | |
---|
669 | tdp->linkp = &(fp+1)->frag_link; |
---|
670 | *tdp->linkp = LSW(tdp->next) | TDA_LINK_EOL; |
---|
671 | if ( dp->tdaHead->frag_count ) |
---|
672 | *dp->tdaHead->linkp &= ~TDA_LINK_EOL; |
---|
673 | dp->tdaActiveCount++; |
---|
674 | dp->tdaHead = tdp; |
---|
675 | |
---|
676 | sonic_write_register( rp, SONIC_REG_CR, CR_TXP ); |
---|
677 | |
---|
678 | /* |
---|
679 | * Let KA9Q know the packet is on the way |
---|
680 | */ |
---|
681 | |
---|
682 | dp->txWaitTid = 0; |
---|
683 | *bpp = NULL; |
---|
684 | return 0; |
---|
685 | } |
---|
686 | |
---|
687 | /* |
---|
688 | ****************************************************************** |
---|
689 | * * |
---|
690 | * Receiver Routines * |
---|
691 | * * |
---|
692 | ****************************************************************** |
---|
693 | */ |
---|
694 | |
---|
695 | /* |
---|
696 | * Wait for SONIC to hand over a Receive Descriptor. |
---|
697 | */ |
---|
698 | |
---|
699 | SONIC_STATIC void sonic_rda_wait( |
---|
700 | struct sonic *dp, |
---|
701 | ReceiveDescriptorPointer_t rdp |
---|
702 | ) |
---|
703 | { |
---|
704 | int i; |
---|
705 | void *rp = dp->sonic; |
---|
706 | |
---|
707 | /* |
---|
708 | * Wait for Receive Descriptor. |
---|
709 | * The order of the tests is very important. |
---|
710 | * The RDA is checked after RBAE is detected. This ensures that |
---|
711 | * the driver processes all RDA entries before reusing the RRA |
---|
712 | * entry holding the giant packet. |
---|
713 | * The event wait is done after the RDA and RBAE checks. This |
---|
714 | * catches the possibility that a Receive Descriptor became ready |
---|
715 | * between the call to this function and the clearing of the |
---|
716 | * interrupt status register bit. |
---|
717 | */ |
---|
718 | for (;;) { |
---|
719 | /* |
---|
720 | * Has a giant packet arrived? |
---|
721 | * The National DP83932C data sheet is very vague on what |
---|
722 | * happens under this condition. The description of the |
---|
723 | * Interrupt Status Register (Section 4.3.6) states, |
---|
724 | * ``Reception is aborted and the SONIC fetches the next |
---|
725 | * available resource descriptors in the RRA. The buffer |
---|
726 | * space is not re-used and an RDA is not setup for the |
---|
727 | * truncated packet.'' |
---|
728 | * I take ``Reception is aborted'' to mean that the RXEN |
---|
729 | * bit in the Command Register is cleared and must be set |
---|
730 | * by the driver to begin reception again. |
---|
731 | * Unfortunately, an alternative interpretation could be |
---|
732 | * that only reception of the current packet is aborted. |
---|
733 | * This would be more difficult to recover from.... |
---|
734 | */ |
---|
735 | if (sonic_read_register( rp, SONIC_REG_ISR ) & ISR_RBAE) { |
---|
736 | |
---|
737 | #if (SONIC_DEBUG & SONIC_DEBUG_ERRORS) |
---|
738 | printf( "ERROR: looks like a giant packet -- RBAE\n" ); |
---|
739 | #endif |
---|
740 | |
---|
741 | /* |
---|
742 | * One more check to soak up any Receive Descriptors |
---|
743 | * that may already have been handed back to the driver. |
---|
744 | */ |
---|
745 | if (rdp->in_use == RDA_IN_USE) { |
---|
746 | #if (SONIC_DEBUG & SONIC_DEBUG_ERRORS) |
---|
747 | printf( "ERROR: nope just an RBAE\n" ); |
---|
748 | #endif |
---|
749 | break; |
---|
750 | } |
---|
751 | |
---|
752 | /* |
---|
753 | * Check my interpretation of the SONIC manual. |
---|
754 | */ |
---|
755 | #if 0 |
---|
756 | if (sonic_read_register( rp, SONIC_REG_CR ) & CR_RXEN) |
---|
757 | rtems_panic ("SONIC RBAE/RXEN"); |
---|
758 | #endif |
---|
759 | |
---|
760 | /* |
---|
761 | * Update statistics |
---|
762 | */ |
---|
763 | dp->rxGiant++; |
---|
764 | |
---|
765 | /* |
---|
766 | * Reuse receive buffer. |
---|
767 | * Again, the manual is subject to interpretation. The |
---|
768 | * RRP register is described as, `the lower address of |
---|
769 | * the next descriptor the SONIC will read.'' |
---|
770 | * Since, acording to the ISR/RBAE notes, the SONIC has |
---|
771 | * ``fetched the next available resource descriptor in |
---|
772 | * the RRA'', I interpret this to mean that that the |
---|
773 | * driver has to move the RRP back *two* entries to |
---|
774 | * reuse the receive buffer holding the giant packet. |
---|
775 | */ |
---|
776 | #if 0 |
---|
777 | for (i = 0 ; i < 2 ; i++) { |
---|
778 | if (sonic_read_register( rp, SONIC_REG_RRP ) == |
---|
779 | sonic_read_register( rp, SONIC_REG_RSA )) |
---|
780 | sonic_write_register( |
---|
781 | rp, |
---|
782 | SONIC_REG_RRP, |
---|
783 | sonic_read_register( rp, SONIC_REG_REA ) |
---|
784 | ); |
---|
785 | sonic_write_register( |
---|
786 | rp, |
---|
787 | SONIC_REG_RRP, |
---|
788 | sonic_read_register(rp, SONIC_REG_RRP) - sizeof(ReceiveResource_t) |
---|
789 | ); |
---|
790 | } |
---|
791 | #endif |
---|
792 | |
---|
793 | /* |
---|
794 | * Restart reception |
---|
795 | */ |
---|
796 | sonic_write_register( rp, SONIC_REG_ISR, ISR_RBAE ); |
---|
797 | #if 0 |
---|
798 | sonic_write_register( rp, SONIC_REG_CR, CR_RXEN ); |
---|
799 | #endif |
---|
800 | } |
---|
801 | |
---|
802 | /* |
---|
803 | * Clear old packet-received events. |
---|
804 | */ |
---|
805 | sonic_write_register( rp, SONIC_REG_ISR, ISR_PKTRX ); |
---|
806 | |
---|
807 | /* |
---|
808 | * Has Receive Descriptor become available? |
---|
809 | */ |
---|
810 | if (rdp->in_use == RDA_IN_USE) |
---|
811 | break; |
---|
812 | |
---|
813 | /* |
---|
814 | * Enable interrupts. |
---|
815 | */ |
---|
816 | sonic_enable_interrupts( rp, (IMR_PRXEN | IMR_RBAEEN) ); |
---|
817 | |
---|
818 | /* |
---|
819 | * Wait for interrupt. |
---|
820 | */ |
---|
821 | rtems_ka9q_event_receive (INTERRUPT_EVENT, |
---|
822 | RTEMS_WAIT|RTEMS_EVENT_ANY, |
---|
823 | RTEMS_NO_TIMEOUT); |
---|
824 | } |
---|
825 | #if (SONIC_DEBUG & SONIC_DEBUG_DESCRIPTORS) |
---|
826 | printf( "RDA %p\n", rdp ); |
---|
827 | #endif |
---|
828 | |
---|
829 | #if (SONIC_DEBUG & SONIC_DEBUG_ERRORS) |
---|
830 | if (rdp->status & 0x000E) |
---|
831 | printf( "ERROR: RDA %p (0x%04x)\n", rdp, rdp->status ); |
---|
832 | #endif |
---|
833 | |
---|
834 | } |
---|
835 | |
---|
836 | /* |
---|
837 | * SCC reader task |
---|
838 | */ |
---|
839 | |
---|
840 | SONIC_STATIC void sonic_rx (int dev, void *p1, void *p2) |
---|
841 | { |
---|
842 | struct iface *iface = (struct iface *)p1; |
---|
843 | struct sonic *dp = (struct sonic *)p2; |
---|
844 | void *rp = dp->sonic; |
---|
845 | struct mbuf *bp; |
---|
846 | rtems_unsigned16 status; |
---|
847 | ReceiveDescriptorPointer_t rdp; |
---|
848 | ReceiveResourcePointer_t rwp, rea; |
---|
849 | rtems_unsigned16 newMissedTally, oldMissedTally; |
---|
850 | int continuousCount; |
---|
851 | |
---|
852 | rwp = dp->rsa; |
---|
853 | rea = dp->rea; |
---|
854 | rdp = dp->rda; |
---|
855 | |
---|
856 | /* |
---|
857 | * Start the receiver |
---|
858 | */ |
---|
859 | oldMissedTally = sonic_read_register( rp, SONIC_REG_MPT ); |
---|
860 | sonic_write_register( rp, SONIC_REG_CR, CR_RRRA ); |
---|
861 | sonic_write_register( rp, SONIC_REG_CR, CR_RXEN ); |
---|
862 | |
---|
863 | /* |
---|
864 | * Input packet handling loop |
---|
865 | */ |
---|
866 | continuousCount = 0; |
---|
867 | for (;;) { |
---|
868 | /* |
---|
869 | * Wait till SONIC supplies a Receive Descriptor. |
---|
870 | */ |
---|
871 | if (rdp->in_use == RDA_FREE) { |
---|
872 | continuousCount = 0; |
---|
873 | sonic_rda_wait (dp, rdp); |
---|
874 | } |
---|
875 | |
---|
876 | #if (SONIC_DEBUG & SONIC_DEBUG_DESCRIPTORS) |
---|
877 | printf( "Incoming packet %p status=0x%04x\n", rdp, rdp->status ); |
---|
878 | #endif |
---|
879 | |
---|
880 | /* |
---|
881 | * Check that packet is valid |
---|
882 | */ |
---|
883 | status = rdp->status; |
---|
884 | if (status & RDA_STATUS_PRX) { |
---|
885 | struct mbuf **mbp; |
---|
886 | void *p; |
---|
887 | |
---|
888 | /* |
---|
889 | * Get the mbuf pointer |
---|
890 | */ |
---|
891 | p = PTR(rdp->pkt_msw, rdp->pkt_lsw); |
---|
892 | mbp = (struct mbuf **)p - 1; |
---|
893 | bp = *mbp; |
---|
894 | |
---|
895 | /* |
---|
896 | * Pass the packet up the chain. |
---|
897 | * The mbuf count is reduced to remove |
---|
898 | * the frame check sequence at the end |
---|
899 | * of the packet. |
---|
900 | * ===CACHE=== |
---|
901 | * Invalidate cache entries for this memory. |
---|
902 | */ |
---|
903 | bp->cnt = rdp->byte_count - sizeof (uint32); |
---|
904 | net_route (iface, &bp); |
---|
905 | |
---|
906 | /* |
---|
907 | * Give the network code a chance to digest the |
---|
908 | * packet. This guards against a flurry of |
---|
909 | * incoming packets (usually an ARP storm) from |
---|
910 | * using up all the available memory. |
---|
911 | */ |
---|
912 | if (++continuousCount >= dp->rdaCount) { |
---|
913 | #if (SONIC_DEBUG & SONIC_DEBUG_ERRORS) |
---|
914 | printf( "ERROR: RX processed too many in a row\n" ); |
---|
915 | #endif |
---|
916 | kwait_null (); |
---|
917 | } |
---|
918 | |
---|
919 | /* |
---|
920 | * Sanity check that Receive Resource Area is |
---|
921 | * still in sync with Receive Descriptor Area |
---|
922 | * The buffer reported in the Receive Descriptor |
---|
923 | * should be the same as the buffer in the Receive |
---|
924 | * Resource we are about to reuse. |
---|
925 | */ |
---|
926 | /* XXX figure out whether this is valid or not */ |
---|
927 | #if 0 |
---|
928 | if ((LSW(p) != rwp->buff_ptr_lsw) |
---|
929 | || (MSW(p) != rwp->buff_ptr_msw)) |
---|
930 | rtems_panic ("SONIC RDA/RRA"); |
---|
931 | #endif |
---|
932 | |
---|
933 | /* |
---|
934 | * Allocate a new mbuf. |
---|
935 | */ |
---|
936 | bp = ambufw (RBUF_SIZE); |
---|
937 | mbp = (struct mbuf **)bp->data; |
---|
938 | bp->data += sizeof *mbp; |
---|
939 | *mbp = bp; |
---|
940 | |
---|
941 | /* |
---|
942 | * Reuse Receive Resource. |
---|
943 | */ |
---|
944 | rwp->buff_ptr_lsw = LSW(bp->data); |
---|
945 | rwp->buff_ptr_msw = MSW(bp->data); |
---|
946 | rwp++; |
---|
947 | if (rwp == rea) { |
---|
948 | #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY) |
---|
949 | printf( "Wrapping RWP from %p to %p\n", rwp, dp->rsa ); |
---|
950 | #endif |
---|
951 | rwp = dp->rsa; |
---|
952 | } |
---|
953 | sonic_write_register( rp, SONIC_REG_RWP , LSW(rwp) ); |
---|
954 | |
---|
955 | /* |
---|
956 | * Tell the SONIC to reread the RRA. |
---|
957 | */ |
---|
958 | if (sonic_read_register( rp, SONIC_REG_ISR ) & ISR_RBE) |
---|
959 | sonic_write_register( rp, SONIC_REG_ISR, ISR_RBE ); |
---|
960 | } |
---|
961 | else { |
---|
962 | if (status & RDA_STATUS_COL) |
---|
963 | dp->rxCollision++; |
---|
964 | if (status & RDA_STATUS_FAER) |
---|
965 | dp->rxNonOctet++; |
---|
966 | else if (status & RDA_STATUS_CRCR) |
---|
967 | dp->rxBadCRC++; |
---|
968 | } |
---|
969 | |
---|
970 | /* |
---|
971 | * Count missed packets |
---|
972 | */ |
---|
973 | newMissedTally = sonic_read_register( rp, SONIC_REG_MPT ); |
---|
974 | if (newMissedTally != oldMissedTally) { |
---|
975 | dp->rxMissed += (newMissedTally - oldMissedTally) & 0xFFFF; |
---|
976 | newMissedTally = oldMissedTally; |
---|
977 | } |
---|
978 | |
---|
979 | /* |
---|
980 | * Move to next receive descriptor |
---|
981 | */ |
---|
982 | rdp->in_use = RDA_FREE; |
---|
983 | rdp = rdp->next; |
---|
984 | rdp->link &= ~RDA_LINK_EOL; |
---|
985 | } |
---|
986 | } |
---|
987 | |
---|
988 | /* |
---|
989 | ****************************************************************** |
---|
990 | * * |
---|
991 | * Initialization Routines * |
---|
992 | * * |
---|
993 | ****************************************************************** |
---|
994 | */ |
---|
995 | |
---|
996 | /* |
---|
997 | * Initialize the SONIC hardware |
---|
998 | */ |
---|
999 | SONIC_STATIC void sonic_initialize_hardware( |
---|
1000 | struct sonic *dp, |
---|
1001 | int broadcastFlag |
---|
1002 | ) |
---|
1003 | { |
---|
1004 | void *rp = dp->sonic; |
---|
1005 | int i; |
---|
1006 | unsigned char *hwaddr; |
---|
1007 | rtems_isr_entry old_handler; |
---|
1008 | TransmitDescriptorPointer_t tdp; |
---|
1009 | ReceiveDescriptorPointer_t ordp, rdp; |
---|
1010 | ReceiveResourcePointer_t rwp; |
---|
1011 | struct mbuf *bp; |
---|
1012 | CamDescriptorPointer_t cdp; |
---|
1013 | |
---|
1014 | /* |
---|
1015 | * The Revision B SONIC has a horrible bug known as the "Zero |
---|
1016 | * Length Packet bug". The initial board used to develop this |
---|
1017 | * driver had a newer revision of the SONIC so there was no reason |
---|
1018 | * to check for this. If you have the Revision B SONIC chip, then |
---|
1019 | * you need to add some code to the RX path to handle this weirdness. |
---|
1020 | */ |
---|
1021 | |
---|
1022 | if ( sonic_read_register( rp, SONIC_REG_SR ) < SONIC_REVISION_C ) { |
---|
1023 | rtems_fatal_error_occurred( 0x0BADF00D ); /* don't eat this part :) */ |
---|
1024 | } |
---|
1025 | |
---|
1026 | /* |
---|
1027 | * Set up circular linked list in Transmit Descriptor Area. |
---|
1028 | * Use the PINT bit in the transmit configuration field to |
---|
1029 | * request an interrupt on every other transmitted packet. |
---|
1030 | * |
---|
1031 | * NOTE: sonic_allocate() zeroes all of the memory allocated. |
---|
1032 | */ |
---|
1033 | |
---|
1034 | dp->tdaActiveCount = 0; |
---|
1035 | dp->tdaTail = sonic_allocate(dp->tdaCount * sizeof *tdp); |
---|
1036 | #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY) |
---|
1037 | printf( "tdaTail = %p\n", dp->tdaTail ); |
---|
1038 | #endif |
---|
1039 | tdp = dp->tdaTail; |
---|
1040 | for (i = 0 ; i < dp->tdaCount ; i++) { |
---|
1041 | /* |
---|
1042 | * status, pkt_config, pkt_size, and all fragment fields |
---|
1043 | * are set to zero by sonic_allocate. |
---|
1044 | */ |
---|
1045 | |
---|
1046 | /* XXX not used by the BSD drivers |
---|
1047 | if (i & 1) |
---|
1048 | tdp->pkt_config = TDA_CONFIG_PINT; |
---|
1049 | */ |
---|
1050 | |
---|
1051 | tdp->frag_count = 0; |
---|
1052 | tdp->frag[0].frag_link = LSW(tdp + 1); |
---|
1053 | tdp->link_pad = LSW(tdp + 1) | TDA_LINK_EOL; |
---|
1054 | tdp->linkp = &((tdp + 1)->frag[0].frag_link); |
---|
1055 | tdp->next = (TransmitDescriptor_t *)(tdp + 1); |
---|
1056 | tdp++; |
---|
1057 | } |
---|
1058 | tdp--; |
---|
1059 | dp->tdaHead = tdp; |
---|
1060 | tdp->link_pad = LSW(dp->tdaTail) | TDA_LINK_EOL; |
---|
1061 | tdp->next = (TransmitDescriptor_t *)dp->tdaTail; |
---|
1062 | tdp->linkp = &dp->tdaTail->frag[0].frag_link; |
---|
1063 | |
---|
1064 | /* |
---|
1065 | * Set up circular linked list in Receive Descriptor Area. |
---|
1066 | * Leaves dp->rda pointing at the `beginning' of the list. |
---|
1067 | * |
---|
1068 | * NOTE: The RDA and CDP must have the same MSW for their addresses. |
---|
1069 | */ |
---|
1070 | |
---|
1071 | dp->rda = sonic_allocate( |
---|
1072 | (dp->rdaCount * sizeof(ReceiveDescriptor_t)) + |
---|
1073 | sizeof(CamDescriptor_t) ); |
---|
1074 | dp->cdp = (CamDescriptorPointer_t) ((unsigned char *)dp->rda + |
---|
1075 | (dp->rdaCount * sizeof(ReceiveDescriptor_t))); |
---|
1076 | #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY) |
---|
1077 | printf( "rda area = %p\n", dp->rda ); |
---|
1078 | printf( "cdp area = %p\n", dp->cdp ); |
---|
1079 | #endif |
---|
1080 | |
---|
1081 | ordp = rdp = dp->rda; |
---|
1082 | for (i = 0 ; i < dp->rdaCount ; i++) { |
---|
1083 | /* |
---|
1084 | * status, byte_count, pkt_ptr0, pkt_ptr1, and seq_no are set |
---|
1085 | * to zero by sonic_allocate. |
---|
1086 | */ |
---|
1087 | rdp->link = LSW(rdp + 1); |
---|
1088 | rdp->in_use = RDA_FREE; |
---|
1089 | rdp->next = (ReceiveDescriptor_t *)(rdp + 1); |
---|
1090 | ordp = rdp; |
---|
1091 | rdp++; |
---|
1092 | } |
---|
1093 | /* |
---|
1094 | * Link the last desriptor to the 1st one and mark it as the end |
---|
1095 | * of the list. |
---|
1096 | */ |
---|
1097 | ordp->next = dp->rda; |
---|
1098 | ordp->link = LSW(dp->rda) | RDA_LINK_EOL; |
---|
1099 | dp->rdp_last = rdp; |
---|
1100 | |
---|
1101 | /* |
---|
1102 | * Allocate the receive resource area. |
---|
1103 | * In accordance with National Application Note 746, make the |
---|
1104 | * receive resource area bigger than the receive descriptor area. |
---|
1105 | * This has the useful side effect of making the receive resource |
---|
1106 | * area big enough to hold the CAM descriptor area. |
---|
1107 | */ |
---|
1108 | |
---|
1109 | dp->rsa = sonic_allocate((dp->rdaCount + RRA_EXTRA_COUNT) * sizeof *dp->rsa); |
---|
1110 | #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY) |
---|
1111 | printf( "rsa area = %p\n", dp->rsa ); |
---|
1112 | #endif |
---|
1113 | |
---|
1114 | /* |
---|
1115 | * Set up list in Receive Resource Area. |
---|
1116 | * Allocate space for incoming packets. |
---|
1117 | */ |
---|
1118 | |
---|
1119 | rwp = dp->rsa; |
---|
1120 | for (i = 0 ; i < (dp->rdaCount + RRA_EXTRA_COUNT) ; i++, rwp++) { |
---|
1121 | struct mbuf **mbp; |
---|
1122 | |
---|
1123 | /* |
---|
1124 | * Allocate memory for buffer. |
---|
1125 | * Place a pointer to the mbuf at the beginning of the buffer |
---|
1126 | * so we can find the mbuf when the SONIC returns the buffer |
---|
1127 | * to the driver. |
---|
1128 | */ |
---|
1129 | bp = ambufw (RBUF_SIZE); |
---|
1130 | mbp = (struct mbuf **)bp->data; |
---|
1131 | bp->data += sizeof *mbp; |
---|
1132 | *mbp = bp; |
---|
1133 | |
---|
1134 | /* |
---|
1135 | * Set up RRA entry |
---|
1136 | */ |
---|
1137 | |
---|
1138 | rwp->buff_ptr_lsw = LSW(bp->data); |
---|
1139 | rwp->buff_ptr_msw = MSW(bp->data); |
---|
1140 | rwp->buff_wc_lsw = RBUF_WC; |
---|
1141 | rwp->buff_wc_msw = 0; |
---|
1142 | } |
---|
1143 | dp->rea = rwp; |
---|
1144 | #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY) |
---|
1145 | printf( "rea area = %p\n", dp->rea ); |
---|
1146 | #endif |
---|
1147 | |
---|
1148 | |
---|
1149 | /* |
---|
1150 | * Issue a software reset. |
---|
1151 | */ |
---|
1152 | sonic_write_register( rp, SONIC_REG_CR, CR_RST | CR_STP | CR_RXDIS | CR_HTX ); |
---|
1153 | |
---|
1154 | /* |
---|
1155 | * Set up data configuration registers. |
---|
1156 | */ |
---|
1157 | sonic_write_register( rp, SONIC_REG_DCR, SONIC_DCR ); |
---|
1158 | sonic_write_register( rp, SONIC_REG_DCR2, SONIC_DC2 ); |
---|
1159 | |
---|
1160 | sonic_write_register( rp, SONIC_REG_CR, CR_STP | CR_RXDIS | CR_HTX ); |
---|
1161 | |
---|
1162 | /* |
---|
1163 | * Mask all interrupts |
---|
1164 | */ |
---|
1165 | sonic_write_register( rp, SONIC_REG_IMR, 0x3fff ); |
---|
1166 | |
---|
1167 | /* |
---|
1168 | * Clear outstanding interrupts. |
---|
1169 | */ |
---|
1170 | sonic_write_register( rp, SONIC_REG_ISR, 0x7FFF ); |
---|
1171 | |
---|
1172 | /* |
---|
1173 | * Clear the tally counters |
---|
1174 | */ |
---|
1175 | |
---|
1176 | sonic_write_register( rp, SONIC_REG_CRCT, 0xFFFF ); |
---|
1177 | sonic_write_register( rp, SONIC_REG_FAET, 0xFFFF ); |
---|
1178 | sonic_write_register( rp, SONIC_REG_MPT, 0xFFFF ); |
---|
1179 | sonic_write_register( rp, SONIC_REG_RSC, 0 ); |
---|
1180 | |
---|
1181 | /* |
---|
1182 | * Set the Receiver mode |
---|
1183 | * |
---|
1184 | * Enable/disable reception of broadcast packets |
---|
1185 | */ |
---|
1186 | |
---|
1187 | if (broadcastFlag) |
---|
1188 | sonic_write_register( rp, SONIC_REG_RCR, RCR_BRD ); |
---|
1189 | else |
---|
1190 | sonic_write_register( rp, SONIC_REG_RCR, 0 ); |
---|
1191 | |
---|
1192 | /* |
---|
1193 | * Set up Resource Area pointers |
---|
1194 | */ |
---|
1195 | |
---|
1196 | sonic_write_register( rp, SONIC_REG_URRA, MSW(dp->rsa) ); |
---|
1197 | sonic_write_register( rp, SONIC_REG_RSA, LSW(dp->rsa) ); |
---|
1198 | |
---|
1199 | sonic_write_register( rp, SONIC_REG_REA, LSW(dp->rea) ); |
---|
1200 | |
---|
1201 | sonic_write_register( rp, SONIC_REG_RRP, LSW(dp->rsa) ); |
---|
1202 | sonic_write_register( rp, SONIC_REG_RWP, LSW(dp->rsa) ); /* XXX was rea */ |
---|
1203 | |
---|
1204 | sonic_write_register( rp, SONIC_REG_URDA, MSW(dp->rda) ); |
---|
1205 | sonic_write_register( rp, SONIC_REG_CRDA, LSW(dp->rda) ); |
---|
1206 | |
---|
1207 | sonic_write_register( rp, SONIC_REG_UTDA, MSW(dp->tdaTail) ); |
---|
1208 | sonic_write_register( rp, SONIC_REG_CTDA, LSW(dp->tdaTail) ); |
---|
1209 | |
---|
1210 | /* |
---|
1211 | * Set End Of Buffer Count register to the value recommended |
---|
1212 | * in Note 1 of Section 3.4.4.4 of the SONIC data sheet. |
---|
1213 | */ |
---|
1214 | |
---|
1215 | sonic_write_register( rp, SONIC_REG_EOBC, RBUF_WC - 2 ); |
---|
1216 | |
---|
1217 | /* |
---|
1218 | * Issue the load RRA command |
---|
1219 | */ |
---|
1220 | |
---|
1221 | sonic_write_register( rp, SONIC_REG_CR, CR_RRRA ); |
---|
1222 | while (sonic_read_register( rp, SONIC_REG_CR ) & CR_RRRA) |
---|
1223 | continue; |
---|
1224 | |
---|
1225 | /* |
---|
1226 | * Remove device reset |
---|
1227 | */ |
---|
1228 | |
---|
1229 | sonic_write_register( rp, SONIC_REG_CR, 0 ); |
---|
1230 | |
---|
1231 | /* |
---|
1232 | * Set up the SONIC CAM with our hardware address. |
---|
1233 | */ |
---|
1234 | |
---|
1235 | hwaddr = dp->iface->hwaddr; |
---|
1236 | cdp = dp->cdp; |
---|
1237 | |
---|
1238 | #if (SONIC_DEBUG & SONIC_DEBUG_CAM) |
---|
1239 | printf( "hwaddr: %2x:%2x:%2x:%2x:%2x:%2x\n", |
---|
1240 | hwaddr[0], hwaddr[1], hwaddr[2], hwaddr[3], hwaddr[4], hwaddr[5] ); |
---|
1241 | #endif |
---|
1242 | |
---|
1243 | cdp->cep = 0; /* Fill first and only entry in CAM */ |
---|
1244 | cdp->cap0 = hwaddr[1] << 8 | hwaddr[0]; |
---|
1245 | cdp->cap1 = hwaddr[3] << 8 | hwaddr[2]; |
---|
1246 | cdp->cap2 = hwaddr[5] << 8 | hwaddr[4]; |
---|
1247 | cdp->ce = 0x0001; /* Enable first entry in CAM */ |
---|
1248 | |
---|
1249 | sonic_write_register( rp, SONIC_REG_CDC, 1 ); /* 1 entry in CDA */ |
---|
1250 | sonic_write_register( rp, SONIC_REG_CDP, LSW(cdp) ); |
---|
1251 | sonic_write_register( rp, SONIC_REG_CR, CR_LCAM ); /* Load the CAM */ |
---|
1252 | |
---|
1253 | while (sonic_read_register( rp, SONIC_REG_CR ) & CR_LCAM) |
---|
1254 | continue; |
---|
1255 | |
---|
1256 | /* |
---|
1257 | * Verify that CAM was properly loaded. |
---|
1258 | */ |
---|
1259 | |
---|
1260 | sonic_write_register( rp, SONIC_REG_CR, CR_RST | CR_STP | CR_RXDIS | CR_HTX ); |
---|
1261 | |
---|
1262 | #if (SONIC_DEBUG & SONIC_DEBUG_CAM) |
---|
1263 | sonic_write_register( rp, SONIC_REG_CEP, 0 ); /* Select first entry in CAM */ |
---|
1264 | printf ("Loaded Ethernet address into SONIC CAM.\n" |
---|
1265 | " Wrote %04x%04x%04x - %#x\n" |
---|
1266 | " Read %04x%04x%04x - %#x\n", |
---|
1267 | cdp->cap2, cdp->cap1, cdp->cap0, cdp->ce, |
---|
1268 | sonic_read_register( rp, SONIC_REG_CAP2 ), |
---|
1269 | sonic_read_register( rp, SONIC_REG_CAP1 ), |
---|
1270 | sonic_read_register( rp, SONIC_REG_CAP0 ), |
---|
1271 | sonic_read_register( rp, SONIC_REG_CE )); |
---|
1272 | #endif |
---|
1273 | |
---|
1274 | sonic_write_register( rp, SONIC_REG_CEP, 0 ); /* Select first entry in CAM */ |
---|
1275 | if ((sonic_read_register( rp, SONIC_REG_CAP2 ) != cdp->cap2) |
---|
1276 | || (sonic_read_register( rp, SONIC_REG_CAP1 ) != cdp->cap1) |
---|
1277 | || (sonic_read_register( rp, SONIC_REG_CAP0 ) != cdp->cap0) |
---|
1278 | || (sonic_read_register( rp, SONIC_REG_CE ) != cdp->ce)) { |
---|
1279 | printf ("Failed to load Ethernet address into SONIC CAM.\n" |
---|
1280 | " Wrote %04x%04x%04x - %#x\n" |
---|
1281 | " Read %04x%04x%04x - %#x\n", |
---|
1282 | cdp->cap2, cdp->cap1, cdp->cap0, cdp->ce, |
---|
1283 | sonic_read_register( rp, SONIC_REG_CAP2 ), |
---|
1284 | sonic_read_register( rp, SONIC_REG_CAP1 ), |
---|
1285 | sonic_read_register( rp, SONIC_REG_CAP0 ), |
---|
1286 | sonic_read_register( rp, SONIC_REG_CE )); |
---|
1287 | rtems_panic ("SONIC LCAM"); |
---|
1288 | } |
---|
1289 | |
---|
1290 | sonic_write_register(rp, SONIC_REG_CR, CR_TXP | CR_RXEN | CR_STP); |
---|
1291 | |
---|
1292 | /* |
---|
1293 | * Attach SONIC interrupt handler |
---|
1294 | */ |
---|
1295 | sonic_write_register( rp, SONIC_REG_IMR, 0 ); |
---|
1296 | old_handler = set_vector(sonic_interrupt_handler, dp->vector, 0); |
---|
1297 | |
---|
1298 | /* |
---|
1299 | * Remainder of hardware initialization is |
---|
1300 | * done by the receive and transmit daemons. |
---|
1301 | */ |
---|
1302 | } |
---|
1303 | |
---|
1304 | /* |
---|
1305 | * Attach an SONIC driver to the system |
---|
1306 | * This is the only `extern' function in the driver. |
---|
1307 | * |
---|
1308 | * argv[0]: interface label, e.g. "rtems" |
---|
1309 | * The remainder of the arguments are optional key/value pairs: |
---|
1310 | * mtu ## -- maximum transmission unit, default 1500 |
---|
1311 | * broadcast y/n -- accept or ignore broadcast packets, default yes |
---|
1312 | * rbuf ## -- Set number of receive descriptor entries |
---|
1313 | * tbuf ## -- Set number of transmit descriptor entries |
---|
1314 | * ip ###.###.###.### -- IP address |
---|
1315 | * ether ##:##:##:##:##:## -- Ethernet address |
---|
1316 | * reg ###### -- Address of SONIC device registers |
---|
1317 | * vector ### -- SONIC interrupt vector |
---|
1318 | */ |
---|
1319 | int |
---|
1320 | rtems_ka9q_driver_attach (int argc, char *argv[], void *p) |
---|
1321 | { |
---|
1322 | struct sonic *dp; |
---|
1323 | struct iface *iface; |
---|
1324 | char *cp; |
---|
1325 | int argIndex; |
---|
1326 | int broadcastFlag; |
---|
1327 | char cbuf[30]; |
---|
1328 | |
---|
1329 | /* |
---|
1330 | * Find an unused entry |
---|
1331 | */ |
---|
1332 | dp = sonic; |
---|
1333 | for (;;) { |
---|
1334 | if (dp == &sonic[NSONIC]) { |
---|
1335 | printf ("No more SONIC devices.\n"); |
---|
1336 | return -1; |
---|
1337 | } |
---|
1338 | if (dp->iface == NULL) |
---|
1339 | break; |
---|
1340 | dp++; |
---|
1341 | } |
---|
1342 | if (if_lookup (argv[0]) != NULL) { |
---|
1343 | printf ("Interface %s already exists\n", argv[0]); |
---|
1344 | return -1; |
---|
1345 | } |
---|
1346 | |
---|
1347 | /* |
---|
1348 | * zero out the control structure |
---|
1349 | */ |
---|
1350 | |
---|
1351 | memset( dp, 0, sizeof(struct sonic) ); |
---|
1352 | |
---|
1353 | /* |
---|
1354 | * Create an inteface descriptor |
---|
1355 | */ |
---|
1356 | iface = callocw (1, sizeof *iface); |
---|
1357 | iface->name = strdup (argv[0]); |
---|
1358 | iface->dev = dp - sonic; |
---|
1359 | |
---|
1360 | /* |
---|
1361 | * Set default values |
---|
1362 | */ |
---|
1363 | broadcastFlag = 1; |
---|
1364 | dp->txWaitTid = 0; |
---|
1365 | dp->rdaCount = RDA_COUNT; |
---|
1366 | dp->tdaCount = TDA_COUNT; |
---|
1367 | iface->mtu = 1500; |
---|
1368 | iface->addr = Ip_addr; |
---|
1369 | iface->hwaddr = mallocw (EADDR_LEN); |
---|
1370 | memset (iface->hwaddr, 0x08, EADDR_LEN); |
---|
1371 | dp->sonic = (struct SonicRegisters *)SONIC_BASE_ADDRESS; |
---|
1372 | dp->vector = SONIC_VECTOR; |
---|
1373 | |
---|
1374 | /* |
---|
1375 | * Parse remaining arguments |
---|
1376 | */ |
---|
1377 | for (argIndex = 1 ; argIndex < (argc - 1) ; argIndex++) { |
---|
1378 | if (strcmp ("mtu", argv[argIndex]) == 0) { |
---|
1379 | iface->mtu = strtoul (argv[++argIndex], NULL, 0); |
---|
1380 | } |
---|
1381 | else if (strcmp ("broadcast", argv[argIndex]) == 0) { |
---|
1382 | if (*argv[++argIndex] == 'n') |
---|
1383 | broadcastFlag = 0; |
---|
1384 | } |
---|
1385 | else if (strcmp ("rbuf", argv[argIndex]) == 0) { |
---|
1386 | /* |
---|
1387 | * The minimum RDA count is 2. A single-entry RDA |
---|
1388 | * would be difficult to use since the SONIC does |
---|
1389 | * not release (in_use = 0) the RDA that has the |
---|
1390 | * EOL bit set. |
---|
1391 | */ |
---|
1392 | dp->rdaCount = strtoul (argv[++argIndex], NULL, 0); |
---|
1393 | if ((dp->rdaCount <= 1) || (dp->rdaCount > 200)) { |
---|
1394 | printf ("RDA option (%d) is invalid.\n", dp->rdaCount); |
---|
1395 | return -1; |
---|
1396 | } |
---|
1397 | } |
---|
1398 | else if (strcmp ("tbuf", argv[argIndex]) == 0) { |
---|
1399 | dp->tdaCount = strtoul (argv[++argIndex], NULL, 0); |
---|
1400 | if ((dp->tdaCount <= 1) || (dp->tdaCount > 200)) { |
---|
1401 | printf ("TDA option (%d) is invalid.\n", dp->tdaCount); |
---|
1402 | return -1; |
---|
1403 | } |
---|
1404 | } |
---|
1405 | else if (strcmp ("ip", argv[argIndex]) == 0) { |
---|
1406 | iface->addr = resolve (argv[++argIndex]); |
---|
1407 | } |
---|
1408 | else if (strcmp ("ether", argv[argIndex]) == 0) { |
---|
1409 | gether (iface->hwaddr, argv[++argIndex]); |
---|
1410 | } |
---|
1411 | else if (strcmp ("reg", argv[argIndex]) == 0) { |
---|
1412 | dp->sonic = (struct SonicRegisters *)strtoul (argv[++argIndex], NULL, 0); |
---|
1413 | } |
---|
1414 | else if (strcmp ("vector", argv[argIndex]) == 0) { |
---|
1415 | dp->vector = strtoul (argv[++argIndex], NULL, 0); |
---|
1416 | } |
---|
1417 | else { |
---|
1418 | printf ("Argument %d (%s) is invalid.\n", argIndex, argv[argIndex]); |
---|
1419 | return -1; |
---|
1420 | } |
---|
1421 | } |
---|
1422 | printf ("Ethernet address: %s\n", pether (cbuf, iface->hwaddr)); |
---|
1423 | iface->raw = sonic_raw; |
---|
1424 | iface->stop = sonic_stop; |
---|
1425 | iface->show = sonic_show; |
---|
1426 | dp->iface = iface; |
---|
1427 | setencap (iface, "Ethernet"); |
---|
1428 | |
---|
1429 | /* |
---|
1430 | * Set up SONIC hardware |
---|
1431 | */ |
---|
1432 | sonic_initialize_hardware (dp, broadcastFlag); |
---|
1433 | |
---|
1434 | /* |
---|
1435 | * Chain onto list of interfaces |
---|
1436 | */ |
---|
1437 | iface->next = Ifaces; |
---|
1438 | Ifaces = iface; |
---|
1439 | |
---|
1440 | /* |
---|
1441 | * Start I/O daemons |
---|
1442 | */ |
---|
1443 | cp = if_name (iface, " tx"); |
---|
1444 | iface->txproc = newproc (cp, 2048, if_tx, iface->dev, iface, NULL, 0); |
---|
1445 | free (cp); |
---|
1446 | cp = if_name (iface, " rx"); |
---|
1447 | iface->rxproc = newproc (cp, 2048, sonic_rx, iface->dev, iface, dp, 0); |
---|
1448 | free (cp); |
---|
1449 | return 0; |
---|
1450 | } |
---|
1451 | |
---|
1452 | #if (SONIC_DEBUG & SONIC_DEBUG_PRINT_REGISTERS) |
---|
1453 | #include <stdio.h> |
---|
1454 | |
---|
1455 | char SONIC_Reg_name[64][6]= { |
---|
1456 | "CR", /* 0x00 */ |
---|
1457 | "DCR", /* 0x01 */ |
---|
1458 | "RCR", /* 0x02 */ |
---|
1459 | "TCR", /* 0x03 */ |
---|
1460 | "IMR", /* 0x04 */ |
---|
1461 | "ISR", /* 0x05 */ |
---|
1462 | "UTDA", /* 0x06 */ |
---|
1463 | "CTDA", /* 0x07 */ |
---|
1464 | "0x08", /* 0x08 */ |
---|
1465 | "0x09", /* 0x09 */ |
---|
1466 | "0x0A", /* 0x0A */ |
---|
1467 | "0x0B", /* 0x0B */ |
---|
1468 | "0x0C", /* 0x0C */ |
---|
1469 | "URDA", /* 0x0D */ |
---|
1470 | "CRDA", /* 0x0E */ |
---|
1471 | "0x0F", /* 0x0F */ |
---|
1472 | "0x10", /* 0x10 */ |
---|
1473 | "0x11", /* 0x11 */ |
---|
1474 | "0x12", /* 0x12 */ |
---|
1475 | "EOBC", /* 0x13 */ |
---|
1476 | "URRA", /* 0x14 */ |
---|
1477 | "RSA", /* 0x15 */ |
---|
1478 | "REA", /* 0x16 */ |
---|
1479 | "RRP", /* 0x17 */ |
---|
1480 | "RWP", /* 0x18 */ |
---|
1481 | "0x19", /* 0x19 */ |
---|
1482 | "0x1A", /* 0x1A */ |
---|
1483 | "0x1B", /* 0x1B */ |
---|
1484 | "0x1C", /* 0x1C */ |
---|
1485 | "0x0D", /* 0x1D */ |
---|
1486 | "0x1E", /* 0x1E */ |
---|
1487 | "0x1F", /* 0x1F */ |
---|
1488 | "0x20", /* 0x20 */ |
---|
1489 | "CEP", /* 0x21 */ |
---|
1490 | "CAP2", /* 0x22 */ |
---|
1491 | "CAP1", /* 0x23 */ |
---|
1492 | "CAP0", /* 0x24 */ |
---|
1493 | "CE", /* 0x25 */ |
---|
1494 | "CDP", /* 0x26 */ |
---|
1495 | "CDC", /* 0x27 */ |
---|
1496 | "SR", /* 0x28 */ |
---|
1497 | "WT0", /* 0x29 */ |
---|
1498 | "WT1", /* 0x2A */ |
---|
1499 | "RSC", /* 0x2B */ |
---|
1500 | "CRCT", /* 0x2C */ |
---|
1501 | "FAET", /* 0x2D */ |
---|
1502 | "MPT", /* 0x2E */ |
---|
1503 | "MDT", /* 0x2F */ |
---|
1504 | "0x30", /* 0x30 */ |
---|
1505 | "0x31", /* 0x31 */ |
---|
1506 | "0x32", /* 0x32 */ |
---|
1507 | "0x33", /* 0x33 */ |
---|
1508 | "0x34", /* 0x34 */ |
---|
1509 | "0x35", /* 0x35 */ |
---|
1510 | "0x36", /* 0x36 */ |
---|
1511 | "0x37", /* 0x37 */ |
---|
1512 | "0x38", /* 0x38 */ |
---|
1513 | "0x39", /* 0x39 */ |
---|
1514 | "0x3A", /* 0x3A */ |
---|
1515 | "0x3B", /* 0x3B */ |
---|
1516 | "0x3C", /* 0x3C */ |
---|
1517 | "0x3D", /* 0x3D */ |
---|
1518 | "0x3E", /* 0x3E */ |
---|
1519 | "DCR2" /* 0x3F */ |
---|
1520 | }; |
---|
1521 | #endif |
---|
1522 | |
---|
1523 | void sonic_write_register( |
---|
1524 | void *base, |
---|
1525 | unsigned32 regno, |
---|
1526 | unsigned32 value |
---|
1527 | ) |
---|
1528 | { |
---|
1529 | volatile unsigned32 *p = base; |
---|
1530 | |
---|
1531 | #if (SONIC_DEBUG & SONIC_DEBUG_PRINT_REGISTERS) |
---|
1532 | printf( "%p Write 0x%04x to %s (0x%02x)\n", |
---|
1533 | &p[regno], value, SONIC_Reg_name[regno], regno ); |
---|
1534 | fflush( stdout ); |
---|
1535 | #endif |
---|
1536 | p[regno] = value; |
---|
1537 | } |
---|
1538 | |
---|
1539 | unsigned32 sonic_read_register( |
---|
1540 | void *base, |
---|
1541 | unsigned32 regno |
---|
1542 | ) |
---|
1543 | { |
---|
1544 | volatile unsigned32 *p = base; |
---|
1545 | unsigned32 value; |
---|
1546 | |
---|
1547 | value = p[regno]; |
---|
1548 | #if (SONIC_DEBUG & SONIC_DEBUG_PRINT_REGISTERS) |
---|
1549 | printf( "%p Read 0x%04x from %s (0x%02x)\n", |
---|
1550 | &p[regno], value, SONIC_Reg_name[regno], regno ); |
---|
1551 | fflush( stdout ); |
---|
1552 | #endif |
---|
1553 | return value; |
---|
1554 | } |
---|